* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
* OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "config.h"
-#include "JIT.h"
#if ENABLE(JIT)
+#include "JIT.h"
#include "CodeBlock.h"
-#include "JITInlineMethods.h"
+#include "JITInlines.h"
+#include "JITStubCall.h"
+#include "JITStubs.h"
#include "JSArray.h"
#include "JSFunction.h"
#include "Interpreter.h"
+#include "Operations.h"
#include "ResultType.h"
#include "SamplingTool.h"
#include <stdio.h>
#endif
-#define __ m_assembler.
-
using namespace std;
namespace JSC {
-void JIT::compileFastArith_op_lshift(unsigned result, unsigned op1, unsigned op2)
+void JIT::emit_op_jless(Instruction* currentInstruction)
+{
+ unsigned op1 = currentInstruction[1].u.operand;
+ unsigned op2 = currentInstruction[2].u.operand;
+ unsigned target = currentInstruction[3].u.operand;
+
+ emit_compareAndJump(op_jless, op1, op2, target, LessThan);
+}
+
+void JIT::emit_op_jlesseq(Instruction* currentInstruction)
+{
+ unsigned op1 = currentInstruction[1].u.operand;
+ unsigned op2 = currentInstruction[2].u.operand;
+ unsigned target = currentInstruction[3].u.operand;
+
+ emit_compareAndJump(op_jlesseq, op1, op2, target, LessThanOrEqual);
+}
+
+void JIT::emit_op_jgreater(Instruction* currentInstruction)
+{
+ unsigned op1 = currentInstruction[1].u.operand;
+ unsigned op2 = currentInstruction[2].u.operand;
+ unsigned target = currentInstruction[3].u.operand;
+
+ emit_compareAndJump(op_jgreater, op1, op2, target, GreaterThan);
+}
+
+void JIT::emit_op_jgreatereq(Instruction* currentInstruction)
+{
+ unsigned op1 = currentInstruction[1].u.operand;
+ unsigned op2 = currentInstruction[2].u.operand;
+ unsigned target = currentInstruction[3].u.operand;
+
+ emit_compareAndJump(op_jgreatereq, op1, op2, target, GreaterThanOrEqual);
+}
+
+void JIT::emit_op_jnless(Instruction* currentInstruction)
+{
+ unsigned op1 = currentInstruction[1].u.operand;
+ unsigned op2 = currentInstruction[2].u.operand;
+ unsigned target = currentInstruction[3].u.operand;
+
+ emit_compareAndJump(op_jnless, op1, op2, target, GreaterThanOrEqual);
+}
+
+void JIT::emit_op_jnlesseq(Instruction* currentInstruction)
+{
+ unsigned op1 = currentInstruction[1].u.operand;
+ unsigned op2 = currentInstruction[2].u.operand;
+ unsigned target = currentInstruction[3].u.operand;
+
+ emit_compareAndJump(op_jnlesseq, op1, op2, target, GreaterThan);
+}
+
+void JIT::emit_op_jngreater(Instruction* currentInstruction)
+{
+ unsigned op1 = currentInstruction[1].u.operand;
+ unsigned op2 = currentInstruction[2].u.operand;
+ unsigned target = currentInstruction[3].u.operand;
+
+ emit_compareAndJump(op_jngreater, op1, op2, target, LessThanOrEqual);
+}
+
+void JIT::emit_op_jngreatereq(Instruction* currentInstruction)
+{
+ unsigned op1 = currentInstruction[1].u.operand;
+ unsigned op2 = currentInstruction[2].u.operand;
+ unsigned target = currentInstruction[3].u.operand;
+
+ emit_compareAndJump(op_jngreatereq, op1, op2, target, LessThan);
+}
+
+void JIT::emitSlow_op_jless(Instruction* currentInstruction, Vector<SlowCaseEntry>::iterator& iter)
+{
+ unsigned op1 = currentInstruction[1].u.operand;
+ unsigned op2 = currentInstruction[2].u.operand;
+ unsigned target = currentInstruction[3].u.operand;
+
+ emit_compareAndJumpSlow(op1, op2, target, DoubleLessThan, cti_op_jless, false, iter);
+}
+
+void JIT::emitSlow_op_jlesseq(Instruction* currentInstruction, Vector<SlowCaseEntry>::iterator& iter)
+{
+ unsigned op1 = currentInstruction[1].u.operand;
+ unsigned op2 = currentInstruction[2].u.operand;
+ unsigned target = currentInstruction[3].u.operand;
+
+ emit_compareAndJumpSlow(op1, op2, target, DoubleLessThanOrEqual, cti_op_jlesseq, false, iter);
+}
+
+void JIT::emitSlow_op_jgreater(Instruction* currentInstruction, Vector<SlowCaseEntry>::iterator& iter)
+{
+ unsigned op1 = currentInstruction[1].u.operand;
+ unsigned op2 = currentInstruction[2].u.operand;
+ unsigned target = currentInstruction[3].u.operand;
+
+ emit_compareAndJumpSlow(op1, op2, target, DoubleGreaterThan, cti_op_jgreater, false, iter);
+}
+
+void JIT::emitSlow_op_jgreatereq(Instruction* currentInstruction, Vector<SlowCaseEntry>::iterator& iter)
+{
+ unsigned op1 = currentInstruction[1].u.operand;
+ unsigned op2 = currentInstruction[2].u.operand;
+ unsigned target = currentInstruction[3].u.operand;
+
+ emit_compareAndJumpSlow(op1, op2, target, DoubleGreaterThanOrEqual, cti_op_jgreatereq, false, iter);
+}
+
+void JIT::emitSlow_op_jnless(Instruction* currentInstruction, Vector<SlowCaseEntry>::iterator& iter)
{
- emitGetVirtualRegisters(op1, X86::eax, op2, X86::ecx);
+ unsigned op1 = currentInstruction[1].u.operand;
+ unsigned op2 = currentInstruction[2].u.operand;
+ unsigned target = currentInstruction[3].u.operand;
+
+ emit_compareAndJumpSlow(op1, op2, target, DoubleGreaterThanOrEqualOrUnordered, cti_op_jless, true, iter);
+}
+
+void JIT::emitSlow_op_jnlesseq(Instruction* currentInstruction, Vector<SlowCaseEntry>::iterator& iter)
+{
+ unsigned op1 = currentInstruction[1].u.operand;
+ unsigned op2 = currentInstruction[2].u.operand;
+ unsigned target = currentInstruction[3].u.operand;
+
+ emit_compareAndJumpSlow(op1, op2, target, DoubleGreaterThanOrUnordered, cti_op_jlesseq, true, iter);
+}
+
+void JIT::emitSlow_op_jngreater(Instruction* currentInstruction, Vector<SlowCaseEntry>::iterator& iter)
+{
+ unsigned op1 = currentInstruction[1].u.operand;
+ unsigned op2 = currentInstruction[2].u.operand;
+ unsigned target = currentInstruction[3].u.operand;
+
+ emit_compareAndJumpSlow(op1, op2, target, DoubleLessThanOrEqualOrUnordered, cti_op_jgreater, true, iter);
+}
+
+void JIT::emitSlow_op_jngreatereq(Instruction* currentInstruction, Vector<SlowCaseEntry>::iterator& iter)
+{
+ unsigned op1 = currentInstruction[1].u.operand;
+ unsigned op2 = currentInstruction[2].u.operand;
+ unsigned target = currentInstruction[3].u.operand;
+
+ emit_compareAndJumpSlow(op1, op2, target, DoubleLessThanOrUnordered, cti_op_jgreatereq, true, iter);
+}
+
+#if USE(JSVALUE64)
+
+void JIT::emit_op_negate(Instruction* currentInstruction)
+{
+ unsigned dst = currentInstruction[1].u.operand;
+ unsigned src = currentInstruction[2].u.operand;
+
+ emitGetVirtualRegister(src, regT0);
+
+ Jump srcNotInt = emitJumpIfNotImmediateInteger(regT0);
+ addSlowCase(branchTest32(Zero, regT0, TrustedImm32(0x7fffffff)));
+ neg32(regT0);
+ emitFastArithReTagImmediate(regT0, regT0);
+
+ Jump end = jump();
+
+ srcNotInt.link(this);
+ emitJumpSlowCaseIfNotImmediateNumber(regT0);
+
+ move(TrustedImm64((int64_t)0x8000000000000000ull), regT1);
+ xor64(regT1, regT0);
+
+ end.link(this);
+ emitPutVirtualRegister(dst);
+}
+
+void JIT::emitSlow_op_negate(Instruction* currentInstruction, Vector<SlowCaseEntry>::iterator& iter)
+{
+ unsigned dst = currentInstruction[1].u.operand;
+
+ linkSlowCase(iter); // 0x7fffffff check
+ linkSlowCase(iter); // double check
+
+ JITStubCall stubCall(this, cti_op_negate);
+ stubCall.addArgument(regT0);
+ stubCall.call(dst);
+}
+
+void JIT::emit_op_lshift(Instruction* currentInstruction)
+{
+ unsigned result = currentInstruction[1].u.operand;
+ unsigned op1 = currentInstruction[2].u.operand;
+ unsigned op2 = currentInstruction[3].u.operand;
+
+ emitGetVirtualRegisters(op1, regT0, op2, regT2);
// FIXME: would we be better using 'emitJumpSlowCaseIfNotImmediateIntegers'? - we *probably* ought to be consistent.
- emitJumpSlowCaseIfNotImmediateInteger(X86::eax);
- emitJumpSlowCaseIfNotImmediateInteger(X86::ecx);
- emitFastArithImmToInt(X86::eax);
- emitFastArithImmToInt(X86::ecx);
-#if !PLATFORM(X86)
- // Mask with 0x1f as per ecma-262 11.7.2 step 7.
- // On 32-bit x86 this is not necessary, since the shift anount is implicitly masked in the instruction.
- and32(Imm32(0x1f), X86::ecx);
-#endif
- lshift32(X86::ecx, X86::eax);
-#if !USE(ALTERNATE_JSIMMEDIATE)
- addSlowCase(joAdd32(X86::eax, X86::eax));
- signExtend32ToPtr(X86::eax, X86::eax);
-#endif
- emitFastArithReTagImmediate(X86::eax, X86::eax);
+ emitJumpSlowCaseIfNotImmediateInteger(regT0);
+ emitJumpSlowCaseIfNotImmediateInteger(regT2);
+ emitFastArithImmToInt(regT0);
+ emitFastArithImmToInt(regT2);
+ lshift32(regT2, regT0);
+ emitFastArithReTagImmediate(regT0, regT0);
emitPutVirtualRegister(result);
}
-void JIT::compileFastArithSlow_op_lshift(unsigned result, unsigned op1, unsigned op2, Vector<SlowCaseEntry>::iterator& iter)
+
+void JIT::emitSlow_op_lshift(Instruction* currentInstruction, Vector<SlowCaseEntry>::iterator& iter)
{
-#if USE(ALTERNATE_JSIMMEDIATE)
+ unsigned result = currentInstruction[1].u.operand;
+ unsigned op1 = currentInstruction[2].u.operand;
+ unsigned op2 = currentInstruction[3].u.operand;
+
UNUSED_PARAM(op1);
UNUSED_PARAM(op2);
linkSlowCase(iter);
linkSlowCase(iter);
-#else
- // If we are limited to 32-bit immediates there is a third slow case, which required the operands to have been reloaded.
- Jump notImm1 = getSlowCase(iter);
- Jump notImm2 = getSlowCase(iter);
- linkSlowCase(iter);
- emitGetVirtualRegisters(op1, X86::eax, op2, X86::ecx);
- notImm1.link(this);
- notImm2.link(this);
-#endif
- emitPutJITStubArg(X86::eax, 1);
- emitPutJITStubArg(X86::ecx, 2);
- emitCTICall(Interpreter::cti_op_lshift);
- emitPutVirtualRegister(result);
+ JITStubCall stubCall(this, cti_op_lshift);
+ stubCall.addArgument(regT0);
+ stubCall.addArgument(regT2);
+ stubCall.call(result);
}
-void JIT::compileFastArith_op_rshift(unsigned result, unsigned op1, unsigned op2)
+void JIT::emit_op_rshift(Instruction* currentInstruction)
{
+ unsigned result = currentInstruction[1].u.operand;
+ unsigned op1 = currentInstruction[2].u.operand;
+ unsigned op2 = currentInstruction[3].u.operand;
+
if (isOperandConstantImmediateInt(op2)) {
- emitGetVirtualRegister(op1, X86::eax);
- emitJumpSlowCaseIfNotImmediateInteger(X86::eax);
+ // isOperandConstantImmediateInt(op2) => 1 SlowCase
+ emitGetVirtualRegister(op1, regT0);
+ emitJumpSlowCaseIfNotImmediateInteger(regT0);
// Mask with 0x1f as per ecma-262 11.7.2 step 7.
-#if USE(ALTERNATE_JSIMMEDIATE)
- rshift32(Imm32(getConstantOperandImmediateInt(op2) & 0x1f), X86::eax);
-#else
- rshiftPtr(Imm32(getConstantOperandImmediateInt(op2) & 0x1f), X86::eax);
-#endif
+ rshift32(Imm32(getConstantOperandImmediateInt(op2) & 0x1f), regT0);
} else {
- emitGetVirtualRegisters(op1, X86::eax, op2, X86::ecx);
- emitJumpSlowCaseIfNotImmediateInteger(X86::eax);
- emitJumpSlowCaseIfNotImmediateInteger(X86::ecx);
- emitFastArithImmToInt(X86::ecx);
-#if !PLATFORM(X86)
- // Mask with 0x1f as per ecma-262 11.7.2 step 7.
- // On 32-bit x86 this is not necessary, since the shift anount is implicitly masked in the instruction.
- and32(Imm32(0x1f), X86::ecx);
-#endif
-#if USE(ALTERNATE_JSIMMEDIATE)
- rshift32(X86::ecx, X86::eax);
-#else
- rshiftPtr(X86::ecx, X86::eax);
-#endif
+ emitGetVirtualRegisters(op1, regT0, op2, regT2);
+ if (supportsFloatingPointTruncate()) {
+ Jump lhsIsInt = emitJumpIfImmediateInteger(regT0);
+ // supportsFloatingPoint() && USE(JSVALUE64) => 3 SlowCases
+ addSlowCase(emitJumpIfNotImmediateNumber(regT0));
+ add64(tagTypeNumberRegister, regT0);
+ move64ToDouble(regT0, fpRegT0);
+ addSlowCase(branchTruncateDoubleToInt32(fpRegT0, regT0));
+ lhsIsInt.link(this);
+ emitJumpSlowCaseIfNotImmediateInteger(regT2);
+ } else {
+ // !supportsFloatingPoint() => 2 SlowCases
+ emitJumpSlowCaseIfNotImmediateInteger(regT0);
+ emitJumpSlowCaseIfNotImmediateInteger(regT2);
+ }
+ emitFastArithImmToInt(regT2);
+ rshift32(regT2, regT0);
}
-#if USE(ALTERNATE_JSIMMEDIATE)
- emitFastArithIntToImmNoCheck(X86::eax, X86::eax);
-#else
- orPtr(Imm32(JSImmediate::TagTypeNumber), X86::eax);
-#endif
+ emitFastArithIntToImmNoCheck(regT0, regT0);
emitPutVirtualRegister(result);
}
-void JIT::compileFastArithSlow_op_rshift(unsigned result, unsigned, unsigned op2, Vector<SlowCaseEntry>::iterator& iter)
+
+void JIT::emitSlow_op_rshift(Instruction* currentInstruction, Vector<SlowCaseEntry>::iterator& iter)
{
- linkSlowCase(iter);
- if (isOperandConstantImmediateInt(op2))
- emitPutJITStubArgFromVirtualRegister(op2, 2, X86::ecx);
- else {
+ unsigned result = currentInstruction[1].u.operand;
+ unsigned op1 = currentInstruction[2].u.operand;
+ unsigned op2 = currentInstruction[3].u.operand;
+
+ JITStubCall stubCall(this, cti_op_rshift);
+
+ if (isOperandConstantImmediateInt(op2)) {
linkSlowCase(iter);
- emitPutJITStubArg(X86::ecx, 2);
+ stubCall.addArgument(regT0);
+ stubCall.addArgument(op2, regT2);
+ } else {
+ if (supportsFloatingPointTruncate()) {
+ linkSlowCase(iter);
+ linkSlowCase(iter);
+ linkSlowCase(iter);
+ // We're reloading op1 to regT0 as we can no longer guarantee that
+ // we have not munged the operand. It may have already been shifted
+ // correctly, but it still will not have been tagged.
+ stubCall.addArgument(op1, regT0);
+ stubCall.addArgument(regT2);
+ } else {
+ linkSlowCase(iter);
+ linkSlowCase(iter);
+ stubCall.addArgument(regT0);
+ stubCall.addArgument(regT2);
+ }
}
- emitPutJITStubArg(X86::eax, 1);
- emitCTICall(Interpreter::cti_op_rshift);
- emitPutVirtualRegister(result);
+ stubCall.call(result);
}
-void JIT::compileFastArith_op_bitand(unsigned result, unsigned op1, unsigned op2)
+void JIT::emit_op_urshift(Instruction* currentInstruction)
{
- if (isOperandConstantImmediateInt(op1)) {
- emitGetVirtualRegister(op2, X86::eax);
- emitJumpSlowCaseIfNotImmediateInteger(X86::eax);
-#if USE(ALTERNATE_JSIMMEDIATE)
- int32_t imm = getConstantOperandImmediateInt(op1);
- andPtr(Imm32(imm), X86::eax);
- if (imm >= 0)
- emitFastArithIntToImmNoCheck(X86::eax, X86::eax);
-#else
- andPtr(Imm32(static_cast<int32_t>(JSImmediate::rawValue(getConstantOperand(op1)))), X86::eax);
-#endif
- } else if (isOperandConstantImmediateInt(op2)) {
- emitGetVirtualRegister(op1, X86::eax);
- emitJumpSlowCaseIfNotImmediateInteger(X86::eax);
-#if USE(ALTERNATE_JSIMMEDIATE)
- int32_t imm = getConstantOperandImmediateInt(op2);
- andPtr(Imm32(imm), X86::eax);
- if (imm >= 0)
- emitFastArithIntToImmNoCheck(X86::eax, X86::eax);
-#else
- andPtr(Imm32(static_cast<int32_t>(JSImmediate::rawValue(getConstantOperand(op2)))), X86::eax);
-#endif
- } else {
- emitGetVirtualRegisters(op1, X86::eax, op2, X86::edx);
- andPtr(X86::edx, X86::eax);
- emitJumpSlowCaseIfNotImmediateInteger(X86::eax);
+ unsigned dst = currentInstruction[1].u.operand;
+ unsigned op1 = currentInstruction[2].u.operand;
+ unsigned op2 = currentInstruction[3].u.operand;
+
+ // Slow case of urshift makes assumptions about what registers hold the
+ // shift arguments, so any changes must be updated there as well.
+ if (isOperandConstantImmediateInt(op2)) {
+ emitGetVirtualRegister(op1, regT0);
+ emitJumpSlowCaseIfNotImmediateInteger(regT0);
+ emitFastArithImmToInt(regT0);
+ int shift = getConstantOperand(op2).asInt32();
+ if (shift)
+ urshift32(Imm32(shift & 0x1f), regT0);
+ // unsigned shift < 0 or shift = k*2^32 may result in (essentially)
+ // a toUint conversion, which can result in a value we can represent
+ // as an immediate int.
+ if (shift < 0 || !(shift & 31))
+ addSlowCase(branch32(LessThan, regT0, TrustedImm32(0)));
+ emitFastArithReTagImmediate(regT0, regT0);
+ emitPutVirtualRegister(dst, regT0);
+ return;
}
- emitPutVirtualRegister(result);
+ emitGetVirtualRegisters(op1, regT0, op2, regT1);
+ if (!isOperandConstantImmediateInt(op1))
+ emitJumpSlowCaseIfNotImmediateInteger(regT0);
+ emitJumpSlowCaseIfNotImmediateInteger(regT1);
+ emitFastArithImmToInt(regT0);
+ emitFastArithImmToInt(regT1);
+ urshift32(regT1, regT0);
+ addSlowCase(branch32(LessThan, regT0, TrustedImm32(0)));
+ emitFastArithReTagImmediate(regT0, regT0);
+ emitPutVirtualRegister(dst, regT0);
}
-void JIT::compileFastArithSlow_op_bitand(unsigned result, unsigned op1, unsigned op2, Vector<SlowCaseEntry>::iterator& iter)
+
+void JIT::emitSlow_op_urshift(Instruction* currentInstruction, Vector<SlowCaseEntry>::iterator& iter)
{
- linkSlowCase(iter);
- if (isOperandConstantImmediateInt(op1)) {
- emitPutJITStubArgFromVirtualRegister(op1, 1, X86::ecx);
- emitPutJITStubArg(X86::eax, 2);
- } else if (isOperandConstantImmediateInt(op2)) {
- emitPutJITStubArg(X86::eax, 1);
- emitPutJITStubArgFromVirtualRegister(op2, 2, X86::ecx);
+ unsigned dst = currentInstruction[1].u.operand;
+ unsigned op1 = currentInstruction[2].u.operand;
+ unsigned op2 = currentInstruction[3].u.operand;
+ if (isOperandConstantImmediateInt(op2)) {
+ int shift = getConstantOperand(op2).asInt32();
+ // op1 = regT0
+ linkSlowCase(iter); // int32 check
+ if (supportsFloatingPointTruncate()) {
+ JumpList failures;
+ failures.append(emitJumpIfNotImmediateNumber(regT0)); // op1 is not a double
+ add64(tagTypeNumberRegister, regT0);
+ move64ToDouble(regT0, fpRegT0);
+ failures.append(branchTruncateDoubleToInt32(fpRegT0, regT0));
+ if (shift)
+ urshift32(Imm32(shift & 0x1f), regT0);
+ if (shift < 0 || !(shift & 31))
+ failures.append(branch32(LessThan, regT0, TrustedImm32(0)));
+ emitFastArithReTagImmediate(regT0, regT0);
+ emitPutVirtualRegister(dst, regT0);
+ emitJumpSlowToHot(jump(), OPCODE_LENGTH(op_rshift));
+ failures.link(this);
+ }
+ if (shift < 0 || !(shift & 31))
+ linkSlowCase(iter); // failed to box in hot path
} else {
- emitPutJITStubArgFromVirtualRegister(op1, 1, X86::ecx);
- emitPutJITStubArg(X86::edx, 2);
+ // op1 = regT0
+ // op2 = regT1
+ if (!isOperandConstantImmediateInt(op1)) {
+ linkSlowCase(iter); // int32 check -- op1 is not an int
+ if (supportsFloatingPointTruncate()) {
+ JumpList failures;
+ failures.append(emitJumpIfNotImmediateNumber(regT0)); // op1 is not a double
+ add64(tagTypeNumberRegister, regT0);
+ move64ToDouble(regT0, fpRegT0);
+ failures.append(branchTruncateDoubleToInt32(fpRegT0, regT0));
+ failures.append(emitJumpIfNotImmediateInteger(regT1)); // op2 is not an int
+ emitFastArithImmToInt(regT1);
+ urshift32(regT1, regT0);
+ failures.append(branch32(LessThan, regT0, TrustedImm32(0)));
+ emitFastArithReTagImmediate(regT0, regT0);
+ emitPutVirtualRegister(dst, regT0);
+ emitJumpSlowToHot(jump(), OPCODE_LENGTH(op_rshift));
+ failures.link(this);
+ }
+ }
+
+ linkSlowCase(iter); // int32 check - op2 is not an int
+ linkSlowCase(iter); // Can't represent unsigned result as an immediate
}
- emitCTICall(Interpreter::cti_op_bitand);
- emitPutVirtualRegister(result);
+
+ JITStubCall stubCall(this, cti_op_urshift);
+ stubCall.addArgument(op1, regT0);
+ stubCall.addArgument(op2, regT1);
+ stubCall.call(dst);
}
-void JIT::compileFastArith_op_mod(unsigned result, unsigned op1, unsigned op2)
+void JIT::emit_compareAndJump(OpcodeID, unsigned op1, unsigned op2, unsigned target, RelationalCondition condition)
{
- emitGetVirtualRegisters(op1, X86::eax, op2, X86::ecx);
- emitJumpSlowCaseIfNotImmediateInteger(X86::eax);
- emitJumpSlowCaseIfNotImmediateInteger(X86::ecx);
-#if USE(ALTERNATE_JSIMMEDIATE)
- addSlowCase(jePtr(X86::ecx, ImmPtr(JSValuePtr::encode(js0()))));
- mod32(X86::ecx, X86::eax, X86::edx);
-#else
- emitFastArithDeTagImmediate(X86::eax);
- addSlowCase(emitFastArithDeTagImmediateJumpIfZero(X86::ecx));
- mod32(X86::ecx, X86::eax, X86::edx);
- signExtend32ToPtr(X86::edx, X86::edx);
-#endif
- emitFastArithReTagImmediate(X86::edx, X86::eax);
- emitPutVirtualRegister(result);
-}
-void JIT::compileFastArithSlow_op_mod(unsigned result, unsigned, unsigned, Vector<SlowCaseEntry>::iterator& iter)
-{
-#if USE(ALTERNATE_JSIMMEDIATE)
- linkSlowCase(iter);
- linkSlowCase(iter);
- linkSlowCase(iter);
-#else
- Jump notImm1 = getSlowCase(iter);
- Jump notImm2 = getSlowCase(iter);
- linkSlowCase(iter);
- emitFastArithReTagImmediate(X86::eax, X86::eax);
- emitFastArithReTagImmediate(X86::ecx, X86::ecx);
- notImm1.link(this);
- notImm2.link(this);
-#endif
- emitPutJITStubArg(X86::eax, 1);
- emitPutJITStubArg(X86::ecx, 2);
- emitCTICall(Interpreter::cti_op_mod);
- emitPutVirtualRegister(result);
-}
+ // We generate inline code for the following cases in the fast path:
+ // - int immediate to constant int immediate
+ // - constant int immediate to int immediate
+ // - int immediate to int immediate
+
+ if (isOperandConstantImmediateChar(op1)) {
+ emitGetVirtualRegister(op2, regT0);
+ addSlowCase(emitJumpIfNotJSCell(regT0));
+ JumpList failures;
+ emitLoadCharacterString(regT0, regT0, failures);
+ addSlowCase(failures);
+ addJump(branch32(commute(condition), regT0, Imm32(asString(getConstantOperand(op1))->tryGetValue()[0])), target);
+ return;
+ }
+ if (isOperandConstantImmediateChar(op2)) {
+ emitGetVirtualRegister(op1, regT0);
+ addSlowCase(emitJumpIfNotJSCell(regT0));
+ JumpList failures;
+ emitLoadCharacterString(regT0, regT0, failures);
+ addSlowCase(failures);
+ addJump(branch32(condition, regT0, Imm32(asString(getConstantOperand(op2))->tryGetValue()[0])), target);
+ return;
+ }
+ if (isOperandConstantImmediateInt(op2)) {
+ emitGetVirtualRegister(op1, regT0);
+ emitJumpSlowCaseIfNotImmediateInteger(regT0);
+ int32_t op2imm = getConstantOperandImmediateInt(op2);
+ addJump(branch32(condition, regT0, Imm32(op2imm)), target);
+ } else if (isOperandConstantImmediateInt(op1)) {
+ emitGetVirtualRegister(op2, regT1);
+ emitJumpSlowCaseIfNotImmediateInteger(regT1);
+ int32_t op1imm = getConstantOperandImmediateInt(op1);
+ addJump(branch32(commute(condition), regT1, Imm32(op1imm)), target);
+ } else {
+ emitGetVirtualRegisters(op1, regT0, op2, regT1);
+ emitJumpSlowCaseIfNotImmediateInteger(regT0);
+ emitJumpSlowCaseIfNotImmediateInteger(regT1);
-void JIT::compileFastArith_op_post_inc(unsigned result, unsigned srcDst)
-{
- emitGetVirtualRegister(srcDst, X86::eax);
- move(X86::eax, X86::edx);
- emitJumpSlowCaseIfNotImmediateInteger(X86::eax);
-#if USE(ALTERNATE_JSIMMEDIATE)
- addSlowCase(joAdd32(Imm32(1), X86::edx));
- emitFastArithIntToImmNoCheck(X86::edx, X86::edx);
-#else
- addSlowCase(joAdd32(Imm32(1 << JSImmediate::IntegerPayloadShift), X86::edx));
- signExtend32ToPtr(X86::edx, X86::edx);
-#endif
- emitPutVirtualRegister(srcDst, X86::edx);
- emitPutVirtualRegister(result);
+ addJump(branch32(condition, regT0, regT1), target);
+ }
}
-void JIT::compileFastArithSlow_op_post_inc(unsigned result, unsigned srcDst, Vector<SlowCaseEntry>::iterator& iter)
+
+void JIT::emit_compareAndJumpSlow(unsigned op1, unsigned op2, unsigned target, DoubleCondition condition, int (JIT_STUB *stub)(STUB_ARGS_DECLARATION), bool invert, Vector<SlowCaseEntry>::iterator& iter)
{
- linkSlowCase(iter);
- linkSlowCase(iter);
- emitPutJITStubArg(X86::eax, 1);
- emitCTICall(Interpreter::cti_op_post_inc);
- emitPutVirtualRegister(srcDst, X86::edx);
- emitPutVirtualRegister(result);
+ COMPILE_ASSERT(OPCODE_LENGTH(op_jless) == OPCODE_LENGTH(op_jlesseq), OPCODE_LENGTH_op_jlesseq_equals_op_jless);
+ COMPILE_ASSERT(OPCODE_LENGTH(op_jless) == OPCODE_LENGTH(op_jnless), OPCODE_LENGTH_op_jnless_equals_op_jless);
+ COMPILE_ASSERT(OPCODE_LENGTH(op_jless) == OPCODE_LENGTH(op_jnlesseq), OPCODE_LENGTH_op_jnlesseq_equals_op_jless);
+ COMPILE_ASSERT(OPCODE_LENGTH(op_jless) == OPCODE_LENGTH(op_jgreater), OPCODE_LENGTH_op_jgreater_equals_op_jless);
+ COMPILE_ASSERT(OPCODE_LENGTH(op_jless) == OPCODE_LENGTH(op_jgreatereq), OPCODE_LENGTH_op_jgreatereq_equals_op_jless);
+ COMPILE_ASSERT(OPCODE_LENGTH(op_jless) == OPCODE_LENGTH(op_jngreater), OPCODE_LENGTH_op_jngreater_equals_op_jless);
+ COMPILE_ASSERT(OPCODE_LENGTH(op_jless) == OPCODE_LENGTH(op_jngreatereq), OPCODE_LENGTH_op_jngreatereq_equals_op_jless);
+
+ // We generate inline code for the following cases in the slow path:
+ // - floating-point number to constant int immediate
+ // - constant int immediate to floating-point number
+ // - floating-point number to floating-point number.
+ if (isOperandConstantImmediateChar(op1) || isOperandConstantImmediateChar(op2)) {
+ linkSlowCase(iter);
+ linkSlowCase(iter);
+ linkSlowCase(iter);
+ linkSlowCase(iter);
+ JITStubCall stubCall(this, stub);
+ stubCall.addArgument(op1, regT0);
+ stubCall.addArgument(op2, regT1);
+ stubCall.call();
+ emitJumpSlowToHot(branchTest32(invert ? Zero : NonZero, regT0), target);
+ return;
+ }
+
+ if (isOperandConstantImmediateInt(op2)) {
+ linkSlowCase(iter);
+
+ if (supportsFloatingPoint()) {
+ Jump fail1 = emitJumpIfNotImmediateNumber(regT0);
+ add64(tagTypeNumberRegister, regT0);
+ move64ToDouble(regT0, fpRegT0);
+
+ int32_t op2imm = getConstantOperand(op2).asInt32();
+
+ move(Imm32(op2imm), regT1);
+ convertInt32ToDouble(regT1, fpRegT1);
+
+ emitJumpSlowToHot(branchDouble(condition, fpRegT0, fpRegT1), target);
+
+ emitJumpSlowToHot(jump(), OPCODE_LENGTH(op_jless));
+
+ fail1.link(this);
+ }
+
+ JITStubCall stubCall(this, stub);
+ stubCall.addArgument(regT0);
+ stubCall.addArgument(op2, regT2);
+ stubCall.call();
+ emitJumpSlowToHot(branchTest32(invert ? Zero : NonZero, regT0), target);
+
+ } else if (isOperandConstantImmediateInt(op1)) {
+ linkSlowCase(iter);
+
+ if (supportsFloatingPoint()) {
+ Jump fail1 = emitJumpIfNotImmediateNumber(regT1);
+ add64(tagTypeNumberRegister, regT1);
+ move64ToDouble(regT1, fpRegT1);
+
+ int32_t op1imm = getConstantOperand(op1).asInt32();
+
+ move(Imm32(op1imm), regT0);
+ convertInt32ToDouble(regT0, fpRegT0);
+
+ emitJumpSlowToHot(branchDouble(condition, fpRegT0, fpRegT1), target);
+
+ emitJumpSlowToHot(jump(), OPCODE_LENGTH(op_jless));
+
+ fail1.link(this);
+ }
+
+ JITStubCall stubCall(this, stub);
+ stubCall.addArgument(op1, regT2);
+ stubCall.addArgument(regT1);
+ stubCall.call();
+ emitJumpSlowToHot(branchTest32(invert ? Zero : NonZero, regT0), target);
+ } else {
+ linkSlowCase(iter);
+
+ if (supportsFloatingPoint()) {
+ Jump fail1 = emitJumpIfNotImmediateNumber(regT0);
+ Jump fail2 = emitJumpIfNotImmediateNumber(regT1);
+ Jump fail3 = emitJumpIfImmediateInteger(regT1);
+ add64(tagTypeNumberRegister, regT0);
+ add64(tagTypeNumberRegister, regT1);
+ move64ToDouble(regT0, fpRegT0);
+ move64ToDouble(regT1, fpRegT1);
+
+ emitJumpSlowToHot(branchDouble(condition, fpRegT0, fpRegT1), target);
+
+ emitJumpSlowToHot(jump(), OPCODE_LENGTH(op_jless));
+
+ fail1.link(this);
+ fail2.link(this);
+ fail3.link(this);
+ }
+
+ linkSlowCase(iter);
+ JITStubCall stubCall(this, stub);
+ stubCall.addArgument(regT0);
+ stubCall.addArgument(regT1);
+ stubCall.call();
+ emitJumpSlowToHot(branchTest32(invert ? Zero : NonZero, regT0), target);
+ }
}
-void JIT::compileFastArith_op_post_dec(unsigned result, unsigned srcDst)
+void JIT::emit_op_bitand(Instruction* currentInstruction)
{
- emitGetVirtualRegister(srcDst, X86::eax);
- move(X86::eax, X86::edx);
- emitJumpSlowCaseIfNotImmediateInteger(X86::eax);
-#if USE(ALTERNATE_JSIMMEDIATE)
- addSlowCase(joSub32(Imm32(1), X86::edx));
- emitFastArithIntToImmNoCheck(X86::edx, X86::edx);
-#else
- addSlowCase(joSub32(Imm32(1 << JSImmediate::IntegerPayloadShift), X86::edx));
- signExtend32ToPtr(X86::edx, X86::edx);
-#endif
- emitPutVirtualRegister(srcDst, X86::edx);
+ unsigned result = currentInstruction[1].u.operand;
+ unsigned op1 = currentInstruction[2].u.operand;
+ unsigned op2 = currentInstruction[3].u.operand;
+
+ if (isOperandConstantImmediateInt(op1)) {
+ emitGetVirtualRegister(op2, regT0);
+ emitJumpSlowCaseIfNotImmediateInteger(regT0);
+ int32_t imm = getConstantOperandImmediateInt(op1);
+ and64(Imm32(imm), regT0);
+ if (imm >= 0)
+ emitFastArithIntToImmNoCheck(regT0, regT0);
+ } else if (isOperandConstantImmediateInt(op2)) {
+ emitGetVirtualRegister(op1, regT0);
+ emitJumpSlowCaseIfNotImmediateInteger(regT0);
+ int32_t imm = getConstantOperandImmediateInt(op2);
+ and64(Imm32(imm), regT0);
+ if (imm >= 0)
+ emitFastArithIntToImmNoCheck(regT0, regT0);
+ } else {
+ emitGetVirtualRegisters(op1, regT0, op2, regT1);
+ and64(regT1, regT0);
+ emitJumpSlowCaseIfNotImmediateInteger(regT0);
+ }
emitPutVirtualRegister(result);
}
-void JIT::compileFastArithSlow_op_post_dec(unsigned result, unsigned srcDst, Vector<SlowCaseEntry>::iterator& iter)
+
+void JIT::emitSlow_op_bitand(Instruction* currentInstruction, Vector<SlowCaseEntry>::iterator& iter)
{
+ unsigned result = currentInstruction[1].u.operand;
+ unsigned op1 = currentInstruction[2].u.operand;
+ unsigned op2 = currentInstruction[3].u.operand;
+
linkSlowCase(iter);
- linkSlowCase(iter);
- emitPutJITStubArg(X86::eax, 1);
- emitCTICall(Interpreter::cti_op_post_dec);
- emitPutVirtualRegister(srcDst, X86::edx);
- emitPutVirtualRegister(result);
+ if (isOperandConstantImmediateInt(op1)) {
+ JITStubCall stubCall(this, cti_op_bitand);
+ stubCall.addArgument(op1, regT2);
+ stubCall.addArgument(regT0);
+ stubCall.call(result);
+ } else if (isOperandConstantImmediateInt(op2)) {
+ JITStubCall stubCall(this, cti_op_bitand);
+ stubCall.addArgument(regT0);
+ stubCall.addArgument(op2, regT2);
+ stubCall.call(result);
+ } else {
+ JITStubCall stubCall(this, cti_op_bitand);
+ stubCall.addArgument(op1, regT2);
+ stubCall.addArgument(regT1);
+ stubCall.call(result);
+ }
}
-void JIT::compileFastArith_op_pre_inc(unsigned srcDst)
+void JIT::emit_op_inc(Instruction* currentInstruction)
{
- emitGetVirtualRegister(srcDst, X86::eax);
- emitJumpSlowCaseIfNotImmediateInteger(X86::eax);
-#if USE(ALTERNATE_JSIMMEDIATE)
- addSlowCase(joAdd32(Imm32(1), X86::eax));
- emitFastArithIntToImmNoCheck(X86::eax, X86::eax);
-#else
- addSlowCase(joAdd32(Imm32(1 << JSImmediate::IntegerPayloadShift), X86::eax));
- signExtend32ToPtr(X86::eax, X86::eax);
-#endif
+ unsigned srcDst = currentInstruction[1].u.operand;
+
+ emitGetVirtualRegister(srcDst, regT0);
+ emitJumpSlowCaseIfNotImmediateInteger(regT0);
+ addSlowCase(branchAdd32(Overflow, TrustedImm32(1), regT0));
+ emitFastArithIntToImmNoCheck(regT0, regT0);
emitPutVirtualRegister(srcDst);
}
-void JIT::compileFastArithSlow_op_pre_inc(unsigned srcDst, Vector<SlowCaseEntry>::iterator& iter)
+
+void JIT::emitSlow_op_inc(Instruction* currentInstruction, Vector<SlowCaseEntry>::iterator& iter)
{
+ unsigned srcDst = currentInstruction[1].u.operand;
+
Jump notImm = getSlowCase(iter);
linkSlowCase(iter);
- emitGetVirtualRegister(srcDst, X86::eax);
+ emitGetVirtualRegister(srcDst, regT0);
notImm.link(this);
- emitPutJITStubArg(X86::eax, 1);
- emitCTICall(Interpreter::cti_op_pre_inc);
- emitPutVirtualRegister(srcDst);
+ JITStubCall stubCall(this, cti_op_inc);
+ stubCall.addArgument(regT0);
+ stubCall.call(srcDst);
}
-void JIT::compileFastArith_op_pre_dec(unsigned srcDst)
+void JIT::emit_op_dec(Instruction* currentInstruction)
{
- emitGetVirtualRegister(srcDst, X86::eax);
- emitJumpSlowCaseIfNotImmediateInteger(X86::eax);
-#if USE(ALTERNATE_JSIMMEDIATE)
- addSlowCase(joSub32(Imm32(1), X86::eax));
- emitFastArithIntToImmNoCheck(X86::eax, X86::eax);
-#else
- addSlowCase(joSub32(Imm32(1 << JSImmediate::IntegerPayloadShift), X86::eax));
- signExtend32ToPtr(X86::eax, X86::eax);
-#endif
+ unsigned srcDst = currentInstruction[1].u.operand;
+
+ emitGetVirtualRegister(srcDst, regT0);
+ emitJumpSlowCaseIfNotImmediateInteger(regT0);
+ addSlowCase(branchSub32(Overflow, TrustedImm32(1), regT0));
+ emitFastArithIntToImmNoCheck(regT0, regT0);
emitPutVirtualRegister(srcDst);
}
-void JIT::compileFastArithSlow_op_pre_dec(unsigned srcDst, Vector<SlowCaseEntry>::iterator& iter)
+
+void JIT::emitSlow_op_dec(Instruction* currentInstruction, Vector<SlowCaseEntry>::iterator& iter)
{
+ unsigned srcDst = currentInstruction[1].u.operand;
+
Jump notImm = getSlowCase(iter);
linkSlowCase(iter);
- emitGetVirtualRegister(srcDst, X86::eax);
+ emitGetVirtualRegister(srcDst, regT0);
notImm.link(this);
- emitPutJITStubArg(X86::eax, 1);
- emitCTICall(Interpreter::cti_op_pre_dec);
- emitPutVirtualRegister(srcDst);
+ JITStubCall stubCall(this, cti_op_dec);
+ stubCall.addArgument(regT0);
+ stubCall.call(srcDst);
}
+/* ------------------------------ BEGIN: OP_MOD ------------------------------ */
-#if !ENABLE(JIT_OPTIMIZE_ARITHMETIC)
+#if CPU(X86) || CPU(X86_64)
-void JIT::compileFastArith_op_add(Instruction* currentInstruction)
+void JIT::emit_op_mod(Instruction* currentInstruction)
{
unsigned result = currentInstruction[1].u.operand;
unsigned op1 = currentInstruction[2].u.operand;
unsigned op2 = currentInstruction[3].u.operand;
- emitPutJITStubArgFromVirtualRegister(op1, 1, X86::ecx);
- emitPutJITStubArgFromVirtualRegister(op2, 2, X86::ecx);
- emitCTICall(Interpreter::cti_op_add);
+ // Make sure registers are correct for x86 IDIV instructions.
+ ASSERT(regT0 == X86Registers::eax);
+ ASSERT(regT1 == X86Registers::edx);
+ ASSERT(regT2 == X86Registers::ecx);
+
+ emitGetVirtualRegisters(op1, regT3, op2, regT2);
+ emitJumpSlowCaseIfNotImmediateInteger(regT3);
+ emitJumpSlowCaseIfNotImmediateInteger(regT2);
+
+ move(regT3, regT0);
+ addSlowCase(branchTest32(Zero, regT2));
+ Jump denominatorNotNeg1 = branch32(NotEqual, regT2, TrustedImm32(-1));
+ addSlowCase(branch32(Equal, regT0, TrustedImm32(-2147483647-1)));
+ denominatorNotNeg1.link(this);
+ m_assembler.cdq();
+ m_assembler.idivl_r(regT2);
+ Jump numeratorPositive = branch32(GreaterThanOrEqual, regT3, TrustedImm32(0));
+ addSlowCase(branchTest32(Zero, regT1));
+ numeratorPositive.link(this);
+ emitFastArithReTagImmediate(regT1, regT0);
emitPutVirtualRegister(result);
}
-void JIT::compileFastArithSlow_op_add(Instruction*, Vector<SlowCaseEntry>::iterator&)
-{
- ASSERT_NOT_REACHED();
-}
-void JIT::compileFastArith_op_mul(Instruction* currentInstruction)
+void JIT::emitSlow_op_mod(Instruction* currentInstruction, Vector<SlowCaseEntry>::iterator& iter)
{
unsigned result = currentInstruction[1].u.operand;
- unsigned op1 = currentInstruction[2].u.operand;
- unsigned op2 = currentInstruction[3].u.operand;
- emitPutJITStubArgFromVirtualRegister(op1, 1, X86::ecx);
- emitPutJITStubArgFromVirtualRegister(op2, 2, X86::ecx);
- emitCTICall(Interpreter::cti_op_mul);
- emitPutVirtualRegister(result);
-}
-void JIT::compileFastArithSlow_op_mul(Instruction*, Vector<SlowCaseEntry>::iterator&)
-{
- ASSERT_NOT_REACHED();
+ linkSlowCase(iter);
+ linkSlowCase(iter);
+ linkSlowCase(iter);
+ linkSlowCase(iter);
+ linkSlowCase(iter);
+ JITStubCall stubCall(this, cti_op_mod);
+ stubCall.addArgument(regT3);
+ stubCall.addArgument(regT2);
+ stubCall.call(result);
}
-void JIT::compileFastArith_op_sub(Instruction* currentInstruction)
+#else // CPU(X86) || CPU(X86_64)
+
+void JIT::emit_op_mod(Instruction* currentInstruction)
{
unsigned result = currentInstruction[1].u.operand;
unsigned op1 = currentInstruction[2].u.operand;
unsigned op2 = currentInstruction[3].u.operand;
- emitPutJITStubArgFromVirtualRegister(op1, 1, X86::ecx);
- emitPutJITStubArgFromVirtualRegister(op2, 2, X86::ecx);
- emitCTICall(Interpreter::cti_op_sub);
- emitPutVirtualRegister(result);
+ JITStubCall stubCall(this, cti_op_mod);
+ stubCall.addArgument(op1, regT2);
+ stubCall.addArgument(op2, regT2);
+ stubCall.call(result);
}
-void JIT::compileFastArithSlow_op_sub(Instruction*, Vector<SlowCaseEntry>::iterator&)
+
+void JIT::emitSlow_op_mod(Instruction*, Vector<SlowCaseEntry>::iterator&)
{
- ASSERT_NOT_REACHED();
+ UNREACHABLE_FOR_PLATFORM();
}
-#elif USE(ALTERNATE_JSIMMEDIATE) // *AND* ENABLE(JIT_OPTIMIZE_ARITHMETIC)
+#endif // CPU(X86) || CPU(X86_64)
+
+/* ------------------------------ END: OP_MOD ------------------------------ */
+
+/* ------------------------------ BEGIN: USE(JSVALUE64) (OP_ADD, OP_SUB, OP_MUL) ------------------------------ */
void JIT::compileBinaryArithOp(OpcodeID opcodeID, unsigned, unsigned op1, unsigned op2, OperandTypes)
{
- emitGetVirtualRegisters(op1, X86::eax, op2, X86::edx);
- emitJumpSlowCaseIfNotImmediateInteger(X86::eax);
- emitJumpSlowCaseIfNotImmediateInteger(X86::edx);
+ emitGetVirtualRegisters(op1, regT0, op2, regT1);
+ emitJumpSlowCaseIfNotImmediateInteger(regT0);
+ emitJumpSlowCaseIfNotImmediateInteger(regT1);
+#if ENABLE(VALUE_PROFILER)
+ RareCaseProfile* profile = m_codeBlock->addSpecialFastCaseProfile(m_bytecodeOffset);
+#endif
if (opcodeID == op_add)
- addSlowCase(joAdd32(X86::edx, X86::eax));
+ addSlowCase(branchAdd32(Overflow, regT1, regT0));
else if (opcodeID == op_sub)
- addSlowCase(joSub32(X86::edx, X86::eax));
+ addSlowCase(branchSub32(Overflow, regT1, regT0));
else {
ASSERT(opcodeID == op_mul);
- addSlowCase(joMul32(X86::edx, X86::eax));
- addSlowCase(jz32(X86::eax));
+#if ENABLE(VALUE_PROFILER)
+ if (shouldEmitProfiling()) {
+ // We want to be able to measure if this is taking the slow case just
+ // because of negative zero. If this produces positive zero, then we
+ // don't want the slow case to be taken because that will throw off
+ // speculative compilation.
+ move(regT0, regT2);
+ addSlowCase(branchMul32(Overflow, regT1, regT2));
+ JumpList done;
+ done.append(branchTest32(NonZero, regT2));
+ Jump negativeZero = branch32(LessThan, regT0, TrustedImm32(0));
+ done.append(branch32(GreaterThanOrEqual, regT1, TrustedImm32(0)));
+ negativeZero.link(this);
+ // We only get here if we have a genuine negative zero. Record this,
+ // so that the speculative JIT knows that we failed speculation
+ // because of a negative zero.
+ add32(TrustedImm32(1), AbsoluteAddress(&profile->m_counter));
+ addSlowCase(jump());
+ done.link(this);
+ move(regT2, regT0);
+ } else {
+ addSlowCase(branchMul32(Overflow, regT1, regT0));
+ addSlowCase(branchTest32(Zero, regT0));
+ }
+#else
+ addSlowCase(branchMul32(Overflow, regT1, regT0));
+ addSlowCase(branchTest32(Zero, regT0));
+#endif
}
- emitFastArithIntToImmNoCheck(X86::eax, X86::eax);
+ emitFastArithIntToImmNoCheck(regT0, regT0);
}
-void JIT::compileBinaryArithOpSlowCase(OpcodeID opcodeID, Vector<SlowCaseEntry>::iterator& iter, unsigned, unsigned op1, unsigned, OperandTypes types)
+void JIT::compileBinaryArithOpSlowCase(OpcodeID opcodeID, Vector<SlowCaseEntry>::iterator& iter, unsigned result, unsigned op1, unsigned op2, OperandTypes types, bool op1HasImmediateIntFastCase, bool op2HasImmediateIntFastCase)
{
// We assume that subtracting TagTypeNumber is equivalent to adding DoubleEncodeOffset.
- COMPILE_ASSERT(((JSImmediate::TagTypeNumber + JSImmediate::DoubleEncodeOffset) == 0), TagTypeNumber_PLUS_DoubleEncodeOffset_EQUALS_0);
-
- Jump notImm1 = getSlowCase(iter);
- Jump notImm2 = getSlowCase(iter);
+ COMPILE_ASSERT(((TagTypeNumber + DoubleEncodeOffset) == 0), TagTypeNumber_PLUS_DoubleEncodeOffset_EQUALS_0);
+
+ Jump notImm1;
+ Jump notImm2;
+ if (op1HasImmediateIntFastCase) {
+ notImm2 = getSlowCase(iter);
+ } else if (op2HasImmediateIntFastCase) {
+ notImm1 = getSlowCase(iter);
+ } else {
+ notImm1 = getSlowCase(iter);
+ notImm2 = getSlowCase(iter);
+ }
linkSlowCase(iter); // Integer overflow case - we could handle this in JIT code, but this is likely rare.
- if (opcodeID == op_mul) // op_mul has an extra slow case to handle 0 * negative number.
+ if (opcodeID == op_mul && !op1HasImmediateIntFastCase && !op2HasImmediateIntFastCase) // op_mul has an extra slow case to handle 0 * negative number.
linkSlowCase(iter);
- emitGetVirtualRegister(op1, X86::eax);
+ emitGetVirtualRegister(op1, regT0);
Label stubFunctionCall(this);
- emitPutJITStubArg(X86::eax, 1);
- emitPutJITStubArg(X86::edx, 2);
- if (opcodeID == op_add)
- emitCTICall(Interpreter::cti_op_add);
- else if (opcodeID == op_sub)
- emitCTICall(Interpreter::cti_op_sub);
- else {
- ASSERT(opcodeID == op_mul);
- emitCTICall(Interpreter::cti_op_mul);
+ JITStubCall stubCall(this, opcodeID == op_add ? cti_op_add : opcodeID == op_sub ? cti_op_sub : cti_op_mul);
+ if (op1HasImmediateIntFastCase || op2HasImmediateIntFastCase) {
+ emitGetVirtualRegister(op1, regT0);
+ emitGetVirtualRegister(op2, regT1);
}
+ stubCall.addArgument(regT0);
+ stubCall.addArgument(regT1);
+ stubCall.call(result);
Jump end = jump();
- // if we get here, eax is not an int32, edx not yet checked.
- notImm1.link(this);
- if (!types.first().definitelyIsNumber())
- emitJumpIfNotImmediateNumber(X86::eax).linkTo(stubFunctionCall, this);
- if (!types.second().definitelyIsNumber())
- emitJumpIfNotImmediateNumber(X86::edx).linkTo(stubFunctionCall, this);
- addPtr(tagTypeNumberRegister, X86::eax);
- m_assembler.movq_rr(X86::eax, X86::xmm1);
- Jump op2isDouble = emitJumpIfNotImmediateInteger(X86::edx);
- m_assembler.cvtsi2sd_rr(X86::edx, X86::xmm2);
- Jump op2wasInteger = jump();
-
- // if we get here, eax IS an int32, edx is not.
- notImm2.link(this);
- if (!types.second().definitelyIsNumber())
- emitJumpIfNotImmediateNumber(X86::edx).linkTo(stubFunctionCall, this);
- m_assembler.cvtsi2sd_rr(X86::eax, X86::xmm1);
- op2isDouble.link(this);
- addPtr(tagTypeNumberRegister, X86::edx);
- m_assembler.movq_rr(X86::edx, X86::xmm2);
- op2wasInteger.link(this);
+ if (op1HasImmediateIntFastCase) {
+ notImm2.link(this);
+ if (!types.second().definitelyIsNumber())
+ emitJumpIfNotImmediateNumber(regT0).linkTo(stubFunctionCall, this);
+ emitGetVirtualRegister(op1, regT1);
+ convertInt32ToDouble(regT1, fpRegT1);
+ add64(tagTypeNumberRegister, regT0);
+ move64ToDouble(regT0, fpRegT2);
+ } else if (op2HasImmediateIntFastCase) {
+ notImm1.link(this);
+ if (!types.first().definitelyIsNumber())
+ emitJumpIfNotImmediateNumber(regT0).linkTo(stubFunctionCall, this);
+ emitGetVirtualRegister(op2, regT1);
+ convertInt32ToDouble(regT1, fpRegT1);
+ add64(tagTypeNumberRegister, regT0);
+ move64ToDouble(regT0, fpRegT2);
+ } else {
+ // if we get here, eax is not an int32, edx not yet checked.
+ notImm1.link(this);
+ if (!types.first().definitelyIsNumber())
+ emitJumpIfNotImmediateNumber(regT0).linkTo(stubFunctionCall, this);
+ if (!types.second().definitelyIsNumber())
+ emitJumpIfNotImmediateNumber(regT1).linkTo(stubFunctionCall, this);
+ add64(tagTypeNumberRegister, regT0);
+ move64ToDouble(regT0, fpRegT1);
+ Jump op2isDouble = emitJumpIfNotImmediateInteger(regT1);
+ convertInt32ToDouble(regT1, fpRegT2);
+ Jump op2wasInteger = jump();
+
+ // if we get here, eax IS an int32, edx is not.
+ notImm2.link(this);
+ if (!types.second().definitelyIsNumber())
+ emitJumpIfNotImmediateNumber(regT1).linkTo(stubFunctionCall, this);
+ convertInt32ToDouble(regT0, fpRegT1);
+ op2isDouble.link(this);
+ add64(tagTypeNumberRegister, regT1);
+ move64ToDouble(regT1, fpRegT2);
+ op2wasInteger.link(this);
+ }
if (opcodeID == op_add)
- m_assembler.addsd_rr(X86::xmm2, X86::xmm1);
+ addDouble(fpRegT2, fpRegT1);
else if (opcodeID == op_sub)
- m_assembler.subsd_rr(X86::xmm2, X86::xmm1);
+ subDouble(fpRegT2, fpRegT1);
+ else if (opcodeID == op_mul)
+ mulDouble(fpRegT2, fpRegT1);
else {
- ASSERT(opcodeID == op_mul);
- m_assembler.mulsd_rr(X86::xmm2, X86::xmm1);
+ ASSERT(opcodeID == op_div);
+ divDouble(fpRegT2, fpRegT1);
}
- m_assembler.movq_rr(X86::xmm1, X86::eax);
- subPtr(tagTypeNumberRegister, X86::eax);
+ moveDoubleTo64(fpRegT1, regT0);
+ sub64(tagTypeNumberRegister, regT0);
+ emitPutVirtualRegister(result, regT0);
end.link(this);
}
-void JIT::compileFastArith_op_add(Instruction* currentInstruction)
+void JIT::emit_op_add(Instruction* currentInstruction)
{
unsigned result = currentInstruction[1].u.operand;
unsigned op1 = currentInstruction[2].u.operand;
OperandTypes types = OperandTypes::fromInt(currentInstruction[4].u.operand);
if (!types.first().mightBeNumber() || !types.second().mightBeNumber()) {
- emitPutJITStubArgFromVirtualRegister(op1, 1, X86::ecx);
- emitPutJITStubArgFromVirtualRegister(op2, 2, X86::ecx);
- emitCTICall(Interpreter::cti_op_add);
- emitPutVirtualRegister(result);
+ addSlowCase();
+ JITStubCall stubCall(this, cti_op_add);
+ stubCall.addArgument(op1, regT2);
+ stubCall.addArgument(op2, regT2);
+ stubCall.call(result);
return;
}
if (isOperandConstantImmediateInt(op1)) {
- emitGetVirtualRegister(op2, X86::eax);
- emitJumpSlowCaseIfNotImmediateInteger(X86::eax);
- addSlowCase(joAdd32(Imm32(getConstantOperandImmediateInt(op1)), X86::eax));
- emitFastArithIntToImmNoCheck(X86::eax, X86::eax);
+ emitGetVirtualRegister(op2, regT0);
+ emitJumpSlowCaseIfNotImmediateInteger(regT0);
+ addSlowCase(branchAdd32(Overflow, regT0, Imm32(getConstantOperandImmediateInt(op1)), regT1));
+ emitFastArithIntToImmNoCheck(regT1, regT0);
} else if (isOperandConstantImmediateInt(op2)) {
- emitGetVirtualRegister(op1, X86::eax);
- emitJumpSlowCaseIfNotImmediateInteger(X86::eax);
- addSlowCase(joAdd32(Imm32(getConstantOperandImmediateInt(op2)), X86::eax));
- emitFastArithIntToImmNoCheck(X86::eax, X86::eax);
+ emitGetVirtualRegister(op1, regT0);
+ emitJumpSlowCaseIfNotImmediateInteger(regT0);
+ addSlowCase(branchAdd32(Overflow, regT0, Imm32(getConstantOperandImmediateInt(op2)), regT1));
+ emitFastArithIntToImmNoCheck(regT1, regT0);
} else
compileBinaryArithOp(op_add, result, op1, op2, types);
emitPutVirtualRegister(result);
}
-void JIT::compileFastArithSlow_op_add(Instruction* currentInstruction, Vector<SlowCaseEntry>::iterator& iter)
+
+void JIT::emitSlow_op_add(Instruction* currentInstruction, Vector<SlowCaseEntry>::iterator& iter)
{
unsigned result = currentInstruction[1].u.operand;
unsigned op1 = currentInstruction[2].u.operand;
unsigned op2 = currentInstruction[3].u.operand;
OperandTypes types = OperandTypes::fromInt(currentInstruction[4].u.operand);
- if (isOperandConstantImmediateInt(op1)) {
- linkSlowCase(iter);
- linkSlowCase(iter);
- emitPutJITStubArgFromVirtualRegister(op1, 1, X86::ecx);
- emitPutJITStubArgFromVirtualRegister(op2, 2, X86::ecx);
- emitCTICall(Interpreter::cti_op_add);
- } else if (isOperandConstantImmediateInt(op2)) {
- linkSlowCase(iter);
- linkSlowCase(iter);
- emitPutJITStubArgFromVirtualRegister(op1, 1, X86::ecx);
- emitPutJITStubArgFromVirtualRegister(op2, 2, X86::ecx);
- emitCTICall(Interpreter::cti_op_add);
- } else
- compileBinaryArithOpSlowCase(op_add, iter, result, op1, op2, types);
+ if (!types.first().mightBeNumber() || !types.second().mightBeNumber()) {
+ linkDummySlowCase(iter);
+ return;
+ }
- emitPutVirtualRegister(result);
+ bool op1HasImmediateIntFastCase = isOperandConstantImmediateInt(op1);
+ bool op2HasImmediateIntFastCase = !op1HasImmediateIntFastCase && isOperandConstantImmediateInt(op2);
+ compileBinaryArithOpSlowCase(op_add, iter, result, op1, op2, types, op1HasImmediateIntFastCase, op2HasImmediateIntFastCase);
}
-void JIT::compileFastArith_op_mul(Instruction* currentInstruction)
+void JIT::emit_op_mul(Instruction* currentInstruction)
{
unsigned result = currentInstruction[1].u.operand;
unsigned op1 = currentInstruction[2].u.operand;
// For now, only plant a fast int case if the constant operand is greater than zero.
int32_t value;
if (isOperandConstantImmediateInt(op1) && ((value = getConstantOperandImmediateInt(op1)) > 0)) {
- emitGetVirtualRegister(op2, X86::eax);
- emitJumpSlowCaseIfNotImmediateInteger(X86::eax);
- addSlowCase(joMul32(Imm32(value), X86::eax, X86::eax));
- emitFastArithReTagImmediate(X86::eax, X86::eax);
+#if ENABLE(VALUE_PROFILER)
+ // Add a special fast case profile because the DFG JIT will expect one.
+ m_codeBlock->addSpecialFastCaseProfile(m_bytecodeOffset);
+#endif
+ emitGetVirtualRegister(op2, regT0);
+ emitJumpSlowCaseIfNotImmediateInteger(regT0);
+ addSlowCase(branchMul32(Overflow, Imm32(value), regT0, regT1));
+ emitFastArithReTagImmediate(regT1, regT0);
} else if (isOperandConstantImmediateInt(op2) && ((value = getConstantOperandImmediateInt(op2)) > 0)) {
- emitGetVirtualRegister(op1, X86::eax);
- emitJumpSlowCaseIfNotImmediateInteger(X86::eax);
- addSlowCase(joMul32(Imm32(value), X86::eax, X86::eax));
- emitFastArithReTagImmediate(X86::eax, X86::eax);
+#if ENABLE(VALUE_PROFILER)
+ // Add a special fast case profile because the DFG JIT will expect one.
+ m_codeBlock->addSpecialFastCaseProfile(m_bytecodeOffset);
+#endif
+ emitGetVirtualRegister(op1, regT0);
+ emitJumpSlowCaseIfNotImmediateInteger(regT0);
+ addSlowCase(branchMul32(Overflow, Imm32(value), regT0, regT1));
+ emitFastArithReTagImmediate(regT1, regT0);
} else
compileBinaryArithOp(op_mul, result, op1, op2, types);
emitPutVirtualRegister(result);
}
-void JIT::compileFastArithSlow_op_mul(Instruction* currentInstruction, Vector<SlowCaseEntry>::iterator& iter)
-{
- unsigned result = currentInstruction[1].u.operand;
- unsigned op1 = currentInstruction[2].u.operand;
- unsigned op2 = currentInstruction[3].u.operand;
- OperandTypes types = OperandTypes::fromInt(currentInstruction[4].u.operand);
-
- if ((isOperandConstantImmediateInt(op1) && (getConstantOperandImmediateInt(op1) > 0))
- || (isOperandConstantImmediateInt(op2) && (getConstantOperandImmediateInt(op2) > 0))) {
- linkSlowCase(iter);
- linkSlowCase(iter);
- // There is an extra slow case for (op1 * -N) or (-N * op2), to check for 0 since this should produce a result of -0.
- emitPutJITStubArgFromVirtualRegister(op1, 1, X86::ecx);
- emitPutJITStubArgFromVirtualRegister(op2, 2, X86::ecx);
- emitCTICall(Interpreter::cti_op_mul);
- } else
- compileBinaryArithOpSlowCase(op_mul, iter, result, op1, op2, types);
-
- emitPutVirtualRegister(result);
-}
-void JIT::compileFastArith_op_sub(Instruction* currentInstruction)
+void JIT::emitSlow_op_mul(Instruction* currentInstruction, Vector<SlowCaseEntry>::iterator& iter)
{
unsigned result = currentInstruction[1].u.operand;
unsigned op1 = currentInstruction[2].u.operand;
unsigned op2 = currentInstruction[3].u.operand;
OperandTypes types = OperandTypes::fromInt(currentInstruction[4].u.operand);
- compileBinaryArithOp(op_sub, result, op1, op2, types);
-
- emitPutVirtualRegister(result);
+ bool op1HasImmediateIntFastCase = isOperandConstantImmediateInt(op1) && getConstantOperandImmediateInt(op1) > 0;
+ bool op2HasImmediateIntFastCase = !op1HasImmediateIntFastCase && isOperandConstantImmediateInt(op2) && getConstantOperandImmediateInt(op2) > 0;
+ compileBinaryArithOpSlowCase(op_mul, iter, result, op1, op2, types, op1HasImmediateIntFastCase, op2HasImmediateIntFastCase);
}
-void JIT::compileFastArithSlow_op_sub(Instruction* currentInstruction, Vector<SlowCaseEntry>::iterator& iter)
+
+void JIT::emit_op_div(Instruction* currentInstruction)
{
- unsigned result = currentInstruction[1].u.operand;
+ unsigned dst = currentInstruction[1].u.operand;
unsigned op1 = currentInstruction[2].u.operand;
unsigned op2 = currentInstruction[3].u.operand;
OperandTypes types = OperandTypes::fromInt(currentInstruction[4].u.operand);
- compileBinaryArithOpSlowCase(op_sub, iter, result, op1, op2, types);
-
- emitPutVirtualRegister(result);
-}
-
-#else
-
-typedef X86Assembler::JmpSrc JmpSrc;
-typedef X86Assembler::JmpDst JmpDst;
-typedef X86Assembler::XMMRegisterID XMMRegisterID;
-
-#if PLATFORM(MAC)
-
-static inline bool isSSE2Present()
-{
- return true; // All X86 Macs are guaranteed to support at least SSE2
-}
-
-#else
-
-static bool isSSE2Present()
-{
- static const int SSE2FeatureBit = 1 << 26;
- struct SSE2Check {
- SSE2Check()
- {
- int flags;
-#if COMPILER(MSVC)
- _asm {
- mov eax, 1 // cpuid function 1 gives us the standard feature set
- cpuid;
- mov flags, edx;
- }
-#else
- flags = 0;
- // FIXME: Add GCC code to do above asm
-#endif
- present = (flags & SSE2FeatureBit) != 0;
- }
- bool present;
- };
- static SSE2Check check;
- return check.present;
-}
-
-#endif
-
-/*
- This is required since number representation is canonical - values representable as a JSImmediate should not be stored in a JSNumberCell.
-
- In the common case, the double value from 'xmmSource' is written to the reusable JSNumberCell pointed to by 'jsNumberCell', then 'jsNumberCell'
- is written to the output SF Register 'dst', and then a jump is planted (stored into *wroteJSNumberCell).
-
- However if the value from xmmSource is representable as a JSImmediate, then the JSImmediate value will be written to the output, and flow
- control will fall through from the code planted.
-*/
-void JIT::putDoubleResultToJSNumberCellOrJSImmediate(X86::XMMRegisterID xmmSource, X86::RegisterID jsNumberCell, unsigned dst, JmpSrc* wroteJSNumberCell, X86::XMMRegisterID tempXmm, X86::RegisterID tempReg1, X86::RegisterID tempReg2)
-{
- // convert (double -> JSImmediate -> double), and check if the value is unchanged - in which case the value is representable as a JSImmediate.
- __ cvttsd2si_rr(xmmSource, tempReg1);
- __ addl_rr(tempReg1, tempReg1);
- __ sarl_i8r(1, tempReg1);
- __ cvtsi2sd_rr(tempReg1, tempXmm);
- // Compare & branch if immediate.
- __ ucomisd_rr(tempXmm, xmmSource);
- JmpSrc resultIsImm = __ je();
- JmpDst resultLookedLikeImmButActuallyIsnt = __ label();
-
- // Store the result to the JSNumberCell and jump.
- __ movsd_rm(xmmSource, FIELD_OFFSET(JSNumberCell, m_value), jsNumberCell);
- if (jsNumberCell != X86::eax)
- __ movl_rr(jsNumberCell, X86::eax);
- emitPutVirtualRegister(dst);
- *wroteJSNumberCell = __ jmp();
-
- __ link(resultIsImm, __ label());
- // value == (double)(JSImmediate)value... or at least, it looks that way...
- // ucomi will report that (0 == -0), and will report true if either input in NaN (result is unordered).
- __ link(__ jp(), resultLookedLikeImmButActuallyIsnt); // Actually was a NaN
- __ pextrw_irr(3, xmmSource, tempReg2);
- __ cmpl_ir(0x8000, tempReg2);
- __ link(__ je(), resultLookedLikeImmButActuallyIsnt); // Actually was -0
- // Yes it really really really is representable as a JSImmediate.
- emitFastArithIntToImmNoCheck(tempReg1, X86::eax);
- emitPutVirtualRegister(dst);
-}
-
-void JIT::compileBinaryArithOp(OpcodeID opcodeID, unsigned dst, unsigned src1, unsigned src2, OperandTypes types)
-{
- Structure* numberStructure = m_globalData->numberStructure.get();
- JmpSrc wasJSNumberCell1;
- JmpSrc wasJSNumberCell1b;
- JmpSrc wasJSNumberCell2;
- JmpSrc wasJSNumberCell2b;
-
- emitGetVirtualRegisters(src1, X86::eax, src2, X86::edx);
-
- if (types.second().isReusable() && isSSE2Present()) {
- ASSERT(types.second().mightBeNumber());
-
- // Check op2 is a number
- __ testl_i32r(JSImmediate::TagTypeNumber, X86::edx);
- JmpSrc op2imm = __ jne();
- if (!types.second().definitelyIsNumber()) {
- emitJumpSlowCaseIfNotJSCell(X86::edx, src2);
- __ cmpl_im(reinterpret_cast<unsigned>(numberStructure), FIELD_OFFSET(JSCell, m_structure), X86::edx);
- addSlowCase(__ jne());
- }
-
- // (1) In this case src2 is a reusable number cell.
- // Slow case if src1 is not a number type.
- __ testl_i32r(JSImmediate::TagTypeNumber, X86::eax);
- JmpSrc op1imm = __ jne();
- if (!types.first().definitelyIsNumber()) {
- emitJumpSlowCaseIfNotJSCell(X86::eax, src1);
- __ cmpl_im(reinterpret_cast<unsigned>(numberStructure), FIELD_OFFSET(JSCell, m_structure), X86::eax);
- addSlowCase(__ jne());
- }
-
- // (1a) if we get here, src1 is also a number cell
- __ movsd_mr(FIELD_OFFSET(JSNumberCell, m_value), X86::eax, X86::xmm0);
- JmpSrc loadedDouble = __ jmp();
- // (1b) if we get here, src1 is an immediate
- __ link(op1imm, __ label());
- emitFastArithImmToInt(X86::eax);
- __ cvtsi2sd_rr(X86::eax, X86::xmm0);
- // (1c)
- __ link(loadedDouble, __ label());
- if (opcodeID == op_add)
- __ addsd_mr(FIELD_OFFSET(JSNumberCell, m_value), X86::edx, X86::xmm0);
- else if (opcodeID == op_sub)
- __ subsd_mr(FIELD_OFFSET(JSNumberCell, m_value), X86::edx, X86::xmm0);
- else {
- ASSERT(opcodeID == op_mul);
- __ mulsd_mr(FIELD_OFFSET(JSNumberCell, m_value), X86::edx, X86::xmm0);
- }
-
- putDoubleResultToJSNumberCellOrJSImmediate(X86::xmm0, X86::edx, dst, &wasJSNumberCell2, X86::xmm1, X86::ecx, X86::eax);
- wasJSNumberCell2b = __ jmp();
-
- // (2) This handles cases where src2 is an immediate number.
- // Two slow cases - either src1 isn't an immediate, or the subtract overflows.
- __ link(op2imm, __ label());
- emitJumpSlowCaseIfNotImmediateInteger(X86::eax);
- } else if (types.first().isReusable() && isSSE2Present()) {
- ASSERT(types.first().mightBeNumber());
-
- // Check op1 is a number
- __ testl_i32r(JSImmediate::TagTypeNumber, X86::eax);
- JmpSrc op1imm = __ jne();
- if (!types.first().definitelyIsNumber()) {
- emitJumpSlowCaseIfNotJSCell(X86::eax, src1);
- __ cmpl_im(reinterpret_cast<unsigned>(numberStructure), FIELD_OFFSET(JSCell, m_structure), X86::eax);
- addSlowCase(__ jne());
- }
-
- // (1) In this case src1 is a reusable number cell.
- // Slow case if src2 is not a number type.
- __ testl_i32r(JSImmediate::TagTypeNumber, X86::edx);
- JmpSrc op2imm = __ jne();
- if (!types.second().definitelyIsNumber()) {
- emitJumpSlowCaseIfNotJSCell(X86::edx, src2);
- __ cmpl_im(reinterpret_cast<unsigned>(numberStructure), FIELD_OFFSET(JSCell, m_structure), X86::edx);
- addSlowCase(__ jne());
- }
-
- // (1a) if we get here, src2 is also a number cell
- __ movsd_mr(FIELD_OFFSET(JSNumberCell, m_value), X86::edx, X86::xmm1);
- JmpSrc loadedDouble = __ jmp();
- // (1b) if we get here, src2 is an immediate
- __ link(op2imm, __ label());
- emitFastArithImmToInt(X86::edx);
- __ cvtsi2sd_rr(X86::edx, X86::xmm1);
- // (1c)
- __ link(loadedDouble, __ label());
- __ movsd_mr(FIELD_OFFSET(JSNumberCell, m_value), X86::eax, X86::xmm0);
- if (opcodeID == op_add)
- __ addsd_rr(X86::xmm1, X86::xmm0);
- else if (opcodeID == op_sub)
- __ subsd_rr(X86::xmm1, X86::xmm0);
- else {
- ASSERT(opcodeID == op_mul);
- __ mulsd_rr(X86::xmm1, X86::xmm0);
- }
- __ movsd_rm(X86::xmm0, FIELD_OFFSET(JSNumberCell, m_value), X86::eax);
- emitPutVirtualRegister(dst);
-
- putDoubleResultToJSNumberCellOrJSImmediate(X86::xmm0, X86::eax, dst, &wasJSNumberCell1, X86::xmm1, X86::ecx, X86::edx);
- wasJSNumberCell1b = __ jmp();
-
- // (2) This handles cases where src1 is an immediate number.
- // Two slow cases - either src2 isn't an immediate, or the subtract overflows.
- __ link(op1imm, __ label());
- emitJumpSlowCaseIfNotImmediateInteger(X86::edx);
- } else
- emitJumpSlowCaseIfNotImmediateIntegers(X86::eax, X86::edx, X86::ecx);
-
- if (opcodeID == op_add) {
- emitFastArithDeTagImmediate(X86::eax);
- __ addl_rr(X86::edx, X86::eax);
- addSlowCase(__ jo());
- } else if (opcodeID == op_sub) {
- __ subl_rr(X86::edx, X86::eax);
- addSlowCase(__ jo());
- signExtend32ToPtr(X86::eax, X86::eax);
- emitFastArithReTagImmediate(X86::eax, X86::eax);
+ if (isOperandConstantImmediateDouble(op1)) {
+ emitGetVirtualRegister(op1, regT0);
+ add64(tagTypeNumberRegister, regT0);
+ move64ToDouble(regT0, fpRegT0);
+ } else if (isOperandConstantImmediateInt(op1)) {
+ emitLoadInt32ToDouble(op1, fpRegT0);
} else {
- ASSERT(opcodeID == op_mul);
- // convert eax & edx from JSImmediates to ints, and check if either are zero
- emitFastArithImmToInt(X86::edx);
- JmpSrc op1Zero = emitFastArithDeTagImmediateJumpIfZero(X86::eax);
- __ testl_rr(X86::edx, X86::edx);
- JmpSrc op2NonZero = __ jne();
- __ link(op1Zero, __ label());
- // if either input is zero, add the two together, and check if the result is < 0.
- // If it is, we have a problem (N < 0), (N * 0) == -0, not representatble as a JSImmediate.
- __ movl_rr(X86::eax, X86::ecx);
- __ addl_rr(X86::edx, X86::ecx);
- addSlowCase(__ js());
- // Skip the above check if neither input is zero
- __ link(op2NonZero, __ label());
- __ imull_rr(X86::edx, X86::eax);
- addSlowCase(__ jo());
- signExtend32ToPtr(X86::eax, X86::eax);
- emitFastArithReTagImmediate(X86::eax, X86::eax);
+ emitGetVirtualRegister(op1, regT0);
+ if (!types.first().definitelyIsNumber())
+ emitJumpSlowCaseIfNotImmediateNumber(regT0);
+ Jump notInt = emitJumpIfNotImmediateInteger(regT0);
+ convertInt32ToDouble(regT0, fpRegT0);
+ Jump skipDoubleLoad = jump();
+ notInt.link(this);
+ add64(tagTypeNumberRegister, regT0);
+ move64ToDouble(regT0, fpRegT0);
+ skipDoubleLoad.link(this);
}
- emitPutVirtualRegister(dst);
- if (types.second().isReusable() && isSSE2Present()) {
- __ link(wasJSNumberCell2, __ label());
- __ link(wasJSNumberCell2b, __ label());
- }
- else if (types.first().isReusable() && isSSE2Present()) {
- __ link(wasJSNumberCell1, __ label());
- __ link(wasJSNumberCell1b, __ label());
- }
-}
-
-void JIT::compileBinaryArithOpSlowCase(OpcodeID opcodeID, Vector<SlowCaseEntry>::iterator& iter, unsigned dst, unsigned src1, unsigned src2, OperandTypes types)
-{
- linkSlowCase(iter);
- if (types.second().isReusable() && isSSE2Present()) {
- if (!types.first().definitelyIsNumber()) {
- linkSlowCaseIfNotJSCell(iter, src1);
- linkSlowCase(iter);
- }
- if (!types.second().definitelyIsNumber()) {
- linkSlowCaseIfNotJSCell(iter, src2);
- linkSlowCase(iter);
- }
- } else if (types.first().isReusable() && isSSE2Present()) {
- if (!types.first().definitelyIsNumber()) {
- linkSlowCaseIfNotJSCell(iter, src1);
- linkSlowCase(iter);
- }
- if (!types.second().definitelyIsNumber()) {
- linkSlowCaseIfNotJSCell(iter, src2);
- linkSlowCase(iter);
- }
+ if (isOperandConstantImmediateDouble(op2)) {
+ emitGetVirtualRegister(op2, regT1);
+ add64(tagTypeNumberRegister, regT1);
+ move64ToDouble(regT1, fpRegT1);
+ } else if (isOperandConstantImmediateInt(op2)) {
+ emitLoadInt32ToDouble(op2, fpRegT1);
+ } else {
+ emitGetVirtualRegister(op2, regT1);
+ if (!types.second().definitelyIsNumber())
+ emitJumpSlowCaseIfNotImmediateNumber(regT1);
+ Jump notInt = emitJumpIfNotImmediateInteger(regT1);
+ convertInt32ToDouble(regT1, fpRegT1);
+ Jump skipDoubleLoad = jump();
+ notInt.link(this);
+ add64(tagTypeNumberRegister, regT1);
+ move64ToDouble(regT1, fpRegT1);
+ skipDoubleLoad.link(this);
}
- linkSlowCase(iter);
-
- // additional entry point to handle -0 cases.
- if (opcodeID == op_mul)
- linkSlowCase(iter);
+ divDouble(fpRegT1, fpRegT0);
+
+#if ENABLE(VALUE_PROFILER)
+ // Is the result actually an integer? The DFG JIT would really like to know. If it's
+ // not an integer, we increment a count. If this together with the slow case counter
+ // are below threshold then the DFG JIT will compile this division with a specualtion
+ // that the remainder is zero.
+
+ // As well, there are cases where a double result here would cause an important field
+ // in the heap to sometimes have doubles in it, resulting in double predictions getting
+ // propagated to a use site where it might cause damage (such as the index to an array
+ // access). So if we are DFG compiling anything in the program, we want this code to
+ // ensure that it produces integers whenever possible.
+
+ JumpList notInteger;
+ branchConvertDoubleToInt32(fpRegT0, regT0, notInteger, fpRegT1);
+ // If we've got an integer, we might as well make that the result of the division.
+ emitFastArithReTagImmediate(regT0, regT0);
+ Jump isInteger = jump();
+ notInteger.link(this);
+ moveDoubleTo64(fpRegT0, regT0);
+ Jump doubleZero = branchTest64(Zero, regT0);
+ add32(TrustedImm32(1), AbsoluteAddress(&m_codeBlock->addSpecialFastCaseProfile(m_bytecodeOffset)->m_counter));
+ sub64(tagTypeNumberRegister, regT0);
+ Jump trueDouble = jump();
+ doubleZero.link(this);
+ move(tagTypeNumberRegister, regT0);
+ trueDouble.link(this);
+ isInteger.link(this);
+#else
+ // Double result.
+ moveDoubleTo64(fpRegT0, regT0);
+ sub64(tagTypeNumberRegister, regT0);
+#endif
- emitPutJITStubArgFromVirtualRegister(src1, 1, X86::ecx);
- emitPutJITStubArgFromVirtualRegister(src2, 2, X86::ecx);
- if (opcodeID == op_add)
- emitCTICall(Interpreter::cti_op_add);
- else if (opcodeID == op_sub)
- emitCTICall(Interpreter::cti_op_sub);
- else {
- ASSERT(opcodeID == op_mul);
- emitCTICall(Interpreter::cti_op_mul);
- }
- emitPutVirtualRegister(dst);
+ emitPutVirtualRegister(dst, regT0);
}
-void JIT::compileFastArith_op_add(Instruction* currentInstruction)
+void JIT::emitSlow_op_div(Instruction* currentInstruction, Vector<SlowCaseEntry>::iterator& iter)
{
unsigned result = currentInstruction[1].u.operand;
unsigned op1 = currentInstruction[2].u.operand;
unsigned op2 = currentInstruction[3].u.operand;
-
- if (isOperandConstantImmediateInt(op1)) {
- emitGetVirtualRegister(op2, X86::eax);
- emitJumpSlowCaseIfNotImmediateInteger(X86::eax);
- addSlowCase(joAdd32(Imm32(getConstantOperandImmediateInt(op1) << JSImmediate::IntegerPayloadShift), X86::eax));
- signExtend32ToPtr(X86::eax, X86::eax);
- emitPutVirtualRegister(result);
- } else if (isOperandConstantImmediateInt(op2)) {
- emitGetVirtualRegister(op1, X86::eax);
- emitJumpSlowCaseIfNotImmediateInteger(X86::eax);
- addSlowCase(joAdd32(Imm32(getConstantOperandImmediateInt(op2) << JSImmediate::IntegerPayloadShift), X86::eax));
- signExtend32ToPtr(X86::eax, X86::eax);
- emitPutVirtualRegister(result);
- } else {
- OperandTypes types = OperandTypes::fromInt(currentInstruction[4].u.operand);
- if (types.first().mightBeNumber() && types.second().mightBeNumber())
- compileBinaryArithOp(op_add, result, op1, op2, OperandTypes::fromInt(currentInstruction[4].u.operand));
- else {
- emitPutJITStubArgFromVirtualRegister(op1, 1, X86::ecx);
- emitPutJITStubArgFromVirtualRegister(op2, 2, X86::ecx);
- emitCTICall(Interpreter::cti_op_add);
- emitPutVirtualRegister(result);
- }
+ OperandTypes types = OperandTypes::fromInt(currentInstruction[4].u.operand);
+ if (types.first().definitelyIsNumber() && types.second().definitelyIsNumber()) {
+#ifndef NDEBUG
+ breakpoint();
+#endif
+ return;
}
-}
-void JIT::compileFastArithSlow_op_add(Instruction* currentInstruction, Vector<SlowCaseEntry>::iterator& iter)
-{
- unsigned result = currentInstruction[1].u.operand;
- unsigned op1 = currentInstruction[2].u.operand;
- unsigned op2 = currentInstruction[3].u.operand;
-
- if (isOperandConstantImmediateInt(op1)) {
- Jump notImm = getSlowCase(iter);
- linkSlowCase(iter);
- sub32(Imm32(getConstantOperandImmediateInt(op1) << JSImmediate::IntegerPayloadShift), X86::eax);
- notImm.link(this);
- emitPutJITStubArgFromVirtualRegister(op1, 1, X86::ecx);
- emitPutJITStubArg(X86::eax, 2);
- emitCTICall(Interpreter::cti_op_add);
- emitPutVirtualRegister(result);
- } else if (isOperandConstantImmediateInt(op2)) {
- Jump notImm = getSlowCase(iter);
- linkSlowCase(iter);
- sub32(Imm32(getConstantOperandImmediateInt(op2) << JSImmediate::IntegerPayloadShift), X86::eax);
- notImm.link(this);
- emitPutJITStubArg(X86::eax, 1);
- emitPutJITStubArgFromVirtualRegister(op2, 2, X86::ecx);
- emitCTICall(Interpreter::cti_op_add);
- emitPutVirtualRegister(result);
- } else {
- OperandTypes types = OperandTypes::fromInt(currentInstruction[4].u.operand);
- ASSERT(types.first().mightBeNumber() && types.second().mightBeNumber());
- compileBinaryArithOpSlowCase(op_add, iter, result, op1, op2, types);
+ if (!isOperandConstantImmediateDouble(op1) && !isOperandConstantImmediateInt(op1)) {
+ if (!types.first().definitelyIsNumber())
+ linkSlowCase(iter);
}
+ if (!isOperandConstantImmediateDouble(op2) && !isOperandConstantImmediateInt(op2)) {
+ if (!types.second().definitelyIsNumber())
+ linkSlowCase(iter);
+ }
+ // There is an extra slow case for (op1 * -N) or (-N * op2), to check for 0 since this should produce a result of -0.
+ JITStubCall stubCall(this, cti_op_div);
+ stubCall.addArgument(op1, regT2);
+ stubCall.addArgument(op2, regT2);
+ stubCall.call(result);
}
-void JIT::compileFastArith_op_mul(Instruction* currentInstruction)
+void JIT::emit_op_sub(Instruction* currentInstruction)
{
unsigned result = currentInstruction[1].u.operand;
unsigned op1 = currentInstruction[2].u.operand;
unsigned op2 = currentInstruction[3].u.operand;
+ OperandTypes types = OperandTypes::fromInt(currentInstruction[4].u.operand);
- // For now, only plant a fast int case if the constant operand is greater than zero.
- int32_t value;
- if (isOperandConstantImmediateInt(op1) && ((value = getConstantOperandImmediateInt(op1)) > 0)) {
- emitGetVirtualRegister(op2, X86::eax);
- emitJumpSlowCaseIfNotImmediateInteger(X86::eax);
- emitFastArithDeTagImmediate(X86::eax);
- addSlowCase(joMul32(Imm32(value), X86::eax, X86::eax));
- signExtend32ToPtr(X86::eax, X86::eax);
- emitFastArithReTagImmediate(X86::eax, X86::eax);
- emitPutVirtualRegister(result);
- } else if (isOperandConstantImmediateInt(op2) && ((value = getConstantOperandImmediateInt(op2)) > 0)) {
- emitGetVirtualRegister(op1, X86::eax);
- emitJumpSlowCaseIfNotImmediateInteger(X86::eax);
- emitFastArithDeTagImmediate(X86::eax);
- addSlowCase(joMul32(Imm32(value), X86::eax, X86::eax));
- signExtend32ToPtr(X86::eax, X86::eax);
- emitFastArithReTagImmediate(X86::eax, X86::eax);
- emitPutVirtualRegister(result);
- } else
- compileBinaryArithOp(op_mul, result, op1, op2, OperandTypes::fromInt(currentInstruction[4].u.operand));
+ compileBinaryArithOp(op_sub, result, op1, op2, types);
+ emitPutVirtualRegister(result);
}
-void JIT::compileFastArithSlow_op_mul(Instruction* currentInstruction, Vector<SlowCaseEntry>::iterator& iter)
+
+void JIT::emitSlow_op_sub(Instruction* currentInstruction, Vector<SlowCaseEntry>::iterator& iter)
{
unsigned result = currentInstruction[1].u.operand;
unsigned op1 = currentInstruction[2].u.operand;
unsigned op2 = currentInstruction[3].u.operand;
+ OperandTypes types = OperandTypes::fromInt(currentInstruction[4].u.operand);
- if ((isOperandConstantImmediateInt(op1) && (getConstantOperandImmediateInt(op1) > 0))
- || (isOperandConstantImmediateInt(op2) && (getConstantOperandImmediateInt(op2) > 0))) {
- linkSlowCase(iter);
- linkSlowCase(iter);
- // There is an extra slow case for (op1 * -N) or (-N * op2), to check for 0 since this should produce a result of -0.
- emitPutJITStubArgFromVirtualRegister(op1, 1, X86::ecx);
- emitPutJITStubArgFromVirtualRegister(op2, 2, X86::ecx);
- emitCTICall(Interpreter::cti_op_mul);
- emitPutVirtualRegister(result);
- } else
- compileBinaryArithOpSlowCase(op_mul, iter, result, op1, op2, OperandTypes::fromInt(currentInstruction[4].u.operand));
+ compileBinaryArithOpSlowCase(op_sub, iter, result, op1, op2, types, false, false);
}
-void JIT::compileFastArith_op_sub(Instruction* currentInstruction)
-{
- compileBinaryArithOp(op_sub, currentInstruction[1].u.operand, currentInstruction[2].u.operand, currentInstruction[3].u.operand, OperandTypes::fromInt(currentInstruction[4].u.operand));
-}
-void JIT::compileFastArithSlow_op_sub(Instruction* currentInstruction, Vector<SlowCaseEntry>::iterator& iter)
-{
- compileBinaryArithOpSlowCase(op_sub, iter, currentInstruction[1].u.operand, currentInstruction[2].u.operand, currentInstruction[3].u.operand, OperandTypes::fromInt(currentInstruction[4].u.operand));
-}
+/* ------------------------------ END: OP_ADD, OP_SUB, OP_MUL ------------------------------ */
-#endif
+#endif // USE(JSVALUE64)
} // namespace JSC