dfg/DFGFPRInfo.h

   1 /*
   2  * Copyright (C) 2011 Apple Inc. All rights reserved.
   3  *
   4  * Redistribution and use in source and binary forms, with or without
   5  * modification, are permitted provided that the following conditions
   6  * are met:
   7  * 1. Redistributions of source code must retain the above copyright
   8  *    notice, this list of conditions and the following disclaimer.
   9  * 2. Redistributions in binary form must reproduce the above copyright
  10  *    notice, this list of conditions and the following disclaimer in the
  11  *    documentation and/or other materials provided with the distribution.
  12  *
  13  * THIS SOFTWARE IS PROVIDED BY APPLE INC. ``AS IS'' AND ANY
  14  * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  15  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  16  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL APPLE INC. OR
  17  * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
  18  * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
  19  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
  20  * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
  21  * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  22  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  23  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  24  */
  25
  26 #ifndef DFGFPRInfo_h
  27 #define DFGFPRInfo_h
  28
  29 #if ENABLE(DFG_JIT)
  30
  31 #include <assembler/MacroAssembler.h>
  32 #include <dfg/DFGRegisterBank.h>
  33
  34 namespace JSC { namespace DFG {
  35
  36 typedef MacroAssembler::FPRegisterID FPRReg;
  37 #define InvalidFPRReg ((FPRReg)-1)
  38
  39 class FPRInfo {
  40 public:
  41     typedef FPRReg RegisterType;
  42     static const unsigned numberOfRegisters = 6;
  43
  44     // Temporary registers.
  45     static const FPRReg fpRegT0 = X86Registers::xmm0;
  46     static const FPRReg fpRegT1 = X86Registers::xmm1;
  47     static const FPRReg fpRegT2 = X86Registers::xmm2;
  48     static const FPRReg fpRegT3 = X86Registers::xmm3;
  49     static const FPRReg fpRegT4 = X86Registers::xmm4;
  50     static const FPRReg fpRegT5 = X86Registers::xmm5;
  51     // These constants provide the names for the general purpose argument & return value registers.
  52     static const FPRReg argumentFPR0 = X86Registers::xmm0; // fpRegT0
  53     static const FPRReg argumentFPR1 = X86Registers::xmm1; // fpRegT1
  54     static const FPRReg argumentFPR2 = X86Registers::xmm2; // fpRegT2
  55     static const FPRReg argumentFPR3 = X86Registers::xmm3; // fpRegT3
  56     static const FPRReg returnValueFPR = X86Registers::xmm0; // fpRegT0
  57
  58     // FPRReg mapping is direct, the machine regsiter numbers can
  59     // be used directly as indices into the FPR RegisterBank.
  60     COMPILE_ASSERT(X86Registers::xmm0 == 0, xmm0_is_0);
  61     COMPILE_ASSERT(X86Registers::xmm1 == 1, xmm1_is_1);
  62     COMPILE_ASSERT(X86Registers::xmm2 == 2, xmm2_is_2);
  63     COMPILE_ASSERT(X86Registers::xmm3 == 3, xmm3_is_3);
  64     COMPILE_ASSERT(X86Registers::xmm4 == 4, xmm4_is_4);
  65     COMPILE_ASSERT(X86Registers::xmm5 == 5, xmm5_is_5);
  66     static FPRReg toRegister(unsigned index)
  67     {
  68         return (FPRReg)index;
  69     }
  70     static unsigned toIndex(FPRReg reg)
  71     {
  72         return (unsigned)reg;
  73     }
  74
  75 #ifndef NDEBUG
  76     static const char* debugName(FPRReg reg)
  77     {
  78         ASSERT(reg != InvalidFPRReg);
  79         ASSERT(reg < 16);
  80         static const char* nameForRegister[16] = {
  81             "xmm0", "xmm1", "xmm2", "xmm3",
  82             "xmm4", "xmm5", "xmm6", "xmm7",
  83             "xmm8", "xmm9", "xmm10", "xmm11",
  84             "xmm12", "xmm13", "xmm14", "xmm15"
  85         };
  86         return nameForRegister[reg];
  87     }
  88 #endif
  89 };
  90
  91 typedef RegisterBank<FPRInfo>::iterator fpr_iterator;
  92
  93 } } // namespace JSC::DFG
  94
  95 #endif
  96 #endif