+//- functions implemented in assembly ------------------------------------------
+//this the list of corecrypto clients that use assembly and the clang compiler
+#if !(CC_XNU_KERNEL_AVAILABLE || CC_KERNEL || CC_USE_L4 || CC_IBOOT || CC_RTKIT || CC_RTKITROM || CC_USE_SEPROM || CC_USE_S3) && !defined(_WIN32) && CORECRYPTO_DEBUG
+ #warning "You are using the default corecrypto configuration, assembly optimizations may not be available for your platform"
+#endif
+
+// Enable assembler in Linux if CC_LINUX_ASM is defined
+#if CC_LINUX && defined(CC_LINUX_ASM) && CC_LINUX_ASM
+#define CC_USE_ASM 1
+#endif
+
+// Use this macro to strictly disable assembly regardless of cpu/os/compiler/etc.
+// Our assembly code is not gcc compatible. Clang defines the __GNUC__ macro as well.
+#if !defined(CC_USE_ASM)
+ #if defined(_WIN32) || CC_EFI || CC_BASEBAND || CC_XNU_KERNEL_PRIVATE || (defined(__GNUC__) && !defined(__clang__)) || defined(__ANDROID_API__) || CC_LINUX
+ #define CC_USE_ASM 0
+ #else
+ #define CC_USE_ASM 1
+ #endif
+#endif
+
+//-(1) ARM V7
+#if defined(_ARM_ARCH_7) && __clang__ && CC_USE_ASM
+ #define CCN_DEDICATED_SQR CC_SMALL_CODE
+ #define CCN_MUL_KARATSUBA 0 // no performance improvement
+ #define CCN_ADD_ASM 1
+ #define CCN_SUB_ASM 1
+ #define CCN_MUL_ASM 0
+ #define CCN_ADDMUL1_ASM 1
+ #define CCN_MUL1_ASM 1
+ #define CCN_CMP_ASM 1
+ #define CCN_ADD1_ASM 1
+ #define CCN_SUB1_ASM 1
+ #define CCN_N_ASM 1
+ #define CCN_SET_ASM 1
+ #define CCN_SHIFT_RIGHT_ASM 1
+ #if defined(__ARM_NEON__)
+ #define CCN_SHIFT_LEFT_ASM 1
+ #else
+ #define CCN_SHIFT_LEFT_ASM 0
+ #endif
+ #define CCN_MOD_224_ASM 1
+ #define CCN_MULMOD_256_ASM 1
+ #define CCAES_ARM_ASM 1
+ #define CCAES_INTEL_ASM 0
+ #if CC_KERNEL || CC_USE_L4 || CC_IBOOT || CC_RTKIT || CC_RTKITROM || CC_USE_SEPROM || CC_USE_S3
+ #define CCAES_MUX 0
+ #else
+ #define CCAES_MUX 1
+ #endif
+ #define CCN_USE_BUILTIN_CLZ 1
+ #define CCSHA1_VNG_INTEL 0
+ #define CCSHA2_VNG_INTEL 0
+
+ #if defined(__ARM_NEON__) || CC_KERNEL
+ #define CCSHA1_VNG_ARM 1
+ #define CCSHA2_VNG_ARM 1
+ #else /* !defined(__ARM_NEON__) */
+ #define CCSHA1_VNG_ARM 0
+ #define CCSHA2_VNG_ARM 0
+ #endif /* !defined(__ARM_NEON__) */
+ #define CCSHA256_ARMV6M_ASM 0
+
+ #define CC_ACCELERATECRYPTO 1
+
+//-(2) ARM 64
+#elif defined(__arm64__) && __clang__ && CC_USE_ASM
+ #define CCN_DEDICATED_SQR CC_SMALL_CODE
+ #define CCN_MUL_KARATSUBA 1 // 4*n CCN_UNIT extra memory required.
+ #define CCN_ADD_ASM 1
+ #define CCN_SUB_ASM 1
+ #define CCN_MUL_ASM 1
+ #define CCN_ADDMUL1_ASM 0
+ #define CCN_MUL1_ASM 0
+ #define CCN_CMP_ASM 1
+ #define CCN_ADD1_ASM 0
+ #define CCN_SUB1_ASM 0
+ #define CCN_N_ASM 1
+ #define CCN_SET_ASM 0
+ #define CCN_SHIFT_RIGHT_ASM 1
+ #define CCN_SHIFT_LEFT_ASM 1
+ #define CCN_MOD_224_ASM 0
+ #define CCN_MULMOD_256_ASM 1
+ #define CCAES_ARM_ASM 1
+ #define CCAES_INTEL_ASM 0
+ #define CCAES_MUX 0 // On 64bit SoC, asm is much faster than HW
+ #define CCN_USE_BUILTIN_CLZ 1
+ #define CCSHA1_VNG_INTEL 0
+ #define CCSHA2_VNG_INTEL 0
+ #define CCSHA1_VNG_ARM 1
+ #define CCSHA2_VNG_ARM 1
+ #define CCSHA256_ARMV6M_ASM 0
+
+ #define CC_ACCELERATECRYPTO 1
+
+//-(3) Intel 32/64
+#elif (defined(__x86_64__) || defined(__i386__)) && __clang__ && CC_USE_ASM
+ #define CCN_DEDICATED_SQR 1
+ #define CCN_MUL_KARATSUBA 1 // 4*n CCN_UNIT extra memory required.
+ /* These assembly routines only work for a single CCN_UNIT_SIZE. */
+ #if (defined(__x86_64__) && CCN_UNIT_SIZE == 8) || (defined(__i386__) && CCN_UNIT_SIZE == 4)
+ #define CCN_ADD_ASM 1
+ #define CCN_SUB_ASM 1
+ #define CCN_MUL_ASM 1
+ #else
+ #define CCN_ADD_ASM 0
+ #define CCN_SUB_ASM 0
+ #define CCN_MUL_ASM 0
+ #endif
+
+ #if (defined(__x86_64__) && CCN_UNIT_SIZE == 8)
+ #define CCN_CMP_ASM 1
+ #define CCN_N_ASM 1
+ #define CCN_SHIFT_RIGHT_ASM 1
+ #define CCN_SHIFT_LEFT_ASM 1
+ #else
+ #define CCN_CMP_ASM 0
+ #define CCN_N_ASM 0
+ #define CCN_SHIFT_RIGHT_ASM 0
+ #define CCN_SHIFT_LEFT_ASM 0
+ #endif
+
+ #define CCN_MOD_224_ASM 0
+ #define CCN_MULMOD_256_ASM 0
+ #define CCN_ADDMUL1_ASM 0
+ #define CCN_MUL1_ASM 0
+ #define CCN_ADD1_ASM 0
+ #define CCN_SUB1_ASM 0
+ #define CCN_SET_ASM 0
+ #define CCAES_ARM_ASM 0
+ #define CCAES_INTEL_ASM 1
+ #define CCAES_MUX 0
+ #define CCN_USE_BUILTIN_CLZ 0
+ #define CCSHA1_VNG_INTEL 1
+ #define CCSHA2_VNG_INTEL 1
+ #define CCSHA1_VNG_ARM 0
+ #define CCSHA2_VNG_ARM 0
+ #define CCSHA256_ARMV6M_ASM 0
+
+ #define CC_ACCELERATECRYPTO 1
+
+//-(4) disable assembly
+#else
+ #if CCN_UINT128_SUPPORT_FOR_64BIT_ARCH
+ #define CCN_DEDICATED_SQR 1
+ #else
+ #define CCN_DEDICATED_SQR 0 //when assembly is off and 128-bit integers are not supported, dedicated square is off. This is the case on Windows
+ #endif
+ #define CCN_MUL_KARATSUBA 1 // 4*n CCN_UNIT extra memory required.
+ #define CCN_ADD_ASM 0
+ #define CCN_SUB_ASM 0
+ #define CCN_MUL_ASM 0
+ #define CCN_ADDMUL1_ASM 0
+ #define CCN_MUL1_ASM 0
+ #define CCN_CMP_ASM 0
+ #define CCN_ADD1_ASM 0
+ #define CCN_SUB1_ASM 0
+ #define CCN_N_ASM 0
+ #define CCN_SET_ASM 0
+ #define CCN_SHIFT_RIGHT_ASM 0
+ #define CCN_SHIFT_LEFT_ASM 0
+ #define CCN_MOD_224_ASM 0
+ #define CCN_MULMOD_256_ASM 0
+ #define CCAES_ARM_ASM 0
+ #define CCAES_INTEL_ASM 0
+ #define CCAES_MUX 0
+ #define CCN_USE_BUILTIN_CLZ 0
+ #define CCSHA1_VNG_INTEL 0
+ #define CCSHA2_VNG_INTEL 0
+ #define CCSHA1_VNG_ARM 0
+ #define CCSHA2_VNG_ARM 0
+ #define CCSHA256_ARMV6M_ASM 0
+
+ #define CC_ACCELERATECRYPTO 0
+
+#endif