xnu-2782.40.9.tar.gz

[apple/xnu.git] / pexpert / i386 / pe_serial.c

diff --git a/pexpert/i386/pe_serial.c b/pexpert/i386/pe_serial.c
index 201b76e9c339555de27f24c8f2bba6010568520d..f056487a044ce0a798318ad729fd744266a7c829 100644 (file)
--- a/pexpert/i386/pe_serial.c
+++ b/pexpert/i386/pe_serial.c
@@ -1,23 +1,29 @@
 /*
 /*

- * Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
+ * Copyright (c) 2000-2006 Apple Computer, Inc. All rights reserved.

  *
  *

- * @APPLE_LICENSE_HEADER_START@
+ * @APPLE_OSREFERENCE_LICENSE_HEADER_START@

  * 
  * 

- * The contents of this file constitute Original Code as defined in and
- * are subject to the Apple Public Source License Version 1.1 (the
- * "License").  You may not use this file except in compliance with the
- * License.  Please obtain a copy of the License at
- * http://www.apple.com/publicsource and read it before using this file.
+ * This file contains Original Code and/or Modifications of Original Code
+ * as defined in and that are subject to the Apple Public Source License
+ * Version 2.0 (the 'License'). You may not use this file except in
+ * compliance with the License. The rights granted to you under the License
+ * may not be used to create, or enable the creation or redistribution of,
+ * unlawful or unlicensed copies of an Apple operating system, or to
+ * circumvent, violate, or enable the circumvention or violation of, any
+ * terms of an Apple operating system software license agreement.

  * 
  * 

- * This Original Code and all software distributed under the License are
- * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
+ * Please obtain a copy of the License at
+ * http://www.opensource.apple.com/apsl/ and read it before using this file.
+ * 
+ * The Original Code and all software distributed under the License are
+ * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER

  * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
  * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
  * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
  * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,

- * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT.  Please see the
- * License for the specific language governing rights and limitations
- * under the License.
+ * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
+ * Please see the License for the specific language governing rights and
+ * limitations under the License.

  * 
  * 

- * @APPLE_LICENSE_HEADER_END@
+ * @APPLE_OSREFERENCE_LICENSE_HEADER_END@

  */
 
 /*
  */
 
 /*


@@ -46,7 +52,8 @@ enum {
     UART_LCR = 3,  /* line control register         */
     UART_MCR = 4,  /* modem control register        */
     UART_LSR = 5,  /* line status register          */
     UART_LCR = 3,  /* line control register         */
     UART_MCR = 4,  /* modem control register        */
     UART_LSR = 5,  /* line status register          */

-    UART_MSR = 6   /* modem status register         */
+    UART_MSR = 6,  /* modem status register         */
+    UART_SCR = 7   /* scratch register              */

 };
 
 enum {
 };
 
 enum {


@@ -63,12 +70,18 @@ enum {
 };
 
 enum {
 };
 
 enum {

+    UART_LSR_DR    = 0x01,
+    UART_LSR_OE    = 0x02,
+    UART_LSR_PE    = 0x04,
+    UART_LSR_FE    = 0x08,

     UART_LSR_THRE  = 0x20
 };
 
     UART_LSR_THRE  = 0x20
 };
 

-#define UART_BAUD_RATE  115200
+static unsigned uart_baud_rate = 115200;

 #define UART_PORT_ADDR  COM1_PORT_ADDR
 
 #define UART_PORT_ADDR  COM1_PORT_ADDR
 

+#define UART_CLOCK  1843200   /* 1.8432 MHz clock */
+

 #define WRITE(r, v)  outb(UART_PORT_ADDR + UART_##r, v)
 #define READ(r)      inb(UART_PORT_ADDR + UART_##r)
 #define DELAY(x)     { volatile int _d_; for (_d_ = 0; _d_ < (10000*x); _d_++) ; }
 #define WRITE(r, v)  outb(UART_PORT_ADDR + UART_##r, v)
 #define READ(r)      inb(UART_PORT_ADDR + UART_##r)
 #define DELAY(x)     { volatile int _d_; for (_d_ = 0; _d_ < (10000*x); _d_++) ; }


@@ -78,22 +91,18 @@ static int uart_initted = 0;   /* 1 if init'ed */
 static int
 uart_probe( void )
 {
 static int
 uart_probe( void )
 {

-    /* Verify that the Divisor Register is accessible */
-
-    WRITE( LCR, UART_LCR_DLAB );
-    WRITE( DLL, 0x5a );
-    if (READ(DLL) != 0x5a) return 0;
-    WRITE( DLL, 0xa5 );
-    if (READ(DLL) != 0xa5) return 0;
-    WRITE( LCR, 0x00 );
+    /* Verify that the Scratch Register is accessible */
+
+    WRITE( SCR, 0x5a );
+    if (READ(SCR) != 0x5a) return 0;
+    WRITE( SCR, 0xa5 );
+    if (READ(SCR) != 0xa5) return 0;

     return 1;
 }
 
 static void
 uart_set_baud_rate( unsigned long baud_rate )
 {
     return 1;
 }
 
 static void
 uart_set_baud_rate( unsigned long baud_rate )
 {

-    #define UART_CLOCK  1843200   /* 1.8432 MHz clock */
-

     const unsigned char lcr = READ( LCR );
     unsigned long       div;
 
     const unsigned char lcr = READ( LCR );
     unsigned long       div;
 


@@ -116,9 +125,41 @@ uart_putc( char c )
     WRITE( THR, c );
 }
 
     WRITE( THR, c );
 }
 

+static int
+uart_getc( void )
+{
+    /*
+     * This function returns:
+     * -1 : no data
+     * -2 : receiver error
+     * >0 : character received
+     */
+
+    unsigned char lsr;
+
+    if (!uart_initted) return -1;
+
+    lsr = READ( LSR );
+
+    if ( lsr & (UART_LSR_FE | UART_LSR_PE | UART_LSR_OE) )
+    {
+        READ( RBR ); /* discard */
+        return -2;
+    }
+
+    if ( lsr & UART_LSR_DR )
+    {
+        return READ( RBR );
+    }
+
+    return -1;
+}
+

 int serial_init( void )
 {
 int serial_init( void )
 {

-    if ( uart_initted || uart_probe() == 0 ) return 0;
+    unsigned serial_baud_rate = 0;
+       
+    if ( uart_probe() == 0 ) return 0;

 
     /* Disable hardware interrupts */
 
 
     /* Disable hardware interrupts */
 


@@ -133,9 +174,16 @@ int serial_init( void )
 
     WRITE( LCR, UART_LCR_8BITS );
 
 
     WRITE( LCR, UART_LCR_8BITS );
 

-    /* Set baud rate */
+    /* Set baud rate - use the supplied boot-arg if available */

 
 

-    uart_set_baud_rate( UART_BAUD_RATE );
+    if (PE_parse_boot_argn("serialbaud", &serial_baud_rate, sizeof (serial_baud_rate)))
+    {
+           /* Valid divisor? */
+           if (!((UART_CLOCK / 16) % serial_baud_rate)) {
+                   uart_baud_rate = serial_baud_rate;
+           }
+    }
+    uart_set_baud_rate( uart_baud_rate );

 
     /* Assert DTR# and RTS# lines (OUT2?) */
 
 
     /* Assert DTR# and RTS# lines (OUT2?) */
 


@@ -153,10 +201,9 @@ int serial_init( void )
 void serial_putc( char c )
 {
     uart_putc(c);
 void serial_putc( char c )
 {
     uart_putc(c);

-    if (c == '\n') uart_putc('\r');

 }
 
 int serial_getc( void )
 {
 }
 
 int serial_getc( void )
 {

-    return 0;  /* not supported */
+    return uart_getc();

 }
 }