+#define i386_THREAD_FPSTATE_COUNT ((mach_msg_type_number_t) \
+ ( sizeof (i386_thread_fpstate_t) / sizeof (int) ))
+
+
+/*
+ * x86-64 compatibility
+ */
+typedef i386_float_state_t x86_float_state32_t;
+#define x86_FLOAT_STATE32_COUNT ((mach_msg_type_number_t) \
+ (sizeof(x86_float_state32_t)/sizeof(unsigned int)))
+
+
+struct x86_float_state64 {
+ int fpu_reserved[2];
+ fp_control_t fpu_fcw; /* x87 FPU control word */
+ fp_status_t fpu_fsw; /* x87 FPU status word */
+ uint8_t fpu_ftw; /* x87 FPU tag word */
+ uint8_t fpu_rsrv1; /* reserved */
+ uint16_t fpu_fop; /* x87 FPU Opcode */
+ uint32_t fpu_ip; /* x87 FPU Instruction Pointer offset */
+ uint16_t fpu_cs; /* x87 FPU Instruction Pointer Selector */
+ uint16_t fpu_rsrv2; /* reserved */
+ uint32_t fpu_dp; /* x87 FPU Instruction Operand(Data) Pointer offset */
+ uint16_t fpu_ds; /* x87 FPU Instruction Operand(Data) Pointer Selector */
+ uint16_t fpu_rsrv3; /* reserved */
+ uint32_t fpu_mxcsr; /* MXCSR Register state */
+ uint32_t fpu_mxcsrmask; /* MXCSR mask */
+ struct mmst_reg fpu_stmm0; /* ST0/MM0 */
+ struct mmst_reg fpu_stmm1; /* ST1/MM1 */
+ struct mmst_reg fpu_stmm2; /* ST2/MM2 */
+ struct mmst_reg fpu_stmm3; /* ST3/MM3 */
+ struct mmst_reg fpu_stmm4; /* ST4/MM4 */
+ struct mmst_reg fpu_stmm5; /* ST5/MM5 */
+ struct mmst_reg fpu_stmm6; /* ST6/MM6 */
+ struct mmst_reg fpu_stmm7; /* ST7/MM7 */
+ struct xmm_reg fpu_xmm0; /* XMM 0 */
+ struct xmm_reg fpu_xmm1; /* XMM 1 */
+ struct xmm_reg fpu_xmm2; /* XMM 2 */
+ struct xmm_reg fpu_xmm3; /* XMM 3 */
+ struct xmm_reg fpu_xmm4; /* XMM 4 */
+ struct xmm_reg fpu_xmm5; /* XMM 5 */
+ struct xmm_reg fpu_xmm6; /* XMM 6 */
+ struct xmm_reg fpu_xmm7; /* XMM 7 */
+ struct xmm_reg fpu_xmm8; /* XMM 8 */
+ struct xmm_reg fpu_xmm9; /* XMM 9 */
+ struct xmm_reg fpu_xmm10; /* XMM 10 */
+ struct xmm_reg fpu_xmm11; /* XMM 11 */
+ struct xmm_reg fpu_xmm12; /* XMM 12 */
+ struct xmm_reg fpu_xmm13; /* XMM 13 */
+ struct xmm_reg fpu_xmm14; /* XMM 14 */
+ struct xmm_reg fpu_xmm15; /* XMM 15 */
+ char fpu_rsrv4[6*16]; /* reserved */
+ int fpu_reserved1;
+};
+
+typedef struct x86_float_state64 x86_float_state64_t;
+#define x86_FLOAT_STATE64_COUNT ((mach_msg_type_number_t) \
+ (sizeof(x86_float_state64_t)/sizeof(unsigned int)))
+
+
+
+
+struct x86_float_state {
+ x86_state_hdr_t fsh;
+ union {
+ x86_float_state32_t fs32;
+ x86_float_state64_t fs64;
+ } ufs;
+} ;
+
+
+typedef struct x86_float_state x86_float_state_t;
+#define x86_FLOAT_STATE_COUNT ((mach_msg_type_number_t) \
+ ( sizeof (x86_float_state_t) / sizeof (int) ))
+
+