+/* Type for the Time Base Enable function */
+typedef void (*time_base_enable_t)(cpu_id_t cpu_id, boolean_t enable);
+
+/* Type for the IPI Hander */
+typedef void (*ipi_handler_t)(void);
+
+/* Struct for ml_processor_register */
+struct ml_processor_info {
+ cpu_id_t cpu_id;
+ boolean_t boot_cpu;
+ vm_offset_t start_paddr;
+ boolean_t supports_nap;
+ unsigned long l2cr_value;
+ time_base_enable_t time_base_enable;
+};
+
+typedef struct ml_processor_info ml_processor_info_t;
+
+
+/* Register a processor */
+kern_return_t
+ml_processor_register(
+ cpu_id_t cpu_id,
+ uint32_t lapic_id,
+ processor_t *processor_out,
+ boolean_t boot_cpu,
+ boolean_t start );
+
+/* PCI config cycle probing */
+boolean_t ml_probe_read(
+ vm_offset_t paddr,
+ unsigned int *val);
+boolean_t ml_probe_read_64(
+ addr64_t paddr,
+ unsigned int *val);
+
+/* Read physical address byte */
+unsigned int ml_phys_read_byte(
+ vm_offset_t paddr);
+unsigned int ml_phys_read_byte_64(
+ addr64_t paddr);
+
+/* Read physical address half word */
+unsigned int ml_phys_read_half(
+ vm_offset_t paddr);
+unsigned int ml_phys_read_half_64(
+ addr64_t paddr);
+
+/* Read physical address word*/
+unsigned int ml_phys_read(
+ vm_offset_t paddr);
+unsigned int ml_phys_read_64(
+ addr64_t paddr);
+unsigned int ml_phys_read_word(
+ vm_offset_t paddr);
+unsigned int ml_phys_read_word_64(
+ addr64_t paddr);
+
+/* Read physical address double word */
+unsigned long long ml_phys_read_double(
+ vm_offset_t paddr);
+unsigned long long ml_phys_read_double_64(
+ addr64_t paddr);
+
+/* Write physical address byte */
+void ml_phys_write_byte(
+ vm_offset_t paddr, unsigned int data);
+void ml_phys_write_byte_64(
+ addr64_t paddr, unsigned int data);
+
+/* Write physical address half word */
+void ml_phys_write_half(
+ vm_offset_t paddr, unsigned int data);
+void ml_phys_write_half_64(
+ addr64_t paddr, unsigned int data);
+
+/* Write physical address word */
+void ml_phys_write(
+ vm_offset_t paddr, unsigned int data);
+void ml_phys_write_64(
+ addr64_t paddr, unsigned int data);
+void ml_phys_write_word(
+ vm_offset_t paddr, unsigned int data);
+void ml_phys_write_word_64(
+ addr64_t paddr, unsigned int data);
+
+/* Write physical address double word */
+void ml_phys_write_double(
+ vm_offset_t paddr, unsigned long long data);
+void ml_phys_write_double_64(
+ addr64_t paddr, unsigned long long data);
+
+/* Struct for ml_cpu_get_info */
+struct ml_cpu_info {
+ uint32_t vector_unit;
+ uint32_t cache_line_size;
+ uint32_t l1_icache_size;
+ uint32_t l1_dcache_size;
+ uint32_t l2_settings;
+ uint32_t l2_cache_size;
+ uint32_t l3_settings;
+ uint32_t l3_cache_size;
+};
+
+typedef struct ml_cpu_info ml_cpu_info_t;
+
+/* Get processor info */
+void ml_cpu_get_info(ml_cpu_info_t *ml_cpu_info);