/*
- * Copyright (c) 2000-2010 Apple Inc. All rights reserved.
+ * Copyright (c) 2000-2012 Apple Inc. All rights reserved.
*
* @APPLE_OSREFERENCE_LICENSE_HEADER_START@
*
#include <kern/spl.h>
#include <kern/misc_protos.h>
#include <kern/debug.h>
-
+#if CONFIG_TELEMETRY
+#include <kern/telemetry.h>
+#endif
#include <sys/kdebug.h>
#include <string.h>
#include <mach/i386/syscall_sw.h>
#include <libkern/OSDebug.h>
-
+#include <i386/cpu_threads.h>
#include <machine/pal_routines.h>
extern void throttle_lowpri_io(int);
* Forward declarations
*/
static void user_page_fault_continue(kern_return_t kret);
-#ifdef __i386__
-static void panic_trap(x86_saved_state32_t *saved_state);
-static void set_recovery_ip(x86_saved_state32_t *saved_state, vm_offset_t ip);
-extern void panic_64(x86_saved_state_t *, int, const char *, boolean_t);
-#else
static void panic_trap(x86_saved_state64_t *saved_state);
static void set_recovery_ip(x86_saved_state64_t *saved_state, vm_offset_t ip);
-#endif
volatile perfCallback perfTrapHook = NULL; /* Pointer to CHUD trap hook routine */
ret);
#endif
}
- throttle_lowpri_io(TRUE);
+ throttle_lowpri_io(1);
thread_exception_return();
/*NOTREACHED*/
snprintf(buf, bufsize, "0x%x 0x%x 0x%llx", tcpu, cpu_data_ptr[tcpu]->cpu_max_observed_int_latency_vector, cpu_data_ptr[tcpu]->cpu_max_observed_int_latency);
}
+uint32_t interrupt_timer_coalescing_enabled = 1;
+uint64_t interrupt_coalesced_timers;
+
/*
* Handle interrupts:
* - local APIC interrupts (IPIs, timers, etc) are handled by the kernel,
boolean_t user_mode = FALSE;
int ipl;
int cnum = cpu_number();
+ cpu_data_t *cdp = cpu_data_ptr[cnum];
int itype = 0;
-
+
if (is_saved_state64(state) == TRUE) {
x86_saved_state64_t *state64;
interrupt_num = state32->trapno;
}
+ if (cpu_data_ptr[cnum]->lcpu.package->num_idle == topoParms.nLThreadsPerPackage)
+ cpu_data_ptr[cnum]->cpu_hwIntpexits[interrupt_num]++;
+
if (interrupt_num == (LAPIC_DEFAULT_INTERRUPT_BASE + LAPIC_INTERPROCESSOR_INTERRUPT))
itype = 1;
else if (interrupt_num == (LAPIC_DEFAULT_INTERRUPT_BASE + LAPIC_TIMER_INTERRUPT))
SCHED_STATS_INTERRUPT(current_processor());
+#if CONFIG_TELEMETRY
+ if (telemetry_needs_record
+ && (current_task() != kernel_task)
+#if CONFIG_SCHED_IDLE_IN_PLACE
+ && ((current_thread()->state & TH_IDLE) == 0) /* idle-in-place should be treated like the idle thread */
+#endif
+ ) {
+ telemetry_mark_curthread(user_mode);
+ }
+#endif
+
ipl = get_preemption_level();
/*
}
- KERNEL_DEBUG_CONSTANT_IST(KDEBUG_TRACE,
- MACHDBG_CODE(DBG_MACH_EXCP_INTR, 0) | DBG_FUNC_END,
- interrupt_num, 0, 0, 0, 0);
-
- if (cpu_data_ptr[cnum]->cpu_nested_istack) {
- cpu_data_ptr[cnum]->cpu_nested_istack_events++;
+ if (__improbable(cdp->cpu_nested_istack)) {
+ cdp->cpu_nested_istack_events++;
}
else {
- uint64_t int_latency = mach_absolute_time() - cpu_data_ptr[cnum]->cpu_int_event_time;
- if (ilat_assert && (int_latency > interrupt_latency_cap) && !machine_timeout_suspended()) {
- panic("Interrupt vector 0x%x exceeded interrupt latency threshold, 0x%llx absolute time delta, prior signals: 0x%x, current signals: 0x%x", interrupt_num, int_latency, cpu_data_ptr[cnum]->cpu_prior_signals, cpu_data_ptr[cnum]->cpu_signals);
+ uint64_t ctime = mach_absolute_time();
+ uint64_t int_latency = ctime - cdp->cpu_int_event_time;
+ uint64_t esdeadline, ehdeadline;
+ /* Attempt to process deferred timers in the context of
+ * this interrupt, unless interrupt time has already exceeded
+ * TCOAL_ILAT_THRESHOLD.
+ */
+#define TCOAL_ILAT_THRESHOLD (30000ULL)
+
+ if ((int_latency < TCOAL_ILAT_THRESHOLD) &&
+ interrupt_timer_coalescing_enabled) {
+ esdeadline = cdp->rtclock_timer.queue.earliest_soft_deadline;
+ ehdeadline = cdp->rtclock_timer.deadline;
+ if ((ctime >= esdeadline) && (ctime < ehdeadline)) {
+ interrupt_coalesced_timers++;
+ TCOAL_DEBUG(0x88880000 | DBG_FUNC_START, ctime, esdeadline, ehdeadline, interrupt_coalesced_timers, 0);
+ rtclock_intr(state);
+ TCOAL_DEBUG(0x88880000 | DBG_FUNC_END, ctime, esdeadline, interrupt_coalesced_timers, 0, 0);
+ } else {
+ TCOAL_DEBUG(0x77770000, ctime, cdp->rtclock_timer.queue.earliest_soft_deadline, cdp->rtclock_timer.deadline, interrupt_coalesced_timers, 0);
+ }
+ }
+
+ if (__improbable(ilat_assert && (int_latency > interrupt_latency_cap) && !machine_timeout_suspended())) {
+ panic("Interrupt vector 0x%x exceeded interrupt latency threshold, 0x%llx absolute time delta, prior signals: 0x%x, current signals: 0x%x", interrupt_num, int_latency, cdp->cpu_prior_signals, cdp->cpu_signals);
}
- if (int_latency > cpu_data_ptr[cnum]->cpu_max_observed_int_latency) {
- cpu_data_ptr[cnum]->cpu_max_observed_int_latency = int_latency;
- cpu_data_ptr[cnum]->cpu_max_observed_int_latency_vector = interrupt_num;
+
+ if (__improbable(int_latency > cdp->cpu_max_observed_int_latency)) {
+ cdp->cpu_max_observed_int_latency = int_latency;
+ cdp->cpu_max_observed_int_latency_vector = interrupt_num;
}
}
* Having serviced the interrupt first, look at the interrupted stack depth.
*/
if (!user_mode) {
- uint64_t depth = cpu_data_ptr[cnum]->cpu_kernel_stack
+ uint64_t depth = cdp->cpu_kernel_stack
+ sizeof(struct x86_kernel_state)
+ sizeof(struct i386_exception_link *)
- rsp;
- if (depth > kernel_stack_depth_max) {
+ if (__improbable(depth > kernel_stack_depth_max)) {
kernel_stack_depth_max = (vm_offset_t)depth;
KERNEL_DEBUG_CONSTANT(
MACHDBG_CODE(DBG_MACH_SCHED, MACH_STACK_DEPTH),
(long) depth, (long) VM_KERNEL_UNSLIDE(rip), 0, 0, 0);
}
}
+
+ KERNEL_DEBUG_CONSTANT_IST(KDEBUG_TRACE,
+ MACHDBG_CODE(DBG_MACH_EXCP_INTR, 0) | DBG_FUNC_END,
+ interrupt_num, 0, 0, 0, 0);
+
}
static inline void
x86_saved_state_t *state,
uintptr_t *lo_spp)
{
-#ifdef __i386__
- x86_saved_state32_t *saved_state;
-#else
x86_saved_state64_t *saved_state;
-#endif
int code;
user_addr_t vaddr;
int type;
thread = current_thread();
-#ifdef __i386__
- if (__improbable(is_saved_state64(state))) {
- panic_64(state, 0, "Kernel trap with 64-bit state", FALSE);
- }
-
- saved_state = saved_state32(state);
-
- /* Record cpu where state was captured (trampolines don't set this) */
- saved_state->cpu = cpu_number();
-
- vaddr = (user_addr_t)saved_state->cr2;
- type = saved_state->trapno;
- code = saved_state->err & 0xffff;
- intr = (saved_state->efl & EFL_IF) != 0; /* state of ints at trap */
- kern_ip = (vm_offset_t)saved_state->eip;
-#else
if (__improbable(is_saved_state32(state)))
panic("kernel_trap(%p) with 32-bit state", state);
saved_state = saved_state64(state);
code = (int)(saved_state->isf.err & 0xffff);
intr = (saved_state->isf.rflags & EFL_IF) != 0; /* state of ints at trap */
kern_ip = (vm_offset_t)saved_state->isf.rip;
-#endif
myast = ast_pending();
fpSSEexterrflt();
return;
case T_DEBUG:
-#ifdef __i386__
- if ((saved_state->efl & EFL_TF) == 0 && NO_WATCHPOINTS)
-#else
if ((saved_state->isf.rflags & EFL_TF) == 0 && NO_WATCHPOINTS)
-#endif
{
/* We've somehow encountered a debug
* register match that does not belong
#endif
result = vm_fault(map,
- vm_map_trunc_page(vaddr),
+ vm_map_trunc_page(vaddr,
+ PAGE_MASK),
prot,
FALSE,
THREAD_UNINT, NULL, 0);
}
-#ifdef __i386__
-static void
-set_recovery_ip(x86_saved_state32_t *saved_state, vm_offset_t ip)
-{
- saved_state->eip = ip;
-}
-#else
static void
set_recovery_ip(x86_saved_state64_t *saved_state, vm_offset_t ip)
{
saved_state->isf.rip = ip;
}
-#endif
-
-#ifdef __i386__
-static void
-panic_trap(x86_saved_state32_t *regs)
-{
- const char *trapname = "Unknown";
- pal_cr_t cr0, cr2, cr3, cr4;
- pal_get_control_registers( &cr0, &cr2, &cr3, &cr4 );
-
- /*
- * Issue an I/O port read if one has been requested - this is an
- * event logic analyzers can use as a trigger point.
- */
- panic_io_port_read();
-
- kprintf("panic trap number 0x%x, eip 0x%x\n", regs->trapno, regs->eip);
- kprintf("cr0 0x%08x cr2 0x%08x cr3 0x%08x cr4 0x%08x\n",
- cr0, cr2, cr3, cr4);
-
- if (regs->trapno < TRAP_TYPES)
- trapname = trap_type[regs->trapno];
-#undef panic
- panic("Kernel trap at 0x%08x, type %d=%s, registers:\n"
- "CR0: 0x%08x, CR2: 0x%08x, CR3: 0x%08x, CR4: 0x%08x\n"
- "EAX: 0x%08x, EBX: 0x%08x, ECX: 0x%08x, EDX: 0x%08x\n"
- "CR2: 0x%08x, EBP: 0x%08x, ESI: 0x%08x, EDI: 0x%08x\n"
- "EFL: 0x%08x, EIP: 0x%08x, CS: 0x%08x, DS: 0x%08x\n"
- "Error code: 0x%08x%s\n",
- regs->eip, regs->trapno, trapname, cr0, cr2, cr3, cr4,
- regs->eax,regs->ebx,regs->ecx,regs->edx,
- regs->cr2,regs->ebp,regs->esi,regs->edi,
- regs->efl,regs->eip,regs->cs & 0xFFFF, regs->ds & 0xFFFF, regs->err,
- virtualized ? " VMM" : "");
- /*
- * This next statement is not executed,
- * but it's needed to stop the compiler using tail call optimization
- * for the panic call - which confuses the subsequent backtrace.
- */
- cr0 = 0;
-}
-#else
static void
*/
cr0 = 0;
}
-#endif
#if CONFIG_DTRACE
extern kern_return_t dtrace_user_probe(x86_saved_state_t *);
case T_PAGE_FAULT:
{
- prot = VM_PROT_READ;
+ prot = VM_PROT_READ;
if (err & T_PF_WRITE)
prot |= VM_PROT_WRITE;
if (__improbable(err & T_PF_EXECUTE))
prot |= VM_PROT_EXECUTE;
#endif
- kret = vm_fault(thread->map, vm_map_trunc_page(vaddr),
- prot, FALSE,
- THREAD_ABORTSAFE, NULL, 0);
+ kret = vm_fault(thread->map,
+ vm_map_trunc_page(vaddr,
+ PAGE_MASK),
+ prot, FALSE,
+ THREAD_ABORTSAFE, NULL, 0);
if (__probable((kret == KERN_SUCCESS) || (kret == KERN_ABORTED))) {
thread_exception_return();
- /* NOTREACHED */
+ /*NOTREACHED*/
}
user_page_fault_continue(kret);
pal_get_kern_regs( saved_state );
if ((kstack = current_thread()->kernel_stack) != 0) {
-#ifdef __i386__
- x86_saved_state32_t *regs = saved_state32(saved_state);
-#else
x86_saved_state64_t *regs = saved_state64(saved_state);
-#endif
iks = STACK_IKS(kstack);
/* Did we take the trap/interrupt in kernel mode? */
-#ifdef __i386__
- if (regs == USER_REGS32(current_thread()))
- record_active_regs = TRUE;
- else {
- iks->k_ebx = regs->ebx;
- iks->k_esp = (int)regs;
- iks->k_ebp = regs->ebp;
- iks->k_edi = regs->edi;
- iks->k_esi = regs->esi;
- iks->k_eip = regs->eip;
- }
-#else
if (regs == USER_REGS64(current_thread()))
record_active_regs = TRUE;
else {
iks->k_r15 = regs->r15;
iks->k_rip = regs->isf.rip;
}
-#endif
}
if (record_active_regs == TRUE) {
-#ifdef __i386__
- /* Show the trap handler path */
- __asm__ volatile("movl %%ebx, %0" : "=m" (iks->k_ebx));
- __asm__ volatile("movl %%esp, %0" : "=m" (iks->k_esp));
- __asm__ volatile("movl %%ebp, %0" : "=m" (iks->k_ebp));
- __asm__ volatile("movl %%edi, %0" : "=m" (iks->k_edi));
- __asm__ volatile("movl %%esi, %0" : "=m" (iks->k_esi));
- /* "Current" instruction pointer */
- __asm__ volatile("movl $1f, %0\n1:" : "=m" (iks->k_eip));
-#else
/* Show the trap handler path */
__asm__ volatile("movq %%rbx, %0" : "=m" (iks->k_rbx));
__asm__ volatile("movq %%rsp, %0" : "=m" (iks->k_rsp));
: "=m" (iks->k_rip)
:
: "rax");
-#endif
}
}
if ((kstack = current_thread()->kernel_stack) != 0) {
iks = STACK_IKS(kstack);
-#ifdef __i386__
- /* Display the trap handler path */
- __asm__ volatile("movl %%ebx, %0" : "=m" (iks->k_ebx));
- __asm__ volatile("movl %%esp, %0" : "=m" (iks->k_esp));
- __asm__ volatile("movl %%ebp, %0" : "=m" (iks->k_ebp));
- __asm__ volatile("movl %%edi, %0" : "=m" (iks->k_edi));
- __asm__ volatile("movl %%esi, %0" : "=m" (iks->k_esi));
- /* "Current" instruction pointer */
- __asm__ volatile("movl $1f, %0\n1:" : "=m" (iks->k_eip));
-#else
/* Display the trap handler path */
__asm__ volatile("movq %%rbx, %0" : "=m" (iks->k_rbx));
__asm__ volatile("movq %%rsp, %0" : "=m" (iks->k_rsp));
__asm__ volatile("movq %%r15, %0" : "=m" (iks->k_r15));
/* "Current" instruction pointer */
__asm__ volatile("leaq 1f(%%rip), %%rax; mov %%rax, %0\n1:" : "=m" (iks->k_rip)::"rax");
-#endif
}
}