xnu-792.25.20.tar.gz

[apple/xnu.git] / osfmk / i386 / tss.h

diff --git a/osfmk/i386/tss.h b/osfmk/i386/tss.h
index 92e5de8769d0151578749a811a79aacbb438425b..85dc5333b5c1bae10d21b1d2a89aa7836e4fdd61 100644 (file)
--- a/osfmk/i386/tss.h
+++ b/osfmk/i386/tss.h
@@ -3,22 +3,19 @@
  *
  * @APPLE_LICENSE_HEADER_START@
  * 
  *
  * @APPLE_LICENSE_HEADER_START@
  * 

- * Copyright (c) 1999-2003 Apple Computer, Inc.  All Rights Reserved.
+ * The contents of this file constitute Original Code as defined in and
+ * are subject to the Apple Public Source License Version 1.1 (the
+ * "License").  You may not use this file except in compliance with the
+ * License.  Please obtain a copy of the License at
+ * http://www.apple.com/publicsource and read it before using this file.

  * 
  * 

- * This file contains Original Code and/or Modifications of Original Code
- * as defined in and that are subject to the Apple Public Source License
- * Version 2.0 (the 'License'). You may not use this file except in
- * compliance with the License. Please obtain a copy of the License at
- * http://www.opensource.apple.com/apsl/ and read it before using this
- * file.
- * 
- * The Original Code and all software distributed under the License are
- * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
+ * This Original Code and all software distributed under the License are
+ * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER

  * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
  * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
  * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
  * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,

- * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
- * Please see the License for the specific language governing rights and
- * limitations under the License.
+ * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT.  Please see the
+ * License for the specific language governing rights and limitations
+ * under the License.

  * 
  * @APPLE_LICENSE_HEADER_END@
  */
  * 
  * @APPLE_LICENSE_HEADER_END@
  */


@@ -56,41 +53,75 @@
 #ifndef        _I386_TSS_H_
 #define        _I386_TSS_H_
 
 #ifndef        _I386_TSS_H_
 #define        _I386_TSS_H_
 

+#include <stdint.h>
+

 /*
  *     i386 Task State Segment
  */
 struct i386_tss {
 /*
  *     i386 Task State Segment
  */
 struct i386_tss {

-       int             back_link;      /* segment number of previous task,
+       uint32_t        back_link;      /* segment number of previous task,

                                           if nested */
                                           if nested */

-       int             esp0;           /* initial stack pointer ... */
-       int             ss0;            /* and segment for ring 0 */
-       int             esp1;           /* initial stack pointer ... */
-       int             ss1;            /* and segment for ring 1 */
-       int             esp2;           /* initial stack pointer ... */
-       int             ss2;            /* and segment for ring 2 */
-       int             cr3;            /* CR3 - page table directory
+       uint32_t        esp0;           /* initial stack pointer ... */
+       uint32_t        ss0;            /* and segment for ring 0 */
+       uint32_t        esp1;           /* initial stack pointer ... */
+       uint32_t        ss1;            /* and segment for ring 1 */
+       uint32_t        esp2;           /* initial stack pointer ... */
+       uint32_t        ss2;            /* and segment for ring 2 */
+       uint32_t        cr3;            /* CR3 - page table directory

                                                 physical address */
                                                 physical address */

-       int             eip;
-       int             eflags;
-       int             eax;
-       int             ecx;
-       int             edx;
-       int             ebx;
-       int             esp;            /* current stack pointer */
-       int             ebp;
-       int             esi;
-       int             edi;
-       int             es;
-       int             cs;
-       int             ss;             /* current stack segment */
-       int             ds;
-       int             fs;
-       int             gs;
-       int             ldt;            /* local descriptor table segment */
-       unsigned short  trace_trap;     /* trap on switch to this task */
-       unsigned short  io_bit_map_offset;
+       uint32_t        eip;
+       uint32_t        eflags;
+       uint32_t        eax;
+       uint32_t        ecx;
+       uint32_t        edx;
+       uint32_t        ebx;
+       uint32_t        esp;            /* current stack pointer */
+       uint32_t        ebp;
+       uint32_t        esi;
+       uint32_t        edi;
+       uint32_t        es;
+       uint32_t        cs;
+       uint32_t        ss;             /* current stack segment */
+       uint32_t        ds;
+       uint32_t        fs;
+       uint32_t        gs;
+       uint32_t        ldt;            /* local descriptor table segment */
+       uint16_t        trace_trap;     /* trap on switch to this task */
+       uint16_t        io_bit_map_offset;

                                        /* offset to start of IO permission
                                           bit map */
 };
 
                                        /* offset to start of IO permission
                                           bit map */
 };
 

+/*
+ * Temporary stack used on kernel entry via the sysenter instruction.
+ * Its top points on to the PCB save area. It must contain space for
+ * a single interrupt stack frame in case of single-stepping over the sysenter.
+ * Although this is defined as a 64-bit stack, the space is also used in
+ * 32-bit legacy mode. For 64-bit the stack is 16-byte aligned.
+ */
+struct sysenter_stack {
+       uint64_t        stack[16];      /* Space for a 64-bit frame and some */
+       uint64_t        top;            /* Top and pointer to ISS in PCS */
+};
+
+struct x86_64_tss {
+       uint32_t        reserved1;
+       uint64_t        rsp0;           /* stack pointer for CPL0 */
+       uint64_t        rsp1;           /* stack pointer for CPL1 */
+       uint64_t        rsp2;           /* stack pointer for CPL2 */
+       uint32_t        reserved2;
+       uint32_t        reserved3;
+       uint64_t        ist1;           /* interrupt stack table 1 */
+       uint64_t        ist2;           /* interrupt stack table 2 */
+       uint64_t        ist3;           /* interrupt stack table 3 */
+       uint64_t        ist4;           /* interrupt stack table 4 */
+       uint64_t        ist5;           /* interrupt stack table 5 */
+       uint64_t        ist6;           /* interrupt stack table 6 */
+       uint64_t        ist7;           /* interrupt stack table 7 */
+       uint32_t        reserved4;
+       uint32_t        reserved5;
+       uint16_t        reserved6;
+       uint16_t        io_bit_map_offset;
+                                       /* offset to IO permission bit map */
+};

 #endif /* _I386_TSS_H_ */
 #endif /* _I386_TSS_H_ */