xnu-517.3.15.tar.gz

[apple/xnu.git] / osfmk / ppc / exception.h

diff --git a/osfmk/ppc/exception.h b/osfmk/ppc/exception.h
index 355c1074fe39decd91f31d3e089d4bf667180f9a..9584449e8b4502d66211da87b78a94a7efab17b8 100644 (file)
--- a/osfmk/ppc/exception.h
+++ b/osfmk/ppc/exception.h
@@ -3,19 +3,22 @@
  *
  * @APPLE_LICENSE_HEADER_START@
  * 
  *
  * @APPLE_LICENSE_HEADER_START@
  * 

- * The contents of this file constitute Original Code as defined in and
- * are subject to the Apple Public Source License Version 1.1 (the
- * "License").  You may not use this file except in compliance with the
- * License.  Please obtain a copy of the License at
- * http://www.apple.com/publicsource and read it before using this file.
+ * Copyright (c) 1999-2003 Apple Computer, Inc.  All Rights Reserved.

  * 
  * 

- * This Original Code and all software distributed under the License are
- * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
+ * This file contains Original Code and/or Modifications of Original Code
+ * as defined in and that are subject to the Apple Public Source License
+ * Version 2.0 (the 'License'). You may not use this file except in
+ * compliance with the License. Please obtain a copy of the License at
+ * http://www.opensource.apple.com/apsl/ and read it before using this
+ * file.
+ * 
+ * The Original Code and all software distributed under the License are
+ * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER

  * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
  * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
  * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
  * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,

- * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT.  Please see the
- * License for the specific language governing rights and limitations
- * under the License.
+ * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
+ * Please see the License for the specific language governing rights and
+ * limitations under the License.

  * 
  * @APPLE_LICENSE_HEADER_END@
  */
  * 
  * @APPLE_LICENSE_HEADER_END@
  */


@@ -30,6 +33,8 @@
 #ifndef _PPC_EXCEPTION_H_
 #define _PPC_EXCEPTION_H_
 
 #ifndef _PPC_EXCEPTION_H_
 #define _PPC_EXCEPTION_H_
 

+#include <ppc/savearea.h>
+

 #ifndef ASSEMBLER
 
 #include <cpus.h>
 #ifndef ASSEMBLER
 
 #include <cpus.h>


@@ -38,13 +43,15 @@
 
 #include <mach/machine/vm_types.h>
 #include <mach/boolean.h>
 
 #include <mach/machine/vm_types.h>
 #include <mach/boolean.h>

+#include <kern/cpu_data.h>

 #include <pexpert/pexpert.h>
 #include <IOKit/IOInterrupts.h>
 #include <ppc/machine_routines.h>
 
 /*     Per processor CPU features */
 #include <pexpert/pexpert.h>
 #include <IOKit/IOInterrupts.h>
 #include <ppc/machine_routines.h>
 
 /*     Per processor CPU features */

+#pragma pack(4)                                                        /* Make sure the structure stays as we defined it */

 struct procFeatures {
 struct procFeatures {

-       unsigned int    Available;
+       unsigned int    Available;                      /* 0x000 */

 #define pfFloat                0x80000000
 #define pfFloatb       0
 #define pfAltivec      0x40000000
 #define pfFloat                0x80000000
 #define pfFloatb       0
 #define pfAltivec      0x40000000


@@ -63,10 +70,24 @@ struct procFeatures {
 #define pfThermalb     7
 #define pfThermInt     0x00800000
 #define pfThermIntb    8
 #define pfThermalb     7
 #define pfThermInt     0x00800000
 #define pfThermIntb    8

-#define pfSlowNap      0x00004000
-#define pfSlowNapb     17
-#define pfNoMuMMCK     0x00002000
-#define pfNoMuMMCKb    18
+#define pfSlowNap      0x00400000
+#define pfSlowNapb     9
+#define pfNoMuMMCK     0x00200000
+#define pfNoMuMMCKb    10
+#define pfNoL2PFNap    0x00100000
+#define pfNoL2PFNapb   11
+#define pfSCOMFixUp    0x00080000
+#define pfSCOMFixUpb   12
+#define        pfHasDcba       0x00040000
+#define        pfHasDcbab      13
+#define        pfL1fa          0x00010000
+#define        pfL1fab         15
+#define pfL2           0x00008000
+#define pfL2b          16
+#define pfL2fa         0x00004000
+#define pfL2fab                17
+#define pfL2i          0x00002000
+#define pfL2ib         18

 #define pfLClck                0x00001000
 #define pfLClckb       19
 #define pfWillNap      0x00000800
 #define pfLClck                0x00001000
 #define pfLClckb       19
 #define pfWillNap      0x00000800


@@ -75,49 +96,56 @@ struct procFeatures {
 #define pfNoMSRirb     21
 #define pfL3pdet       0x00000200
 #define pfL3pdetb      22
 #define pfNoMSRirb     21
 #define pfL3pdet       0x00000200
 #define pfL3pdetb      22

-#define pfL1i          0x00000100
-#define pfL1ib         23
-#define pfL1d          0x00000080
-#define pfL1db         24
-#define pfL1fa         0x00000040
-#define pfL1fab                25
-#define pfL2           0x00000020
-#define pfL2b          26
-#define pfL2fa         0x00000010
-#define pfL2fab                27
-#define pfL2i          0x00000008
-#define pfL2ib         28
+#define        pf128Byte       0x00000080
+#define        pf128Byteb      24
+#define        pf32Byte        0x00000020
+#define        pf32Byteb       26
+#define        pf64Bit         0x00000010
+#define        pf64Bitb        27

 #define pfL3           0x00000004
 #define pfL3b          29
 #define pfL3fa         0x00000002
 #define pfL3fab                30
 #define pfValid                0x00000001
 #define pfValidb       31
 #define pfL3           0x00000004
 #define pfL3b          29
 #define pfL3fa         0x00000002
 #define pfL3fab                30
 #define pfValid                0x00000001
 #define pfValidb       31

-       unsigned short  rptdProc;
-       unsigned short  lineSize;
-       unsigned int    l1iSize;
-       unsigned int    l1dSize;
-       unsigned int    l2cr;
-       unsigned int    l2Size;
-       unsigned int    l3cr;
-       unsigned int    l3Size;
-       unsigned int    pfHID0;
-       unsigned int    pfHID1;
-       unsigned int    pfHID2;
-       unsigned int    pfHID3;
-       unsigned int    pfMSSCR0;
-       unsigned int    pfMSSCR1;
-       unsigned int    pfICTRL;
-       unsigned int    pfLDSTCR;
-       unsigned int    pfLDSTDB;
-       unsigned int    l2crOriginal;
-       unsigned int    l3crOriginal;
-       unsigned int    pfBootConfig;
-       unsigned int    reserved[4];
+       unsigned short  rptdProc;                       /* 0x004 */
+       unsigned short  lineSize;                       /* 0x006 */
+       unsigned int    l1iSize;                        /* 0x008 */
+       unsigned int    l1dSize;                        /* 0x00C */
+       unsigned int    l2cr;                           /* 0x010 */
+       unsigned int    l2Size;                         /* 0x014 */
+       unsigned int    l3cr;                           /* 0x018 */
+       unsigned int    l3Size;                         /* 0x01C */
+       unsigned int    pfMSSCR0;                       /* 0x020 */
+       unsigned int    pfMSSCR1;                       /* 0x024 */
+       unsigned int    pfICTRL;                        /* 0x028 */
+       unsigned int    pfLDSTCR;                       /* 0x02C */
+       unsigned int    pfLDSTDB;                       /* 0x030 */
+       unsigned int    pfMaxVAddr;                     /* 0x034 */
+       unsigned int    pfMaxPAddr;                     /* 0x038 */
+       unsigned int    pfPTEG;                         /* 0x03C */
+       uint64_t                pfHID0;                         /* 0x040 */
+       uint64_t                pfHID1;                         /* 0x048 */
+       uint64_t                pfHID2;                         /* 0x050 */
+       uint64_t                pfHID3;                         /* 0x058 */
+       uint64_t                pfHID4;                         /* 0x060 */
+       uint64_t                pfHID5;                         /* 0x068 */
+       unsigned int    l2crOriginal;           /* 0x070 */
+       unsigned int    l3crOriginal;           /* 0x074 */
+       unsigned int    pfBootConfig;           /* 0x078 */
+       unsigned int    pfPowerModes;           /* 0x07C */
+#define pmDPLLVmin             0x00010000
+#define pmDPLLVminb            15
+#define pmPowerTune            0x00000004
+#define pmPowerTuneb   29
+#define pmDualPLL              0x00000001
+#define pmDualPLLb             31

 };
 };

+#pragma pack()

 
 typedef struct procFeatures procFeatures;
 
 
 typedef struct procFeatures procFeatures;
 

+#pragma pack(4)                                                        /* Make sure the structure stays as we defined it */

 struct thrmControl {
        unsigned int    maxTemp;                        /* Maximum temprature before damage */
        unsigned int    throttleTemp;           /* Temprature at which to throttle down */
 struct thrmControl {
        unsigned int    maxTemp;                        /* Maximum temprature before damage */
        unsigned int    throttleTemp;           /* Temprature at which to throttle down */


@@ -126,11 +154,130 @@ struct thrmControl {
        unsigned int    thrm3val;                       /* Value for thrm3 register */
        unsigned int    rsvd[3];                        /* Pad to cache line */
 };
        unsigned int    thrm3val;                       /* Value for thrm3 register */
        unsigned int    rsvd[3];                        /* Pad to cache line */
 };

+#pragma pack()

 
 typedef struct thrmControl thrmControl;
 
 
 typedef struct thrmControl thrmControl;
 

+/*
+ *
+ *             Various performance counters
+ */
+#pragma pack(4)                                                        /* Make sure the structure stays as we defined it */
+struct hwCtrs {        
+
+       unsigned int    hwInVains;                              /* In vain */
+       unsigned int    hwResets;                               /* Reset */
+       unsigned int    hwMachineChecks;                /* Machine check */
+       unsigned int    hwDSIs;                                 /* DSIs */
+       unsigned int    hwISIs;                                 /* ISIs */
+       unsigned int    hwExternals;                    /* Externals */
+       unsigned int    hwAlignments;                   /* Alignment */
+       unsigned int    hwPrograms;                     /* Program */
+       unsigned int    hwFloatPointUnavailable;        /* Floating point */
+       unsigned int    hwDecrementers;                 /* Decrementer */
+       unsigned int    hwIOErrors;                     /* I/O error */
+       unsigned int    hwrsvd0;                                /* Reserved */
+       unsigned int    hwSystemCalls;                  /* System call */
+       unsigned int    hwTraces;                               /* Trace */
+       unsigned int    hwFloatingPointAssists; /* Floating point assist */
+       unsigned int    hwPerformanceMonitors;  /* Performance monitor */
+       unsigned int    hwAltivecs;                     /* VMX */
+       unsigned int    hwrsvd1;                                /* Reserved */
+       unsigned int    hwrsvd2;                                /* Reserved */
+       unsigned int    hwrsvd3;                                /* Reserved */
+       unsigned int    hwInstBreakpoints;              /* Instruction breakpoint */
+       unsigned int    hwSystemManagements;    /* System management */
+       unsigned int    hwAltivecAssists;               /* Altivec Assist */
+       unsigned int    hwThermal;                              /* Thermals */
+       unsigned int    hwrsvd5;                                /* Reserved */
+       unsigned int    hwrsvd6;                                /* Reserved */
+       unsigned int    hwrsvd7;                                /* Reserved */
+       unsigned int    hwrsvd8;                                /* Reserved */
+       unsigned int    hwrsvd9;                                /* Reserved */
+       unsigned int    hwrsvd10;                               /* Reserved */
+       unsigned int    hwrsvd11;                               /* Reserved */
+       unsigned int    hwrsvd12;                               /* Reserved */
+       unsigned int    hwrsvd13;                               /* Reserved */
+       unsigned int    hwTrace601;                             /* Trace */
+       unsigned int    hwSIGPs;                                /* SIGP */
+       unsigned int    hwPreemptions;                  /* Preemption */
+       unsigned int    hwContextSwitchs;               /* Context switch */
+       unsigned int    hwShutdowns;                    /* Shutdowns */
+       unsigned int    hwChokes;                               /* System ABENDs */
+       unsigned int    hwDataSegments;                 /* Data Segment Interruptions */
+       unsigned int    hwInstructionSegments;  /* Instruction Segment Interruptions */
+       unsigned int    hwSoftPatches;                  /* Soft Patch interruptions */
+       unsigned int    hwMaintenances;                 /* Maintenance interruptions */
+       unsigned int    hwInstrumentations;             /* Instrumentation interruptions */
+       unsigned int    hwrsvd14;                               /* Reswerved */
+/*                                                                                     0x0B4 */
+
+       unsigned int    hwspare0[17];                   /* Reserved */
+       unsigned int    hwRedrives;                             /* Number of redriven interrupts */
+       unsigned int    hwSteals;                               /* PTE Steals */
+/*                                                                                     0x100 */
+
+       unsigned int    hwMckHang;                              /* ? */
+       unsigned int    hwMckSLBPE;                             /* ? */
+       unsigned int    hwMckTLBPE;                             /* ? */
+       unsigned int    hwMckERCPE;                             /* ? */
+       unsigned int    hwMckL1DPE;                             /* ? */
+       unsigned int    hwMckL1TPE;                             /* ? */
+       unsigned int    hwMckUE;                                /* ? */
+       unsigned int    hwMckIUE;                               /* ? */
+       unsigned int    hwMckIUEr;                              /* ? */
+       unsigned int    hwMckDUE;                               /* ? */
+       unsigned int    hwMckDTW;                               /* ? */
+       unsigned int    hwMckUnk;                               /* ? */
+       unsigned int    hwMckExt;                               /* ? */
+       unsigned int    hwMckICachePE;                  /* ? */
+       unsigned int    hwMckITagPE;                    /* ? */
+       unsigned int    hwMckIEratPE;                   /* ? */
+       unsigned int    hwMckDEratPE;                   /* ? */
+       unsigned int    hwspare2[15];                   /* Pad to next 128 bndry */
+/*                                                                                     0x180 */
+
+       unsigned int    napStamp[2];                    /* Time base when we napped */
+       unsigned int    napTotal[2];                    /* Total nap time in ticks */
+       unsigned int    numSIGPast;                             /* Number of SIGP asts recieved */
+       unsigned int    numSIGPcpureq;                  /* Number of SIGP cpu requests recieved */
+       unsigned int    numSIGPdebug;                   /* Number of SIGP debugs recieved */
+       unsigned int    numSIGPwake;                    /* Number of SIGP wakes recieved */
+       unsigned int    numSIGPtimo;                    /* Number of SIGP send timeouts */
+       unsigned int    numSIGPmast;                    /* Number of SIGPast messages merged */
+       unsigned int    numSIGPmwake;                   /* Number of SIGPwake messages merged */
+       
+       unsigned int    hwspare3[21];                   /* Pad to 512 */
+       
+};
+#pragma pack()
+
+typedef struct hwCtrs hwCtrs;
+
+struct patch_entry {
+       unsigned int    *addr;
+       unsigned int    data;
+       unsigned int    type;
+       unsigned int    value;
+};
+
+typedef struct patch_entry patch_entry_t;
+
+#define        PATCH_INVALID           0
+#define        PATCH_PROCESSOR         1
+#define        PATCH_FEATURE           2
+
+#define PATCH_TABLE_SIZE       12
+
+#define PatchExt32             0x80000000
+#define PatchExt32b            0
+#define PatchLwsync            0x40000000
+#define PatchLwsyncb   1
+

 /* When an exception is taken, this info is accessed via sprg0 */
 /* We should always have this one on a cache line boundary */
 /* When an exception is taken, this info is accessed via sprg0 */
 /* We should always have this one on a cache line boundary */

+
+#pragma pack(4)                                                        /* Make sure the structure stays as we defined it */

 struct per_proc_info {
        unsigned short  cpu_number;
        unsigned short  cpu_flags;                      /* Various low-level flags */
 struct per_proc_info {
        unsigned short  cpu_number;
        unsigned short  cpu_flags;                      /* Various low-level flags */


@@ -140,50 +287,47 @@ struct per_proc_info {
        vm_offset_t     debstackptr;
        vm_offset_t     debstack_top_ss;
 
        vm_offset_t     debstackptr;
        vm_offset_t     debstack_top_ss;
 

-       unsigned int    tempwork1;                      /* Temp work area - monitor use carefully */
-       unsigned int    save_exception_type;
+       unsigned int    spcFlags;                       /* Special thread flags */
+       unsigned int    Uassist;                        /* User Assist Word */

        unsigned int    old_thread;
 
        /* PPC cache line boundary here - 020 */
 
        unsigned int    old_thread;
 
        /* PPC cache line boundary here - 020 */
 

-       unsigned int    active_kloaded;         /* pointer to active_kloaded[CPU_NO] */
-       unsigned int    cpu_data;                       /* pointer to cpu_data[CPU_NO] */
+       unsigned int    rsrvd020[2];

        unsigned int    need_ast;                       /* pointer to need_ast[CPU_NO] */
 /*
  *     Note: the following two pairs of words need to stay in order and each pair must
  *     be in the same reservation (line) granule 
  */
        unsigned int    need_ast;                       /* pointer to need_ast[CPU_NO] */
 /*
  *     Note: the following two pairs of words need to stay in order and each pair must
  *     be in the same reservation (line) granule 
  */

-       unsigned int    FPU_thread;                     /* Thread owning the FPU on this cpu.*/
-       unsigned int    FPU_vmmCtx;                     /* Owing virtual machine context */
-       unsigned int    VMX_thread;                     /* Thread owning the VMX on this cpu */
-       unsigned int    VMX_vmmCtx;                     /* Owing virtual machine context */
-       unsigned int    active_stacks;          /* pointer to active_stacks[CPU_NO] */
+       struct facility_context *FPU_owner;     /* Owner of the FPU on this cpu */
+       unsigned int    liveVRSave;                     /* VRSave assiciated with live vector registers */
+       struct facility_context *VMX_owner;     /* Owner of the VMX on this cpu */
+       unsigned int    holdQFret;                      /* Hold off releasing quickfret list */
+       unsigned int    save_exception_type;

 
        /* PPC cache line boundary here - 040 */
 
        /* PPC cache line boundary here - 040 */

-       unsigned int    quickfret;                      /* Pointer to savearea for exception exit to free */
-       unsigned int    Lastpmap;                       /* Last user pmap loaded  */
-       unsigned int    userspace;                      /* Last loaded user memory space ID  */
-       unsigned int    userpmap;                       /* User pmap - real address */
-       unsigned int    liveVRSave;                     /* VRSave assiciated with live vector registers */
-       unsigned int    spcFlags;                       /* Special thread flags */
-       unsigned int    liveFPSCR;                      /* FPSCR which is for the live context */
+       addr64_t                quickfret;                      /* List of saveareas to release */
+       addr64_t                lclfree;                        /* Pointer to local savearea list */
+       unsigned int    lclfreecnt;                     /* Entries in local savearea list */
+       unsigned int    spcTRc;                         /* Special trace count */
+       unsigned int    spcTRp;                         /* Special trace buffer pointer */

        unsigned int    ppbbTaskEnv;            /* BlueBox Task Environment */
 
        /* PPC cache line boundary here - 060 */
        boolean_t               interrupts_enabled;
        unsigned int    ppbbTaskEnv;            /* BlueBox Task Environment */
 
        /* PPC cache line boundary here - 060 */
        boolean_t               interrupts_enabled;

-       unsigned int    rsrvd064;

        IOInterruptHandler      interrupt_handler;
        void *                  interrupt_nub;
        unsigned int    interrupt_source;
        void *                  interrupt_target;
        void *                  interrupt_refCon;
        IOInterruptHandler      interrupt_handler;
        void *                  interrupt_nub;
        unsigned int    interrupt_source;
        void *                  interrupt_target;
        void *                  interrupt_refCon;

-       unsigned int    savedSave;                      /* Savearea saved across sleep - must be 0 at boot */
+       uint64_t                next_savearea;                  /* pointer to the next savearea */

 
        /* PPC cache line boundary here - 080 */
        unsigned int    MPsigpStat;                     /* Signal Processor status (interlocked update for this one) */
 
        /* PPC cache line boundary here - 080 */
        unsigned int    MPsigpStat;                     /* Signal Processor status (interlocked update for this one) */

-#define MPsigpMsgp             0xC0000000              /* Message pending (busy + pass) */
+#define MPsigpMsgp             0xC0000000              /* Message pending (busy + pass ) */

 #define MPsigpBusy             0x80000000              /* Processor area busy, i.e., locked */
 #define MPsigpPass             0x40000000              /* Busy lock passed to receiving processor */
 #define MPsigpBusy             0x80000000              /* Processor area busy, i.e., locked */
 #define MPsigpPass             0x40000000              /* Busy lock passed to receiving processor */

+#define MPsigpAck              0x20000000              /* Ack Busy lock passed to receiving processor */

 #define MPsigpSrc              0x000000FF              /* Processor that owns busy, i.e., the ID of */
                                                                                /*   whomever set busy. When a busy is passed, */
                                                                                /*   this is the requestor of the function. */
 #define MPsigpSrc              0x000000FF              /* Processor that owns busy, i.e., the ID of */
                                                                                /*   whomever set busy. When a busy is passed, */
                                                                                /*   this is the requestor of the function. */


@@ -196,6 +340,9 @@ struct per_proc_info {
 #define SIGPwake       3                                       /* Wake up a sleeping processor */
 #define CPRQtemp       0                                       /* Get temprature of processor */
 #define CPRQtimebase   1                                       /* Get timebase of processor */
 #define SIGPwake       3                                       /* Wake up a sleeping processor */
 #define CPRQtemp       0                                       /* Get temprature of processor */
 #define CPRQtimebase   1                                       /* Get timebase of processor */

+#define CPRQsegload    2                                       /* Segment registers reload */
+#define CPRQscom       3                                       /* SCOM */
+#define CPRQchud       4                                       /* CHUD perfmon */

        unsigned int    MPsigpParm0;            /* SIGP parm 0 */
        unsigned int    MPsigpParm1;            /* SIGP parm 1 */
        unsigned int    MPsigpParm2;            /* SIGP parm 2 */
        unsigned int    MPsigpParm0;            /* SIGP parm 0 */
        unsigned int    MPsigpParm1;            /* SIGP parm 1 */
        unsigned int    MPsigpParm2;            /* SIGP parm 2 */


@@ -206,37 +353,79 @@ struct per_proc_info {
        /* PPC cache line boundary here - 0A0 */
        procFeatures    pf;                                     /* Processor features */
        
        /* PPC cache line boundary here - 0A0 */
        procFeatures    pf;                                     /* Processor features */
        

-       /* PPC cache line boundary here - 100 */
-       thrmControl             thrm;                           /* Thermal controls */
-       

        /* PPC cache line boundary here - 120 */
        /* PPC cache line boundary here - 120 */

-       unsigned int    napStamp[2];            /* Time base when we napped */
-       unsigned int    napTotal[2];            /* Total nap time in ticks */
-       unsigned int    numSIGPast;                     /* Number of SIGP asts recieved */
-       unsigned int    numSIGPcpureq;          /* Number of SIGP cpu requests recieved */
-       unsigned int    numSIGPdebug;           /* Number of SIGP debugs recieved */
-       unsigned int    numSIGPwake;            /* Number of SIGP wakes recieved */
+       thrmControl             thrm;                           /* Thermal controls */

        
        /* PPC cache line boundary here - 140 */
        
        /* PPC cache line boundary here - 140 */

-       unsigned int    spcTRc;                         /* Special trace count */
-       unsigned int    spcTRp;                         /* Special trace buffer pointer */
-       unsigned int    Uassist;                        /* User Assist Word */
-       unsigned int    rsrvd14C[5];            /* Reserved slots */
+       unsigned int    ppRsvd140[8];           /* Reserved */

        
        /* PPC cache line boundary here - 160 */
        time_base_enable_t      time_base_enable;
        
        /* PPC cache line boundary here - 160 */
        time_base_enable_t      time_base_enable;

-       unsigned int    rsrvd164[7];            /* Reserved slots */
+       unsigned int    ppRsvd164[4];           /* Reserved */
+       cpu_data_t              pp_cpu_data;            /* cpu data info */

        
        /* PPC cache line boundary here - 180 */
        
        /* PPC cache line boundary here - 180 */

-       unsigned int    rsrvd180[8];            /* Reserved slots */
+       unsigned int    ppRsvd180[2];           /* Reserved */
+       uint64_t                validSegs;                      /* Valid SR/STB slots */
+       addr64_t                ppUserPmap;                     /* Current user state pmap (physical address) */
+       unsigned int    ppUserPmapVirt;         /* Current user state pmap (virtual address) */
+       unsigned int    ppMapFlags;                     /* Mapping flags */

        
        /* PPC cache line boundary here - 1A0 */
        
        /* PPC cache line boundary here - 1A0 */

-       unsigned int    rsrvd1A0[8];            /* Reserved slots */
+       unsigned short  ppInvSeg;                       /* Forces complete invalidate of SRs/SLB (this must stay with ppInvSeg) */
+       unsigned short  ppCurSeg;                       /* Set to 1 if user segments, 0 if kernel (this must stay with ppInvSeg) */
+       unsigned int    ppSegSteal;                     /* Count of segment slot steals */
+       ppnum_t                 VMMareaPhys;            /* vmm state page physical addr */
+       unsigned int    VMMXAFlgs;                      /* vmm extended flags */
+       unsigned int    FAMintercept;           /* vmm FAM Exceptions to intercept */
+       unsigned int    rsrvd1B4[3];            /* Reserved slots */

        
        /* PPC cache line boundary here - 1C0 */
        
        /* PPC cache line boundary here - 1C0 */

-       unsigned int    rsrvd1C0[8];            /* Reserved slots */
+       unsigned int    ppCIOmp[16];            /* Linkage mapping for copyin/out - 64 bytes */
+       
+       /* PPC cache line boundary here - 200 */
+       uint64_t                tempr0;                         /* temporary savearea */
+       uint64_t                tempr1;                 
+       uint64_t                tempr2;
+       uint64_t                tempr3;
+
+       uint64_t                tempr4;                         
+       uint64_t                tempr5;
+       uint64_t                tempr6;
+       uint64_t                tempr7;
+
+       uint64_t                tempr8;
+       uint64_t                tempr9;
+       uint64_t                tempr10;
+       uint64_t                tempr11;
+       
+       uint64_t                tempr12;
+       uint64_t                tempr13;
+       uint64_t                tempr14;
+       uint64_t                tempr15;

        
        

-       /* PPC cache line boundary here - 1E0 */
+       uint64_t                tempr16;
+       uint64_t                tempr17;
+       uint64_t                tempr18;
+       uint64_t                tempr19;
+
+       uint64_t                tempr20;
+       uint64_t                tempr21;
+       uint64_t                tempr22;
+       uint64_t                tempr23;
+       
+       uint64_t                tempr24;
+       uint64_t                tempr25;
+       uint64_t                tempr26;
+       uint64_t                tempr27;
+       
+       uint64_t                tempr28;
+       uint64_t                tempr29;
+       uint64_t                tempr30;
+       uint64_t                tempr31;
+
+
+       /* PPC cache line boundary here - 300 */

        double                  emfp0;                          /* Copies of floating point registers */
        double                  emfp1;                          /* Used for emulation purposes */
        double                  emfp2;
        double                  emfp0;                          /* Copies of floating point registers */
        double                  emfp1;                          /* Used for emulation purposes */
        double                  emfp2;


@@ -277,12 +466,12 @@ struct per_proc_info {
        double                  emfp30;
        double                  emfp31;
 
        double                  emfp30;
        double                  emfp31;
 

-/*                                                                - 2E0 */
+/*                                                                - 400 */

        unsigned int    emfpscr_pad;
        unsigned int    emfpscr;
        unsigned int    empadfp[6];
        
        unsigned int    emfpscr_pad;
        unsigned int    emfpscr;
        unsigned int    empadfp[6];
        

-/*                                                                - 300 */
+/*                                                                - 420 */

        unsigned int    emvr0[4];                       /* Copies of vector registers used both */
        unsigned int    emvr1[4];                       /* for full vector emulation or */
        unsigned int    emvr2[4];                       /* as saveareas while assisting denorms */
        unsigned int    emvr0[4];                       /* Copies of vector registers used both */
        unsigned int    emvr1[4];                       /* for full vector emulation or */
        unsigned int    emvr2[4];                       /* as saveareas while assisting denorms */


@@ -317,249 +506,37 @@ struct per_proc_info {
        unsigned int    emvr31[4];
        unsigned int    emvscr[4];                      
        unsigned int    empadvr[4];                     
        unsigned int    emvr31[4];
        unsigned int    emvscr[4];                      
        unsigned int    empadvr[4];                     

-/*                                                                - 520 */
+/*                                                                - 640 */
+/* note implicit dependence on kSkipListMaxLists, which must be <= 28 */
+    addr64_t           skipListPrev[28];       /* prev ptrs saved as side effect of calling mapSearchFull() */
+    
+/*                                                                - 720 */

 
        unsigned int    patcharea[56];
 
        unsigned int    patcharea[56];

-/*                                                                - 600 */
+/*                                                                - 800 */

 
 

-};
+       hwCtrs                  hwCtr;                                  /* Hardware exception counters */
+/*                                                                - A00 */

 
 

+       unsigned int    pppadpage[384];                 /* Pad to end of page */
+/*                                                                - 1000 */

 
 

-extern struct per_proc_info per_proc_info[NCPUS];

 
 

-typedef struct savearea {
-
-/*     The following area corresponds to ppc_saved_state and ppc_thread_state */
-
-/*                                                                             offset 0x0000 */
-       unsigned int    save_srr0;
-       unsigned int    save_srr1;
-       unsigned int    save_r0;
-       unsigned int    save_r1;
-       unsigned int    save_r2;
-       unsigned int    save_r3;
-       unsigned int    save_r4;
-       unsigned int    save_r5;
-
-       unsigned int    save_r6;
-       unsigned int    save_r7;
-       unsigned int    save_r8;
-       unsigned int    save_r9;
-       unsigned int    save_r10;
-       unsigned int    save_r11;
-       unsigned int    save_r12;
-       unsigned int    save_r13;
-
-       unsigned int    save_r14;
-       unsigned int    save_r15;
-       unsigned int    save_r16;
-       unsigned int    save_r17;
-       unsigned int    save_r18;
-       unsigned int    save_r19;
-       unsigned int    save_r20;
-       unsigned int    save_r21;
-
-       unsigned int    save_r22;
-       unsigned int    save_r23;
-       unsigned int    save_r24;
-       unsigned int    save_r25;
-       unsigned int    save_r26;       
-       unsigned int    save_r27;
-       unsigned int    save_r28;
-       unsigned int    save_r29;
-
-       unsigned int    save_r30;
-       unsigned int    save_r31;
-       unsigned int    save_cr;                
-       unsigned int    save_xer;
-       unsigned int    save_lr;
-       unsigned int    save_ctr;
-       unsigned int    save_mq;                                
-       unsigned int    save_vrsave;
-       
-       unsigned int    save_sr_copyin;
-       unsigned int    save_space;
-       unsigned int    save_xfpscrpad;
-       unsigned int    save_xfpscr;
-       unsigned int    save_pad2[4];
-
-
-/*     The following corresponds to ppc_exception_state */
-
-/*                                                                             offset 0x00C0 */
-       unsigned int    save_dar;
-       unsigned int    save_dsisr;
-       unsigned int    save_exception;
-       unsigned int    save_pad3[5];
-
-/*     The following corresponds to ppc_float_state */
-
-/*                                                                             offset 0x00E0 */
-       double                  save_fp0;
-       double                  save_fp1;
-       double                  save_fp2;
-       double                  save_fp3;
-
-       double                  save_fp4;
-       double                  save_fp5;
-       double                  save_fp6;
-       double                  save_fp7;
-
-       double                  save_fp8;
-       double                  save_fp9;
-       double                  save_fp10;
-       double                  save_fp11;
-       
-       double                  save_fp12;
-       double                  save_fp13;
-       double                  save_fp14;
-       double                  save_fp15;
-       
-       double                  save_fp16;
-       double                  save_fp17;
-       double                  save_fp18;
-       double                  save_fp19;
-
-       double                  save_fp20;
-       double                  save_fp21;
-       double                  save_fp22;
-       double                  save_fp23;
-       
-       double                  save_fp24;
-       double                  save_fp25;
-       double                  save_fp26;
-       double                  save_fp27;
-       
-       double                  save_fp28;
-       double                  save_fp29;
-       double                  save_fp30;
-       double                  save_fp31;
-
-       unsigned int    save_fpscr_pad;
-       unsigned int    save_fpscr;
-       unsigned int    save_pad4[6];
-       
-/*     The following is the save area for the VMX registers */
-
-/*                                                                             offset 0x0200 */
-       unsigned int    save_vr0[4];
-       unsigned int    save_vr1[4];
-       unsigned int    save_vr2[4];
-       unsigned int    save_vr3[4];
-       unsigned int    save_vr4[4];
-       unsigned int    save_vr5[4];
-       unsigned int    save_vr6[4];
-       unsigned int    save_vr7[4];
-       unsigned int    save_vr8[4];
-       unsigned int    save_vr9[4];
-       unsigned int    save_vr10[4];
-       unsigned int    save_vr11[4];
-       unsigned int    save_vr12[4];
-       unsigned int    save_vr13[4];
-       unsigned int    save_vr14[4];
-       unsigned int    save_vr15[4];
-       unsigned int    save_vr16[4];
-       unsigned int    save_vr17[4];
-       unsigned int    save_vr18[4];
-       unsigned int    save_vr19[4];
-       unsigned int    save_vr20[4];
-       unsigned int    save_vr21[4];
-       unsigned int    save_vr22[4];
-       unsigned int    save_vr23[4];
-       unsigned int    save_vr24[4];
-       unsigned int    save_vr25[4];
-       unsigned int    save_vr26[4];
-       unsigned int    save_vr27[4];
-       unsigned int    save_vr28[4];
-       unsigned int    save_vr29[4];
-       unsigned int    save_vr30[4];
-       unsigned int    save_vr31[4];
-       unsigned int    save_vscr[4];                   /* Note that this is always valid if VMX has been used */
-       unsigned int    save_pad5[4];                   /* Insures that vrvalid is on a cache line */
-       unsigned int    save_vrvalid;                   /* VRs that have been saved */
-       unsigned int    save_pad6[7];
-       
-/*     The following is the save area for the segment registers */
-
-/*                                                                             offset 0x0440 */
-
-       unsigned int    save_sr0;
-       unsigned int    save_sr1;
-       unsigned int    save_sr2;
-       unsigned int    save_sr3;
-       unsigned int    save_sr4;
-       unsigned int    save_sr5;
-       unsigned int    save_sr6;
-       unsigned int    save_sr7;
-
-       unsigned int    save_sr8;
-       unsigned int    save_sr9;
-       unsigned int    save_sr10;
-       unsigned int    save_sr11;
-       unsigned int    save_sr12;
-       unsigned int    save_sr13;
-       unsigned int    save_sr14;
-       unsigned int    save_sr15;
-
-/* The following are the control area for this save area */
-
-/*                                                                             offset 0x0480 */
-
-       struct savearea *save_prev;                             /* The address of the previous normal savearea */
-       struct savearea *save_prev_float;               /* The address of the previous floating point savearea */
-       struct savearea *save_prev_vector;              /* The address of the previous vector savearea */
-       struct savearea *save_qfret;                    /* The "quick release" chain */
-       struct savearea *save_phys;                             /* The physical address of this savearea */
-       struct thread_activation        *save_act;      /* Pointer to the associated activation */
-       unsigned int    save_flags;                             /* Various flags */
-#define save_perm      0x80000000                              /* Permanent area, cannot be released */
-       unsigned int    save_level_fp;                  /* Level that floating point state belongs to */
-       unsigned int    save_level_vec;                 /* Level that vector state belongs to */
-
-} savearea;
-
-typedef struct savectl {                                       /* Savearea control */
-       
-       unsigned int    *sac_next;                              /* Points to next savearea page that has a free slot  - real */
-       unsigned int    sac_vrswap;                             /* XOR mask to swap V to R or vice versa */
-       unsigned int    sac_alloc;                              /* Bitmap of allocated slots */
-       unsigned int    sac_flags;                              /* Various flags */
-} savectl;
-
-struct Saveanchor {
-       unsigned int    savelock;                               /* Lock word for savearea manipulation */
-       int                             savecount;                              /* The total number of save areas allocated */
-       int                             saveinuse;                              /* Number of areas in use */
-       int                             savemin;                                /* We abend if lower than this */
-       int                             saveneghyst;                    /* The negative hysteresis value */
-       int                             savetarget;                             /* The target point for free save areas */
-       int                             saveposhyst;                    /* The positive hysteresis value */
-       unsigned int    savefree;                               /* Anchor for the freelist queue */
-                                                                                       /* Cache line (32-byte) boundary */
-       int                             savextnd;                               /* Free list extention count */
-       int                             saveneed;                               /* Number of savearea's needed.  So far, we assume we need 3 per activation */
-       int                             savemaxcount;
-       int                             savespare[5];                   /* Spare */

 };
 
 };
 

+#define        pp_preemption_count     pp_cpu_data.preemption_level
+#define        pp_simple_lock_count    pp_cpu_data.simple_lock_count
+#define        pp_interrupt_level      pp_cpu_data.interrupt_level

 
 

-extern char *trap_type[];
+#pragma pack()
+
+
+extern struct per_proc_info per_proc_info[NCPUS];

 
 

-#endif /* ndef ASSEMBLER */

 
 

-#define sac_empty      0xC0000000                              /* Mask with all entries empty */
-#define sac_cnt                2                                               /* Number of entries per page */
-#define sac_busy       0x80000000                              /* This page is busy - used during initial allocation */
-#define sac_perm       0x40000000                              /* Page permanently assigned */
+extern char *trap_type[];

 
 

-#define SAVattach      0x80000000                              /* Savearea is attached to a thread */
-#define SAVfpuvalid    0x40000000                              /* Savearea contains FPU context */
-#define SAVvmxvalid    0x20000000                              /* Savearea contains VMX context */
-#define SAVinuse       0xE0000000                              /* Save area is inuse */
-#define SAVrststk      0x00010000                              /* Indicates that the current stack should be reset to empty */
-#define SAVsyscall     0x00020000                              /* Indicates that the savearea is associated with a syscall */
-#define SAVredrive     0x00040000                              /* Indicates that the low-level fault handler associated */
-                                                                                       /* with this savearea should be redriven */
+#endif /* ndef ASSEMBLER */                                                                                    /* with this savearea should be redriven */

 
 /* cpu_flags defs */
 #define SIGPactive     0x8000
 
 /* cpu_flags defs */
 #define SIGPactive     0x8000


@@ -567,17 +544,14 @@ extern char *trap_type[];
 #define turnEEon       0x2000
 #define traceBE     0x1000                                     /* user mode BE tracing in enabled */
 #define traceBEb    3                                          /* bit number for traceBE */
 #define turnEEon       0x2000
 #define traceBE     0x1000                                     /* user mode BE tracing in enabled */
 #define traceBEb    3                                          /* bit number for traceBE */

-#define BootDone       0x0100
+#define SleepState     0x0800
+#define SleepStateb    4
+#define mcountOff      0x0400

 #define SignalReady    0x0200
 #define SignalReady    0x0200

+#define BootDone       0x0100

 #define loadMSR                0x7FF4
 
 #define T_VECTOR_SIZE  4                                       /* function pointer size */
 #define loadMSR                0x7FF4
 
 #define T_VECTOR_SIZE  4                                       /* function pointer size */

-#define InitialSaveMin         4                               /* The initial value for the minimum number of saveareas */
-#define InitialNegHysteresis   5                       /* The number off from target before we adjust upwards */
-#define InitialPosHysteresis   10                      /* The number off from target before we adjust downwards */
-#define InitialSaveTarget      20                              /* The number of saveareas for an initial target */
-#define        InitialSaveAreas        20                              /* The number of saveareas to allocate at boot */
-#define        InitialSaveBloks        (InitialSaveAreas+sac_cnt-1)/sac_cnt    /* The number of savearea blocks to allocate at boot */

 
 /* Hardware exceptions */
 
 
 /* Hardware exceptions */
 


@@ -613,7 +587,7 @@ extern char *trap_type[];
 #define T_INVALID_EXCP10               (0x1D * T_VECTOR_SIZE)
 #define T_INVALID_EXCP11               (0x1E * T_VECTOR_SIZE)
 #define T_INVALID_EXCP12               (0x1F * T_VECTOR_SIZE)
 #define T_INVALID_EXCP10               (0x1D * T_VECTOR_SIZE)
 #define T_INVALID_EXCP11               (0x1E * T_VECTOR_SIZE)
 #define T_INVALID_EXCP12               (0x1F * T_VECTOR_SIZE)

-#define T_INVALID_EXCP13               (0x20 * T_VECTOR_SIZE)
+#define T_EMULATE                              (0x20 * T_VECTOR_SIZE)

 
 #define T_RUNMODE_TRACE                        (0x21 * T_VECTOR_SIZE) /* 601 only */
 
 
 #define T_RUNMODE_TRACE                        (0x21 * T_VECTOR_SIZE) /* 601 only */
 


@@ -623,10 +597,20 @@ extern char *trap_type[];
 #define T_SHUTDOWN                             (0x25 * T_VECTOR_SIZE)
 #define T_CHOKE                                        (0x26 * T_VECTOR_SIZE)
 
 #define T_SHUTDOWN                             (0x25 * T_VECTOR_SIZE)
 #define T_CHOKE                                        (0x26 * T_VECTOR_SIZE)
 

+#define T_DATA_SEGMENT                 (0x27 * T_VECTOR_SIZE)
+#define T_INSTRUCTION_SEGMENT  (0x28 * T_VECTOR_SIZE)
+
+#define T_SOFT_PATCH                   (0x29 * T_VECTOR_SIZE)
+#define T_MAINTENANCE                  (0x2A * T_VECTOR_SIZE)
+#define T_INSTRUMENTATION              (0x2B * T_VECTOR_SIZE)
+#define T_ARCHDEP0                             (0x2C * T_VECTOR_SIZE)
+

 #define T_AST                                  (0x100 * T_VECTOR_SIZE) 
 #define T_MAX                                  T_CHOKE          /* Maximum exception no */
 
 #define T_AST                                  (0x100 * T_VECTOR_SIZE) 
 #define T_MAX                                  T_CHOKE          /* Maximum exception no */
 

-#define        EXCEPTION_VECTOR(exception)     (exception * 0x100 /T_VECTOR_SIZE )
+#define        T_FAM                                   0x00004000
+
+#define        EXCEPTION_VECTOR(exception)     (exception * 0x100 / T_VECTOR_SIZE )

 
 /*
  *             System choke (failure) codes 
 
 /*
  *             System choke (failure) codes 


@@ -636,17 +620,24 @@ extern char *trap_type[];
 #define failStack 1
 #define failMapping 2
 #define failContext 3
 #define failStack 1
 #define failMapping 2
 #define failContext 3

+#define failNoSavearea 4
+#define failSaveareaCorr 5
+#define failBadLiveContext 6
+#define        failSkipLists 7
+#define        failUnalignedStk 8

 
 /* Always must be last - update failNames table in model_dep.c as well */
 
 /* Always must be last - update failNames table in model_dep.c as well */

-#define failUnknown 4
+#define failUnknown 9

 
 #ifndef ASSEMBLER
 
 
 #ifndef ASSEMBLER
 

+#pragma pack(4)                                                        /* Make sure the structure stays as we defined it */

 typedef struct resethandler {
        unsigned int    type;
        vm_offset_t     call_paddr;
        vm_offset_t     arg__paddr;
 } resethandler_t;
 typedef struct resethandler {
        unsigned int    type;
        vm_offset_t     call_paddr;
        vm_offset_t     arg__paddr;
 } resethandler_t;

+#pragma pack()

 
 extern resethandler_t ResetHandler;
 
 
 extern resethandler_t ResetHandler;
 


@@ -654,5 +645,7 @@ extern resethandler_t ResetHandler;
 
 #define        RESET_HANDLER_NULL      0x0
 #define        RESET_HANDLER_START     0x1
 
 #define        RESET_HANDLER_NULL      0x0
 #define        RESET_HANDLER_START     0x1

+#define        RESET_HANDLER_BUPOR     0x2
+#define        RESET_HANDLER_IGNORE    0x3

 
 #endif /* _PPC_EXCEPTION_H_ */
 
 #endif /* _PPC_EXCEPTION_H_ */