xnu-344.23.tar.gz

[apple/xnu.git] / osfmk / ppc / db_asm.s

diff --git a/osfmk/ppc/db_asm.s b/osfmk/ppc/db_asm.s
index 7eeeb4e4bce5e02e99777601143def3dbbe1be81..37c8006849d000014ba7cb0afcdc8cc80271f23f 100644 (file)
--- a/osfmk/ppc/db_asm.s
+++ b/osfmk/ppc/db_asm.s
@@ -3,22 +3,19 @@
  *
  * @APPLE_LICENSE_HEADER_START@
  * 
- * Copyright (c) 1999-2003 Apple Computer, Inc.  All Rights Reserved.
+ * The contents of this file constitute Original Code as defined in and
+ * are subject to the Apple Public Source License Version 1.1 (the
+ * "License").  You may not use this file except in compliance with the
+ * License.  Please obtain a copy of the License at
+ * http://www.apple.com/publicsource and read it before using this file.
  * 
- * This file contains Original Code and/or Modifications of Original Code
- * as defined in and that are subject to the Apple Public Source License
- * Version 2.0 (the 'License'). You may not use this file except in
- * compliance with the License. Please obtain a copy of the License at
- * http://www.opensource.apple.com/apsl/ and read it before using this
- * file.
- * 
- * The Original Code and all software distributed under the License are
- * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
+ * This Original Code and all software distributed under the License are
+ * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
  * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
  * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
- * Please see the License for the specific language governing rights and
- * limitations under the License.
+ * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT.  Please see the
+ * License for the specific language governing rights and limitations
+ * under the License.
  * 
  * @APPLE_LICENSE_HEADER_END@
  */
@@ -32,6 +29,60 @@
 #include <mach/ppc/vm_param.h>
 #include <assym.s>
 
+/* void
+ * db_phys_copy(src, dst, bytecount)
+ *      vm_offset_t     src;
+ *      vm_offset_t     dst;
+ *      int             bytecount
+ *
+ * This routine will copy bytecount bytes from physical address src to physical
+ * address dst. 
+ */
+ENTRY(db_phys_copy, TAG_NO_FRAME_USED)
+
+       /* Switch off data translations */
+       mfmsr   r6
+       rlwinm  r6,r6,0,MSR_FP_BIT+1,MSR_FP_BIT-1       ; Force floating point off
+       rlwinm  r6,r6,0,MSR_VEC_BIT+1,MSR_VEC_BIT-1     ; Force vectors off
+       rlwinm  r7,     r6,     0,      MSR_DR_BIT+1,   MSR_DR_BIT-1
+       mtmsr   r7
+       isync                   /* Ensure data translations are off */
+
+       subi    r3,     r3,     4
+       subi    r4,     r4,     4
+
+       cmpwi   r5,     3
+       ble-    .L_db_phys_copy_bytes
+.L_db_phys_copy_loop:
+       lwz     r0,     4(r3)
+       addi    r3,     r3,     4
+       subi    r5,     r5,     4
+       stw     r0,     4(r4)
+       addi    r4,     r4,     4
+       cmpwi   r5,     3
+       bgt+    .L_db_phys_copy_loop
+
+       /* If no leftover bytes, we're done now */
+       cmpwi   r5,     0
+       beq+    .L_db_phys_copy_done
+       
+.L_db_phys_copy_bytes:
+       addi    r3,     r3,     3
+       addi    r4,     r4,     3
+.L_db_phys_copy_byte_loop:     
+       lbz     r0,     1(r3)
+       addi    r3,     r3,     1
+       subi    r5,     r5,     1
+       stb     r0,     1(r4)
+       addi    r4,     r4,     1
+       cmpwi   r5,     0
+       bne+    .L_db_phys_copy_loop
+
+.L_db_phys_copy_done:
+       mtmsr   r6              /* Restore original translations */
+       isync                   /* Ensure data translations are off */
+
+       blr
 
 /* void
  * db_phys_cmp(src_a, src_b, bytecount)
@@ -43,15 +94,11 @@
  * address src_b. 
  */
 
-#warning THIS IS BROKEN FOR 64-BIT
-
        /* Switch off data translations */
-       lis             r7,hi16(MASK(MSR_VEC))
-       ori             r7,r7,lo16(MASK(MSR_FP))
        mfmsr   r6
-       andc    r6,r6,r7                        ; Force FP and vec off
-       ori             r7,r7,lo16(MASK(MSR_DR))        ; Set the DR bit
-       andc    r7,r6,r7                        ; Force DR off
+       rlwinm  r6,r6,0,MSR_FP_BIT+1,MSR_FP_BIT-1       ; Force floating point off
+       rlwinm  r6,r6,0,MSR_VEC_BIT+1,MSR_VEC_BIT-1     ; Force vectors off
+       rlwinm  r7,     r6,     0,      MSR_DR_BIT+1,   MSR_DR_BIT-1
        mtmsr   r7
        isync                   /* Ensure data translations are off */