xnu-792.6.22.tar.gz

[apple/xnu.git] / osfmk / ppc / vmachmon_asm.s

diff --git a/osfmk/ppc/vmachmon_asm.s b/osfmk/ppc/vmachmon_asm.s
index 2d5cdb785f1e954ff6a874f7da1282f85828eece..538553085858ef4dc714bc03bedc36f1b5db212b 100644 (file)
--- a/osfmk/ppc/vmachmon_asm.s
+++ b/osfmk/ppc/vmachmon_asm.s
@@ -1223,7 +1223,7 @@ swap64:           lwz             r22,vmmXAFlgs(r27)                      ; Get the eXtended Architecture flags
                        lwz             r15,vmmppcpc(r5)                        ; First line of context 
                        lis             r22,hi16(MSR_IMPORT_BITS)       ; Get the MSR bits that are controllable by user
                        lwz             r23,vmmppcmsr(r5)                               
-                       ori             r22,r25,lo16(MSR_IMPORT_BITS)   ; Get the rest of the MSR bits that are controllable by user
+                       ori             r22,r22,lo16(MSR_IMPORT_BITS)   ; Get the rest of the MSR bits that are controllable by user
                        lwz             r17,vmmppcr0(r5)                                
                        lwz             r18,vmmppcr1(r5)                
                        and             r23,r23,r22                                     ; Keep only the controllable bits               
@@ -1259,7 +1259,7 @@ sw64x1:           ld              r15,vmmppcXpc(r5)                       ; First line of context
                        lis             r22,hi16(MSR_IMPORT_BITS)       ; Get the MSR bits that are controllable by user (we will also allow 64-bit here)
                        sldi    r0,r0,63                                        ; Get 64-bit bit
                        ld              r23,vmmppcXmsr(r5)                              
-                       ori             r22,r25,lo16(MSR_IMPORT_BITS)   ; Get the rest of the MSR bits that are controllable by user
+                       ori             r22,r22,lo16(MSR_IMPORT_BITS)   ; Get the rest of the MSR bits that are controllable by user
                        ld              r17,vmmppcXr0(r5)               
                        or              r22,r22,r0                                      ; Add the 64-bit bit            
                        ld              r18,vmmppcXr1(r5)