+
+
+/* Update commpage nanotime information. Note that we interleave
+ * setting the 32- and 64-bit commpages, in order to keep nanotime more
+ * nearly in sync between the two environments.
+ *
+ * This routine must be serialized by some external means, ie a lock.
+ */
+
+void
+commpage_set_nanotime(
+ uint64_t tsc_base,
+ uint64_t ns_base,
+ uint32_t scale,
+ uint32_t shift )
+{
+ commpage_time_data *p32 = time_data32;
+ commpage_time_data *p64 = time_data64;
+ static uint32_t generation = 0;
+ uint32_t next_gen;
+
+ if (p32 == NULL) /* have commpages been allocated yet? */
+ return;
+
+ if ( generation != p32->nt_generation )
+ panic("nanotime trouble 1"); /* possibly not serialized */
+ if ( ns_base < p32->nt_ns_base )
+ panic("nanotime trouble 2");
+ if ((shift != 32) && ((_cpu_capabilities & kSlow)==0) )
+ panic("nanotime trouble 3");
+
+ next_gen = ++generation;
+ if (next_gen == 0)
+ next_gen = ++generation;
+
+ p32->nt_generation = 0; /* mark invalid, so commpage won't try to use it */
+ p64->nt_generation = 0;
+
+ p32->nt_tsc_base = tsc_base;
+ p64->nt_tsc_base = tsc_base;
+
+ p32->nt_ns_base = ns_base;
+ p64->nt_ns_base = ns_base;
+
+ p32->nt_scale = scale;
+ p64->nt_scale = scale;
+
+ p32->nt_shift = shift;
+ p64->nt_shift = shift;
+
+ p32->nt_generation = next_gen; /* mark data as valid */
+ p64->nt_generation = next_gen;
+}
+
+
+/* Disable commpage gettimeofday(), forcing commpage to call through to the kernel. */
+
+void
+commpage_disable_timestamp( void )
+{
+ time_data32->gtod_generation = 0;
+ time_data64->gtod_generation = 0;
+}
+
+
+/* Update commpage gettimeofday() information. As with nanotime(), we interleave
+ * updates to the 32- and 64-bit commpage, in order to keep time more nearly in sync
+ * between the two environments.
+ *
+ * This routine must be serializeed by some external means, ie a lock.
+ */
+
+ void
+ commpage_set_timestamp(
+ uint64_t abstime,
+ uint64_t secs )
+{
+ commpage_time_data *p32 = time_data32;
+ commpage_time_data *p64 = time_data64;
+ static uint32_t generation = 0;
+ uint32_t next_gen;
+
+ next_gen = ++generation;
+ if (next_gen == 0)
+ next_gen = ++generation;
+
+ p32->gtod_generation = 0; /* mark invalid, so commpage won't try to use it */
+ p64->gtod_generation = 0;
+
+ p32->gtod_ns_base = abstime;
+ p64->gtod_ns_base = abstime;
+
+ p32->gtod_sec_base = secs;
+ p64->gtod_sec_base = secs;
+
+ p32->gtod_generation = next_gen; /* mark data as valid */
+ p64->gtod_generation = next_gen;
+}
+
+
+/* Update _COMM_PAGE_MEMORY_PRESSURE. Called periodically from vm's compute_memory_pressure() */
+
+void
+commpage_set_memory_pressure(
+ unsigned int pressure )
+{
+ char *cp;
+ uint32_t *ip;
+
+ cp = commPagePtr32;
+ if ( cp ) {
+ cp += (_COMM_PAGE_MEMORY_PRESSURE - _COMM_PAGE32_BASE_ADDRESS);
+ ip = (uint32_t*) cp;
+ *ip = (uint32_t) pressure;
+ }
+
+ cp = commPagePtr64;
+ if ( cp ) {
+ cp += (_COMM_PAGE_MEMORY_PRESSURE - _COMM_PAGE32_START_ADDRESS);
+ ip = (uint32_t*) cp;
+ *ip = (uint32_t) pressure;
+ }
+
+}
+
+
+/* Update _COMM_PAGE_SPIN_COUNT. We might want to reduce when running on a battery, etc. */
+
+void
+commpage_set_spin_count(
+ unsigned int count )
+{
+ char *cp;
+ uint32_t *ip;
+
+ if (count == 0) /* we test for 0 after decrement, not before */
+ count = 1;
+
+ cp = commPagePtr32;
+ if ( cp ) {
+ cp += (_COMM_PAGE_SPIN_COUNT - _COMM_PAGE32_BASE_ADDRESS);
+ ip = (uint32_t*) cp;
+ *ip = (uint32_t) count;
+ }
+
+ cp = commPagePtr64;
+ if ( cp ) {
+ cp += (_COMM_PAGE_SPIN_COUNT - _COMM_PAGE32_START_ADDRESS);
+ ip = (uint32_t*) cp;
+ *ip = (uint32_t) count;
+ }
+
+}
+
+/* Updated every time a logical CPU goes offline/online */
+void
+commpage_update_active_cpus(void)
+{
+ char *cp;
+ volatile uint8_t *ip;
+
+ /* At least 32-bit commpage must be initialized */
+ if (!commPagePtr32)
+ return;
+
+ simple_lock(&commpage_active_cpus_lock);
+
+ cp = commPagePtr32;
+ cp += (_COMM_PAGE_ACTIVE_CPUS - _COMM_PAGE32_BASE_ADDRESS);
+ ip = (volatile uint8_t*) cp;
+ *ip = (uint8_t) processor_avail_count;
+
+ cp = commPagePtr64;
+ if ( cp ) {
+ cp += (_COMM_PAGE_ACTIVE_CPUS - _COMM_PAGE32_START_ADDRESS);
+ ip = (volatile uint8_t*) cp;
+ *ip = (uint8_t) processor_avail_count;
+ }
+
+ simple_unlock(&commpage_active_cpus_lock);
+}
+
+
+/* Check to see if a given address is in the Preemption Free Zone (PFZ) */
+
+uint32_t
+commpage_is_in_pfz32(uint32_t addr32)
+{
+ if ( (addr32 >= _COMM_PAGE_PFZ_START) && (addr32 < _COMM_PAGE_PFZ_END)) {
+ return 1;
+ }
+ else
+ return 0;
+}
+
+uint32_t
+commpage_is_in_pfz64(addr64_t addr64)
+{
+ if ( (addr64 >= _COMM_PAGE_32_TO_64(_COMM_PAGE_PFZ_START))
+ && (addr64 < _COMM_PAGE_32_TO_64(_COMM_PAGE_PFZ_END))) {
+ return 1;
+ }
+ else
+ return 0;
+}
+