#include <mach/i386/syscall_sw.h>
#include <kern/kalloc.h>
#include <sys/kdebug.h>
-
#include <i386/machine_cpu.h>
#include <i386/misc_protos.h>
#include <i386/cpuid.h>
diagWork dgWork;
uint64_t lastRuptClear = 0ULL;
-
+boolean_t diag_pmc_enabled = FALSE;
void cpu_powerstats(void *);
typedef struct {
} core_energy_stat_t;
typedef struct {
+ uint64_t pkes_version;
uint64_t pkg_cres[2][7];
uint64_t pkg_power_unit;
uint64_t pkg_energy;
assert(is_saved_state64(state));
regs = saved_state64(state);
+
diagflag = ((dgWork.dgFlags & enaDiagSCs) != 0);
selector = regs->rdi;
(void) copyout((char *) &real_ncpus, data, sizeof(real_ncpus)); /* Copy out number of
* processors */
-
currNap = mach_absolute_time(); /* Get the time now */
durNap = currNap - lastRuptClear; /* Get the last interval
* duration */
}
rval = 1;
break;
+
case dgPowerStat:
{
uint32_t c2l = 0, c2h = 0, c3l = 0, c3h = 0, c6l = 0, c6h = 0, c7l = 0, c7h = 0;
bzero(&pkes, sizeof(pkes));
bzero(&cest, sizeof(cest));
+ pkes.pkes_version = 1ULL;
rdmsr_carefully(MSR_IA32_PKG_C2_RESIDENCY, &c2l, &c2h);
rdmsr_carefully(MSR_IA32_PKG_C3_RESIDENCY, &c3l, &c3h);
rdmsr_carefully(MSR_IA32_PKG_C6_RESIDENCY, &c6l, &c6h);
case dgEnaPMC:
{
boolean_t enable = TRUE;
- mp_cpus_call(CPUMASK_ALL, ASYNC, cpu_pmc_control, &enable);
+ uint32_t cpuinfo[4];
+ /* Require architectural PMC v2 or higher, corresponding to
+ * Merom+, or equivalent virtualised facility.
+ */
+ do_cpuid(0xA, &cpuinfo[0]);
+ if ((cpuinfo[0] & 0xFF) >= 2) {
+ mp_cpus_call(CPUMASK_ALL, ASYNC, cpu_pmc_control, &enable);
+ diag_pmc_enabled = TRUE;
+ }
rval = 1;
}
break;
-
#if DEBUG
case dgGzallocTest:
{
(void) ml_set_interrupts_enabled(TRUE);
- if (diagflag == 0)
- break;
-
- unsigned *ptr = (unsigned *)kalloc(1024);
- kfree(ptr, 1024);
- *ptr = 0x42;
+ if (diagflag) {
+ unsigned *ptr = (unsigned *)kalloc(1024);
+ kfree(ptr, 1024);
+ *ptr = 0x42;
+ }
}
break;
#endif
case dgPermCheck:
{
(void) ml_set_interrupts_enabled(TRUE);
- if (diagflag == 0)
- break;
-
- rval = pmap_permissions_verify(kernel_pmap, kernel_map, 0, ~0ULL);
+ if (diagflag)
+ rval = pmap_permissions_verify(kernel_pmap, kernel_map, 0, ~0ULL);
}
break;
#endif /* PERMIT_PERMCHECK */
-
default: /* Handle invalid ones */
rval = 0; /* Return an exception */
}
regs->rax = rval;
- return rval; /* Normal non-ast check return */
+ return rval;
}
void cpu_powerstats(__unused void *arg) {
rdmsr_carefully(MSR_IA32_CORE_C7_RESIDENCY, &cl, &ch);
cdp->cpu_c7res = ((uint64_t)ch << 32) | cl;
-
- uint64_t insns = read_pmc(FIXED_PMC0);
- uint64_t ucc = read_pmc(FIXED_PMC1);
- uint64_t urc = read_pmc(FIXED_PMC2);
- cdp->cpu_cur_insns = insns;
- cdp->cpu_cur_ucc = ucc;
- cdp->cpu_cur_urc = urc;
+
+ if (diag_pmc_enabled) {
+ uint64_t insns = read_pmc(FIXED_PMC0);
+ uint64_t ucc = read_pmc(FIXED_PMC1);
+ uint64_t urc = read_pmc(FIXED_PMC2);
+ cdp->cpu_cur_insns = insns;
+ cdp->cpu_cur_ucc = ucc;
+ cdp->cpu_cur_urc = urc;
+ }
}
void cpu_pmc_control(void *enablep) {