xnu-2422.115.4.tar.gz

[apple/xnu.git] / osfmk / i386 / lapic_native.c

diff --git a/osfmk/i386/lapic_native.c b/osfmk/i386/lapic_native.c
index 347b9e969597f862f2069c69aba1fa14b817ca67..e9983aa79dc35ba2e2305d40e80bd52f01923ece 100644 (file)
--- a/osfmk/i386/lapic_native.c
+++ b/osfmk/i386/lapic_native.c
@@ -284,6 +284,7 @@ lapic_init(void)
        /* Set up the lapic_id <-> cpu_number map and add this boot processor */
        lapic_cpu_map_init();
        lapic_cpu_map((LAPIC_READ(ID)>>LAPIC_ID_SHIFT)&LAPIC_ID_MASK, 0);
+       current_cpu_datap()->cpu_phys_number = cpu_to_lapic[0];
        kprintf("Boot cpu local APIC id 0x%x\n", cpu_to_lapic[0]);
 }
 
@@ -443,6 +444,10 @@ lapic_probe(void)
                 * Re-initialize cpu features info and re-check.
                 */
                cpuid_set_info();
+               /* We expect this codepath will never be traversed
+                * due to EFI enabling the APIC. Reducing the APIC
+                * interrupt base dynamically is not supported.
+                */
                if (cpuid_features() & CPUID_FEATURE_APIC) {
                        printf("Local APIC discovered and enabled\n");
                        lapic_os_enabled = TRUE;
@@ -949,3 +954,26 @@ lapic_disable_timer(void)
        }
 }
 
+/* SPI returning the CMCI vector */
+uint8_t
+lapic_get_cmci_vector(void)
+{
+       uint8_t cmci_vector = 0;
+#if CONFIG_MCA
+       /* CMCI, if available */
+       if (mca_is_cmci_present())
+               cmci_vector = LAPIC_VECTOR(CMCI);
+#endif
+       return cmci_vector;
+}
+
+#if DEBUG
+extern void lapic_trigger_MC(void);
+void
+lapic_trigger_MC(void)
+{
+       /* A 64-bit access to any register will do it. */
+       volatile uint64_t dummy = *(uint64_t *) (void *) LAPIC_MMIO(ID);
+       dummy++;
+}
+#endif