xnu-3789.70.16.tar.gz

[apple/xnu.git] / osfmk / i386 / Diagnostics.c

diff --git a/osfmk/i386/Diagnostics.c b/osfmk/i386/Diagnostics.c
index 067018965af6cb9737638bb222dadb3c45c35a96..bd2ca2140b56c4f1781d44d7ca101176a3589a9d 100644 (file)
--- a/osfmk/i386/Diagnostics.c
+++ b/osfmk/i386/Diagnostics.c
@@ -153,6 +153,7 @@ diagCall64(x86_saved_state_t * state)
 
                        lastRuptClear = mach_absolute_time();   /* Get the time of clear */
                        rval = 1;       /* Normal return */
+                       (void) ml_set_interrupts_enabled(FALSE);
                        break;
                }
 
@@ -178,6 +179,7 @@ diagCall64(x86_saved_state_t * state)
                                                                         * slot */
                }
                rval = 1;
+               (void) ml_set_interrupts_enabled(FALSE);
                break;
 
        case dgPowerStat:
@@ -221,7 +223,20 @@ diagCall64(x86_saved_state_t * state)
                rdmsr64_carefully(MSR_IA32_RING_PERF_STATUS, &pkes.ring_ratio_instantaneous);
 
                pkes.IA_frequency_clipping_cause = ~0ULL;
-               rdmsr64_carefully(MSR_IA32_IA_PERF_LIMIT_REASONS, &pkes.IA_frequency_clipping_cause);
+
+               uint32_t ia_perf_limits = MSR_IA32_IA_PERF_LIMIT_REASONS;
+               /* Should perhaps be a generic register map module for these
+                * registers with identical functionality that were renumbered.
+                */
+               switch (cpuid_cpufamily()) {
+               case CPUFAMILY_INTEL_SKYLAKE:
+                       ia_perf_limits = MSR_IA32_IA_PERF_LIMIT_REASONS_SKL;
+                       break;
+               default:
+                       break;
+               }
+
+               rdmsr64_carefully(ia_perf_limits, &pkes.IA_frequency_clipping_cause);
 
                pkes.GT_frequency_clipping_cause = ~0ULL;
                rdmsr64_carefully(MSR_IA32_GT_PERF_LIMIT_REASONS, &pkes.GT_frequency_clipping_cause);
@@ -267,13 +282,14 @@ diagCall64(x86_saved_state_t * state)
                        cest.cpu_urc = cpu_data_ptr[i]->cpu_cur_urc;
 #if DIAG_ALL_PMCS
                        bcopy(&cpu_data_ptr[i]->cpu_gpmcs[0], &cest.gpmcs[0], sizeof(cest.gpmcs));
-#endif /* DIAG_ALL_PMCS */                     
+#endif /* DIAG_ALL_PMCS */
                        (void) ml_set_interrupts_enabled(TRUE);
 
                        copyout(&cest, curpos, sizeof(cest));
                        curpos += sizeof(cest);
                }
                rval = 1;
+               (void) ml_set_interrupts_enabled(FALSE);
        }
                break;
        case dgEnaPMC:
@@ -291,7 +307,7 @@ diagCall64(x86_saved_state_t * state)
                rval = 1;
        }
        break;
-#if    DEBUG
+#if    DEVELOPMENT || DEBUG
        case dgGzallocTest:
        {
                (void) ml_set_interrupts_enabled(TRUE);
@@ -300,25 +316,28 @@ diagCall64(x86_saved_state_t * state)
                        kfree(ptr, 1024);
                        *ptr = 0x42;
                }
+               (void) ml_set_interrupts_enabled(FALSE);
        }
        break;
 #endif
 
-#if PERMIT_PERMCHECK   
+#if DEVELOPMENT || DEBUG
        case    dgPermCheck:
        {
                (void) ml_set_interrupts_enabled(TRUE);
                if (diagflag)
                        rval = pmap_permissions_verify(kernel_pmap, kernel_map, 0, ~0ULL);
+               (void) ml_set_interrupts_enabled(FALSE);
        }
                break;
-#endif /* PERMIT_PERMCHECK */
+#endif /* DEVELOPMENT || DEBUG */
        default:                /* Handle invalid ones */
                rval = 0;       /* Return an exception */
        }
 
        regs->rax = rval;
 
+       assert(ml_get_interrupts_enabled() == FALSE);
        return rval;
 }