+ stw r4,saver4(r13) ; Save this one
+ andc r11,r11,r1 ; Clear FAM bit
+ beq+ noFAM ; Is it FAM intercept
+ mfsrr1 r3 ; Load srr1
+ rlwinm. r3,r3,0,MSR_PR_BIT,MSR_PR_BIT ; Are we trapping from supervisor state?
+ beq+ noFAM ; From supervisor state
+ lwz r1,spcFlags(r2) ; Load spcFlags
+ rlwinm r1,r1,1+FamVMmodebit,30,31 ; Extract FamVMenabit and FamVMmodebit
+ cmpwi cr0,r1,2 ; Check FamVMena set without FamVMmode
+ bne+ noFAM ; Can this context be FAM intercept
+ lwz r4,FAMintercept(r2) ; Load exceptions mask to intercept
+ srwi r1,r11,2 ; divide r11 by 4
+ lis r3,0x8000 ; Set r3 to 0x80000000
+ srw r1,r3,r1 ; Set bit for current exception
+ and. r1,r1,r4 ; And current exception with the intercept mask
+ beq+ noFAM ; Is it FAM intercept
+ b EXT(vmm_fam_handler)
+noFAM:
+ lwz r1,pfAvailable(r2) ; Get the CPU features flags