xnu-1228.9.59.tar.gz

[apple/xnu.git] / osfmk / i386 / mp.h

diff --git a/osfmk/i386/mp.h b/osfmk/i386/mp.h
index 99ba34fe2441bd78ab32d1058d7f8a24e7d756ce..0fac0fbd5ff84a0fda7896014442a2b58264f0df 100644 (file)
--- a/osfmk/i386/mp.h
+++ b/osfmk/i386/mp.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2000-2007 Apple Inc. All rights reserved.
+ * Copyright (c) 2000-2008 Apple Inc. All rights reserved.
  *
  * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
  * 
@@ -58,8 +58,8 @@
  */
 #ifdef KERNEL_PRIVATE
 
-#ifndef _I386AT_MP_H_
-#define _I386AT_MP_H_
+#ifndef _I386_MP_H_
+#define _I386_MP_H_
 
 #ifndef        DEBUG
 #include <debug.h>
@@ -69,114 +69,27 @@
 #include <i386/apic.h>
 #include <i386/mp_events.h>
 
-#define LAPIC_ID_MAX   (LAPIC_ID_MASK)
-
-#define MAX_CPUS       (LAPIC_ID_MAX + 1)
+#define MAX_CPUS       32              /* (8*sizeof(long)) */  
 
 #ifndef        ASSEMBLER
+#include <stdint.h>
 #include <sys/cdefs.h>
 #include <mach/boolean.h>
 #include <mach/kern_return.h>
 #include <mach/i386/thread_status.h>
+#include <kern/lock.h>
 
 __BEGIN_DECLS
 
 extern kern_return_t intel_startCPU(int slot_num);
+extern kern_return_t intel_startCPU_fast(int slot_num);
 extern void i386_init_slave(void);
+extern void i386_init_slave_fast(void);
 extern void smp_init(void);
 
 extern void cpu_interrupt(int cpu);
-
-extern void lapic_init(void);
-extern void lapic_shutdown(void);
-extern void lapic_smm_restore(void);
-extern boolean_t lapic_probe(void);
-extern void lapic_dump(void);
-extern int  lapic_interrupt(int interrupt, x86_saved_state_t *state);
-extern void lapic_end_of_interrupt(void);
-extern int  lapic_to_cpu[];
-extern int  cpu_to_lapic[];
-extern int  lapic_interrupt_base;
-extern void lapic_cpu_map(int lapic, int cpu_num);
-extern uint32_t ml_get_apicid(uint32_t cpu);
-
-extern void lapic_set_timer(
-               boolean_t               interrupt,
-               lapic_timer_mode_t      mode,
-               lapic_timer_divide_t    divisor,
-               lapic_timer_count_t     initial_count);
-
-extern void lapic_get_timer(
-               lapic_timer_mode_t      *mode,
-               lapic_timer_divide_t    *divisor,
-               lapic_timer_count_t     *initial_count,
-               lapic_timer_count_t     *current_count);
-
-typedef        void (*i386_intr_func_t)(void *);
-extern void lapic_set_timer_func(i386_intr_func_t func);
-extern void lapic_set_pmi_func(i386_intr_func_t func);
-extern void lapic_set_thermal_func(i386_intr_func_t func);
-
 __END_DECLS
 
-/*
- * By default, use high vectors to leave vector space for systems
- * with multiple I/O APIC's. However some systems that boot with
- * local APIC disabled will hang in SMM when vectors greater than
- * 0x5F are used. Those systems are not expected to have I/O APIC
- * so 16 (0x50 - 0x40) vectors for legacy PIC support is perfect.
- */
-#define LAPIC_DEFAULT_INTERRUPT_BASE   0xD0
-#define LAPIC_REDUCED_INTERRUPT_BASE   0x50
-/*
- * Specific lapic interrupts are relative to this base
- * in priority order from high to low:
- */
-
-#define LAPIC_PERFCNT_INTERRUPT                0xF
-#define LAPIC_TIMER_INTERRUPT          0xE
-#define LAPIC_INTERPROCESSOR_INTERRUPT 0xD
-#define LAPIC_THERMAL_INTERRUPT                0xC
-#define LAPIC_ERROR_INTERRUPT          0xB
-#define LAPIC_SPURIOUS_INTERRUPT       0xA
-/* The vector field is ignored for NMI interrupts via the LAPIC
- * or otherwise, so this is not an offset from the interrupt
- * base.
- */
-#define LAPIC_NMI_INTERRUPT            0x2
-
-#define LAPIC_REG(reg) \
-       (*((volatile uint32_t *)(lapic_start + LAPIC_##reg)))
-#define LAPIC_REG_OFFSET(reg,off) \
-       (*((volatile uint32_t *)(lapic_start + LAPIC_##reg + (off))))
-
-#define LAPIC_VECTOR(src) \
-       (lapic_interrupt_base + LAPIC_##src##_INTERRUPT)
-
-#define LAPIC_ISR_IS_SET(base,src) \
-       (LAPIC_REG_OFFSET(ISR_BASE,((base+LAPIC_##src##_INTERRUPT)/32)*0x10) & \
-               (1 <<((base + LAPIC_##src##_INTERRUPT)%32)))
-
-extern vm_offset_t     lapic_start;
-
-#endif /* ASSEMBLER */
-
-#define CPU_NUMBER(r)                          \
-       movl    %gs:CPU_NUMBER_GS,r
-
-#define CPU_NUMBER_FROM_LAPIC(r)               \
-       movl    EXT(lapic_id),r;                \
-       movl    0(r),r;                         \
-       shrl    $(LAPIC_ID_SHIFT),r;            \
-       andl    $(LAPIC_ID_MASK),r;             \
-       movl    EXT(lapic_to_cpu)(,r,4),r
-
-
-/* word describing the reason for the interrupt, one per cpu */
-
-#ifndef        ASSEMBLER
-#include <kern/lock.h>
-
 extern unsigned int    real_ncpus;             /* real number of cpus */
 extern unsigned int    max_ncpus;              /* max number of cpus */
 decl_simple_lock_data(extern,kdb_lock) /* kdb lock             */
@@ -425,6 +338,6 @@ extern cpu_signal_event_log_t       *cpu_handle[];
 #define MP_ENABLE_PREEMPTION_NO_CHECK
 #endif /* MACH_RT */
 
-#endif /* _I386AT_MP_H_ */
+#endif /* _I386_MP_H_ */
 
 #endif /* KERNEL_PRIVATE */