xnu-792.18.15.tar.gz

[apple/xnu.git] / osfmk / i386 / commpage / pthreads.s

diff --git a/osfmk/i386/commpage/pthreads.s b/osfmk/i386/commpage/pthreads.s
index 30600f75df3adf97cdf714492848c00f7d4b398d..484857e13c114c65933944091b38d0fcb546e0b8 100644 (file)
--- a/osfmk/i386/commpage/pthreads.s
+++ b/osfmk/i386/commpage/pthreads.s
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2003 Apple Computer, Inc. All rights reserved.
+ * Copyright (c) 2003-2006 Apple Computer, Inc. All rights reserved.
  *
  * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
  * 
@@ -30,21 +30,41 @@
 #include <machine/cpu_capabilities.h>
 #include <machine/commpage.h>
 
-#define _PTHREAD_TSD_OFFSET 0x48
+#define _PTHREAD_TSD_OFFSET32 0x48
+#define _PTHREAD_TSD_OFFSET64 0x60
 
+
+/* These routines do not need to be on the copmmpage on Intel.  They are for now
+ * to avoid revlock, but the code should move to Libc, and we should eventually remove
+ * these.
+ */
         .text
         .align  2, 0x90
 
 Lpthread_getspecific:
        movl    4(%esp), %eax
-       movl    %gs:_PTHREAD_TSD_OFFSET(,%eax,4), %eax
+       movl    %gs:_PTHREAD_TSD_OFFSET32(,%eax,4), %eax
        ret
 
        COMMPAGE_DESCRIPTOR(pthread_getspecific,_COMM_PAGE_PTHREAD_GETSPECIFIC,0,0)
 
 Lpthread_self:
-       movl    4(%esp), %eax
-       movl    %gs:_PTHREAD_TSD_OFFSET, %eax
+       movl    %gs:_PTHREAD_TSD_OFFSET32, %eax
        ret
 
        COMMPAGE_DESCRIPTOR(pthread_self,_COMM_PAGE_PTHREAD_SELF,0,0)
+
+/* the 64-bit versions: */
+       
+       .code64
+Lpthread_getspecific_64:
+       movq    %gs:_PTHREAD_TSD_OFFSET64(,%rdi,8), %rax
+       ret
+
+       COMMPAGE_DESCRIPTOR(pthread_getspecific_64,_COMM_PAGE_PTHREAD_GETSPECIFIC,0,0)
+
+Lpthread_self_64:
+       movq    %gs:_PTHREAD_TSD_OFFSET64, %rax
+       ret
+
+       COMMPAGE_DESCRIPTOR(pthread_self_64,_COMM_PAGE_PTHREAD_SELF,0,0)