+ src = PHYSMAP_PTOV(src64);
+ dst = PHYSMAP_PTOV(dst64);
+ }
+ /* DRK: debugger only routine, we don't bother checking for an
+ * identical mapping.
+ */
+ if (debug_pa) {
+ if (debugger_window_kva == 0)
+ panic("%s: invoked in non-debug mode", __FUNCTION__);
+ /* Establish a cache-inhibited physical window; some platforms
+ * may not cover arbitrary ranges with MTRRs
+ */
+ pmap_store_pte(debugger_ptep, debug_pa | INTEL_PTE_NCACHE | INTEL_PTE_RW | INTEL_PTE_REF| INTEL_PTE_MOD | INTEL_PTE_VALID);
+ flush_tlb_raw();
+#if DEBUG
+ kprintf("Remapping debugger physical window at %p to 0x%llx\n", (void *)debugger_window_kva, debug_pa);
+#endif
+ }
+#endif
+ /* ensure we stay within a page */
+ if (((((uint32_t)src64 & (I386_PGBYTES-1)) + bytes) > I386_PGBYTES) || ((((uint32_t)dst64 & (I386_PGBYTES-1)) + bytes) > I386_PGBYTES) ) {
+ panic("ml_copy_phys spans pages, src: 0x%llx, dst: 0x%llx", src64, dst64);
+ }
+
+ /*
+ * For device register access from the debugger,
+ * 2-byte/16-bit, 4-byte/32-bit and 8-byte/64-bit copies are handled
+ * by assembly routines ensuring the required access widths.
+ * 1-byte and other copies are handled by the regular _bcopy.
+ */
+ switch (bytes) {
+ case 2:
+ err = _bcopy2(src, dst);
+ break;
+ case 4:
+ err = _bcopy4(src, dst);
+ break;
+ case 8:
+ err = _bcopy8(src, dst);
+ break;
+ case 1:
+ default:
+ err = _bcopy(src, dst, bytes);
+ break;