]> git.saurik.com Git - apple/xnu.git/blobdiff - osfmk/mach/machine.h
xnu-1504.15.3.tar.gz
[apple/xnu.git] / osfmk / mach / machine.h
index e6d82b043d0f568a2d09cb6dd4bf6794c571d1a0..d209fa27834984e5b98a970bdacd4e17a79d3048 100644 (file)
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2000-2005 Apple Computer, Inc. All rights reserved.
+ * Copyright (c) 2000-2007 Apple Computer, Inc. All rights reserved.
  *
  * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
  * 
@@ -93,12 +93,11 @@ struct machine_info {
        integer_t       major_version;          /* kernel major version id */
        integer_t       minor_version;          /* kernel minor version id */
        integer_t       max_cpus;                       /* max number of CPUs possible */
-       integer_t       avail_cpus;                     /* number of CPUs now available */
        uint32_t        memory_size;            /* size of memory in bytes, capped at 2 GB */
        uint64_t        max_mem;                        /* actual size of physical memory */
-       integer_t       physical_cpu;           /* number of physical CPUs now available */
+       uint32_t        physical_cpu;           /* number of physical CPUs now available */
        integer_t       physical_cpu_max;       /* max number of physical CPUs possible */
-       integer_t       logical_cpu;            /* number of logical cpu now available */
+       uint32_t        logical_cpu;            /* number of logical cpu now available */
        integer_t       logical_cpu_max;        /* max number of physical CPUs possible */
 };
 
@@ -148,7 +147,7 @@ __END_DECLS
 /* skip                        ((cpu_type_t) 9)        */
 #define CPU_TYPE_MC98000       ((cpu_type_t) 10)
 #define CPU_TYPE_HPPA           ((cpu_type_t) 11)
-/* skip CPU_TYPE_ARM           ((cpu_type_t) 12)       */
+#define CPU_TYPE_ARM           ((cpu_type_t) 12)
 #define CPU_TYPE_MC88000       ((cpu_type_t) 13)
 #define CPU_TYPE_SPARC         ((cpu_type_t) 14)
 #define CPU_TYPE_I860          ((cpu_type_t) 15)
@@ -163,6 +162,13 @@ __END_DECLS
  *     regardless of where is it compiled).
  */
 
+/*
+ * Capability bits used in the definition of cpu_subtype.
+ */
+#define CPU_SUBTYPE_MASK       0xff000000      /* mask for feature flags */
+#define CPU_SUBTYPE_LIB64      0x80000000      /* 64 bit libraries */
+
+
 /*
  *     Object files that are hand-crafted to run on any
  *     implementation of an architecture are tagged with
@@ -334,19 +340,49 @@ __END_DECLS
 #define CPU_SUBTYPE_POWERPC_970                ((cpu_subtype_t) 100)
 
 /*
- *      CPU families (sysctl hw.cpufamily)
+ *     ARM subtypes
+ */
+#define CPU_SUBTYPE_ARM_ALL             ((cpu_subtype_t) 0)
+#define CPU_SUBTYPE_ARM_V4T             ((cpu_subtype_t) 5)
+#define CPU_SUBTYPE_ARM_V6              ((cpu_subtype_t) 6)
+#define CPU_SUBTYPE_ARM_V5TEJ           ((cpu_subtype_t) 7)
+#define CPU_SUBTYPE_ARM_XSCALE         ((cpu_subtype_t) 8)
+#define CPU_SUBTYPE_ARM_V7             ((cpu_subtype_t) 9)
+
+/*
+ *     CPU families (sysctl hw.cpufamily)
  *
+ * These are meant to identify the CPU's marketing name - an
+ * application can map these to (possibly) localized strings.
  * NB: the encodings of the CPU families are intentionally arbitrary.
  * There is no ordering, and you should never try to deduce whether
  * or not some feature is available based on the family.
  * Use feature flags (eg, hw.optional.altivec) to test for optional
  * functionality.
  */
-#define CPUFAMILY_UNKNOWN    0
-#define CPUFAMILY_POWERPC_G3 0xcee41549
-#define CPUFAMILY_POWERPC_G4 0x77c184ae
-#define CPUFAMILY_POWERPC_G5 0xed76d8aa
-#define CPUFAMILY_INTEL_6_14 0x73d67300  /* Intel Core Solo and Intel Core Duo (32-bit Pentium-M with SSE3) */
-#define CPUFAMILY_INTEL_6_15 0x426f69ef  /* Intel Core 2 */
+#define CPUFAMILY_UNKNOWN              0
+#define CPUFAMILY_POWERPC_G3           0xcee41549
+#define CPUFAMILY_POWERPC_G4           0x77c184ae
+#define CPUFAMILY_POWERPC_G5           0xed76d8aa
+#define CPUFAMILY_INTEL_6_13           0xaa33392b
+#define CPUFAMILY_INTEL_YONAH          0x73d67300
+#define CPUFAMILY_INTEL_MEROM          0x426f69ef
+#define CPUFAMILY_INTEL_PENRYN         0x78ea4fbc
+#define CPUFAMILY_INTEL_NEHALEM                0x6b5a4cd2
+#define CPUFAMILY_INTEL_WESTMERE       0x573b5eec
+#define CPUFAMILY_ARM_9                        0xe73283ae
+#define CPUFAMILY_ARM_11               0x8ff620d8
+#define CPUFAMILY_ARM_XSCALE           0x53b005f5
+#define CPUFAMILY_ARM_13               0x0cc90e64
+
+/* The following synonyms are deprecated: */
+#define CPUFAMILY_INTEL_6_14   CPUFAMILY_INTEL_YONAH
+#define CPUFAMILY_INTEL_6_15   CPUFAMILY_INTEL_MEROM
+#define CPUFAMILY_INTEL_6_23   CPUFAMILY_INTEL_PENRYN
+#define CPUFAMILY_INTEL_6_26   CPUFAMILY_INTEL_NEHALEM
+
+#define CPUFAMILY_INTEL_CORE   CPUFAMILY_INTEL_YONAH
+#define CPUFAMILY_INTEL_CORE2  CPUFAMILY_INTEL_MEROM
+
 
 #endif /* _MACH_MACHINE_H_ */