/*
- * Copyright (c) 2000-2006 Apple Computer, Inc. All rights reserved.
+ * Copyright (c) 2000-2012 Apple Inc. All rights reserved.
*
* @APPLE_OSREFERENCE_LICENSE_HEADER_START@
*
/*
* @OSF_COPYRIGHT@
*/
-#include <platforms.h>
-#include <mach_kdb.h>
#include <vm/vm_page.h>
#include <pexpert/pexpert.h>
#include <i386/cpuid.h>
-#if MACH_KDB
-#include <machine/db_machdep.h>
-#include <ddb/db_aout.h>
-#include <ddb/db_access.h>
-#include <ddb/db_sym.h>
-#include <ddb/db_variables.h>
-#include <ddb/db_command.h>
-#include <ddb/db_output.h>
-#include <ddb/db_expr.h>
-#endif
static boolean_t cpuid_dbg
#if DEBUG
{ 0x70, CACHE, TRACE, 8, 12*K, NA },
{ 0x71, CACHE, TRACE, 8, 16*K, NA },
{ 0x72, CACHE, TRACE, 8, 32*K, NA },
+ { 0x76, TLB, INST, NA, BOTH, 8 },
{ 0x78, CACHE, L2, 4, 1*M, 64 },
{ 0x79, CACHE, L2_2LINESECTOR, 8, 128*K, 64 },
{ 0x7A, CACHE, L2_2LINESECTOR, 8, 256*K, 64 },
{ 0xB2, TLB, INST, 4, SMALL, 64 },
{ 0xB3, TLB, DATA, 4, SMALL, 128 },
{ 0xB4, TLB, DATA1, 4, SMALL, 256 },
+ { 0xB5, TLB, DATA1, 8, SMALL, 64 },
+ { 0xB6, TLB, DATA1, 8, SMALL, 128 },
{ 0xBA, TLB, DATA1, 4, BOTH, 64 },
- { 0xCA, STLB, DATA1, 4, BOTH, 512 },
+ { 0xC1, STLB, DATA1, 8, SMALL, 1024},
+ { 0xCA, STLB, DATA1, 4, SMALL, 512 },
{ 0xD0, CACHE, L3, 4, 512*K, 64 },
{ 0xD1, CACHE, L3, 4, 1*M, 64 },
{ 0xD2, CACHE, L3, 4, 2*M, 64 },
* CPU identification routines.
*/
-static i386_cpu_info_t *cpuid_cpu_infop = NULL;
static i386_cpu_info_t cpuid_cpu_info;
+static i386_cpu_info_t *cpuid_cpu_infop = NULL;
-#if defined(__x86_64__)
static void cpuid_fn(uint32_t selector, uint32_t *result)
{
do_cpuid(selector, result);
DBG("cpuid_fn(0x%08x) eax:0x%08x ebx:0x%08x ecx:0x%08x edx:0x%08x\n",
selector, result[0], result[1], result[2], result[3]);
}
-#else
-static void cpuid_fn(uint32_t selector, uint32_t *result)
-{
- if (get_is64bit()) {
- asm("call _cpuid64"
- : "=a" (result[0]),
- "=b" (result[1]),
- "=c" (result[2]),
- "=d" (result[3])
- : "a"(selector),
- "b" (0),
- "c" (0),
- "d" (0));
- } else {
- do_cpuid(selector, result);
- }
- DBG("cpuid_fn(0x%08x) eax:0x%08x ebx:0x%08x ecx:0x%08x edx:0x%08x\n",
- selector, result[0], result[1], result[2], result[3]);
-}
-#endif
static const char *cache_type_str[LCACHE_MAX] = {
"Lnone", "L1I", "L1D", "L2U", "L3U"
info_p->cpuid_features = quad(reg[ecx], reg[edx]);
/* Get "processor flag"; necessary for microcode update matching */
- info_p->cpuid_processor_flag = (rdmsr64(MSR_IA32_PLATFORM_ID)>> 50) & 3;
+ info_p->cpuid_processor_flag = (rdmsr64(MSR_IA32_PLATFORM_ID)>> 50) & 0x7;
/* Fold extensions into family/model */
if (info_p->cpuid_family == 0x0f)
DBG(" features : 0x%016llx\n", info_p->cpuid_features);
DBG(" extfeatures : 0x%016llx\n", info_p->cpuid_extfeatures);
DBG(" logical_per_package : %d\n", info_p->cpuid_logical_per_package);
- DBG(" microcode_version : 0x%08x\n", info_p->cpuid_microcode_version);
+ DBG(" microcode_version : 0x%08x\n", info_p->cpuid_microcode_version);
/* Fold in the Invariant TSC feature bit, if present */
if (info_p->cpuid_max_ext >= 0x80000007) {
ctp->sensor = bitfield32(reg[eax], 0, 0);
ctp->dynamic_acceleration = bitfield32(reg[eax], 1, 1);
ctp->invariant_APIC_timer = bitfield32(reg[eax], 2, 2);
- ctp->core_power_limits = bitfield32(reg[eax], 3, 3);
- ctp->fine_grain_clock_mod = bitfield32(reg[eax], 4, 4);
- ctp->package_thermal_intr = bitfield32(reg[eax], 5, 5);
+ ctp->core_power_limits = bitfield32(reg[eax], 4, 4);
+ ctp->fine_grain_clock_mod = bitfield32(reg[eax], 5, 5);
+ ctp->package_thermal_intr = bitfield32(reg[eax], 6, 6);
ctp->thresholds = bitfield32(reg[ebx], 3, 0);
ctp->ACNT_MCNT = bitfield32(reg[ecx], 0, 0);
ctp->hardware_feedback = bitfield32(reg[ecx], 1, 1);
- ctp->energy_policy = bitfield32(reg[ecx], 2, 2);
+ ctp->energy_policy = bitfield32(reg[ecx], 3, 3);
info_p->cpuid_thermal_leafp = ctp;
DBG(" Thermal/Power Leaf:\n");
DBG(" package_thermal_intr : %d\n", ctp->package_thermal_intr);
DBG(" thresholds : %d\n", ctp->thresholds);
DBG(" ACNT_MCNT : %d\n", ctp->ACNT_MCNT);
- DBG(" hardware_feedback : %d\n", ctp->hardware_feedback);
+ DBG(" ACNT2 : %d\n", ctp->hardware_feedback);
DBG(" energy_policy : %d\n", ctp->energy_policy);
}
DBG(" EDX : 0x%x\n", xsp->extended_state[edx]);
}
+ if (info_p->cpuid_model >= CPUID_MODEL_IVYBRIDGE) {
+ /*
+ * Leaf7 Features:
+ */
+ cpuid_fn(0x7, reg);
+ info_p->cpuid_leaf7_features = reg[ebx];
+
+ DBG(" Feature Leaf7:\n");
+ DBG(" EBX : 0x%x\n", reg[ebx]);
+ }
+
return;
}
switch (info_p->cpuid_family) {
case 6:
switch (info_p->cpuid_model) {
-#if CONFIG_YONAH
- case 14:
- cpufamily = CPUFAMILY_INTEL_YONAH;
- break;
-#endif
case 15:
cpufamily = CPUFAMILY_INTEL_MEROM;
break;
case CPUID_MODEL_JAKETOWN:
cpufamily = CPUFAMILY_INTEL_SANDYBRIDGE;
break;
+ case CPUID_MODEL_IVYBRIDGE:
+ case CPUID_MODEL_IVYBRIDGE_EP:
+ cpufamily = CPUFAMILY_INTEL_IVYBRIDGE;
+ break;
+ case CPUID_MODEL_HASWELL:
+ case CPUID_MODEL_HASWELL_ULT:
+ case CPUID_MODEL_CRYSTALWELL:
+ cpufamily = CPUFAMILY_INTEL_HASWELL;
+ break;
}
break;
}
cpuid_set_info(void)
{
i386_cpu_info_t *info_p = &cpuid_cpu_info;
-
- PE_parse_boot_argn("-cpuid", &cpuid_dbg, sizeof(cpuid_dbg));
-
- bzero((void *)info_p, sizeof(cpuid_cpu_info));
+ boolean_t enable_x86_64h = TRUE;
cpuid_set_generic_info(info_p);
panic("Unsupported CPU");
info_p->cpuid_cpu_type = CPU_TYPE_X86;
- info_p->cpuid_cpu_subtype = CPU_SUBTYPE_X86_ARCH1;
+
+ if (!PE_parse_boot_argn("-enable_x86_64h", &enable_x86_64h, sizeof(enable_x86_64h))) {
+ boolean_t disable_x86_64h = FALSE;
+
+ if (PE_parse_boot_argn("-disable_x86_64h", &disable_x86_64h, sizeof(disable_x86_64h))) {
+ enable_x86_64h = FALSE;
+ }
+ }
+
+ if (enable_x86_64h &&
+ ((info_p->cpuid_features & CPUID_X86_64_H_FEATURE_SUBSET) == CPUID_X86_64_H_FEATURE_SUBSET) &&
+ ((info_p->cpuid_extfeatures & CPUID_X86_64_H_EXTFEATURE_SUBSET) == CPUID_X86_64_H_EXTFEATURE_SUBSET) &&
+ ((info_p->cpuid_leaf7_features & CPUID_X86_64_H_LEAF7_FEATURE_SUBSET) == CPUID_X86_64_H_LEAF7_FEATURE_SUBSET)) {
+ info_p->cpuid_cpu_subtype = CPU_SUBTYPE_X86_64_H;
+ } else {
+ info_p->cpuid_cpu_subtype = CPU_SUBTYPE_X86_ARCH1;
+ }
+
/* Must be invoked after set_generic_info */
- cpuid_set_cache_info(&cpuid_cpu_info);
+ cpuid_set_cache_info(info_p);
/*
* Find the number of enabled cores and threads
info_p->thread_count = bitfield32((uint32_t)msr, 15, 0);
break;
}
+ case CPUFAMILY_INTEL_HASWELL:
+ case CPUFAMILY_INTEL_IVYBRIDGE:
case CPUFAMILY_INTEL_SANDYBRIDGE:
case CPUFAMILY_INTEL_NEHALEM: {
uint64_t msr = rdmsr64(MSR_CORE_THREAD_COUNT);
DBG("cpuid_set_info():\n");
DBG(" core_count : %d\n", info_p->core_count);
DBG(" thread_count : %d\n", info_p->thread_count);
+ DBG(" cpu_type: 0x%08x\n", info_p->cpuid_cpu_type);
+ DBG(" cpu_subtype: 0x%08x\n", info_p->cpuid_cpu_subtype);
- cpuid_cpu_info.cpuid_model_string = ""; /* deprecated */
+ info_p->cpuid_model_string = ""; /* deprecated */
}
static struct table {
{CPUID_FEATURE_TM2, "TM2"},
{CPUID_FEATURE_SSSE3, "SSSE3"},
{CPUID_FEATURE_CID, "CID"},
+ {CPUID_FEATURE_FMA, "FMA"},
{CPUID_FEATURE_CX16, "CX16"},
{CPUID_FEATURE_xTPR, "TPR"},
{CPUID_FEATURE_PDCM, "PDCM"},
{CPUID_FEATURE_SSE4_1, "SSE4.1"},
{CPUID_FEATURE_SSE4_2, "SSE4.2"},
- {CPUID_FEATURE_xAPIC, "xAPIC"},
+ {CPUID_FEATURE_x2APIC, "x2APIC"},
{CPUID_FEATURE_MOVBE, "MOVBE"},
{CPUID_FEATURE_POPCNT, "POPCNT"},
{CPUID_FEATURE_AES, "AES"},
{CPUID_FEATURE_SEGLIM64, "SEGLIM64"},
{CPUID_FEATURE_TSCTMR, "TSCTMR"},
{CPUID_FEATURE_AVX1_0, "AVX1.0"},
+ {CPUID_FEATURE_RDRAND, "RDRAND"},
+ {CPUID_FEATURE_F16C, "F16C"},
{0, 0}
},
extfeature_map[] = {
{CPUID_EXTFEATURE_1GBPAGE, "1GBPAGE"},
{CPUID_EXTFEATURE_EM64T, "EM64T"},
{CPUID_EXTFEATURE_LAHF, "LAHF"},
+ {CPUID_EXTFEATURE_LZCNT, "LZCNT"},
+ {CPUID_EXTFEATURE_PREFETCHW, "PREFETCHW"},
{CPUID_EXTFEATURE_RDTSCP, "RDTSCP"},
{CPUID_EXTFEATURE_TSCI, "TSCI"},
{0, 0}
+
+},
+leaf7_feature_map[] = {
+ {CPUID_LEAF7_FEATURE_SMEP, "SMEP"},
+ {CPUID_LEAF7_FEATURE_ERMS, "ERMS"},
+ {CPUID_LEAF7_FEATURE_RDWRFSGS, "RDWRFSGS"},
+ {CPUID_LEAF7_FEATURE_TSCOFF, "TSC_THREAD_OFFSET"},
+ {CPUID_LEAF7_FEATURE_BMI1, "BMI1"},
+ {CPUID_LEAF7_FEATURE_HLE, "HLE"},
+ {CPUID_LEAF7_FEATURE_AVX2, "AVX2"},
+ {CPUID_LEAF7_FEATURE_BMI2, "BMI2"},
+ {CPUID_LEAF7_FEATURE_INVPCID, "INVPCID"},
+ {CPUID_LEAF7_FEATURE_RTM, "RTM"},
+ {0, 0}
};
static char *
{
/* Set-up the cpuid_info stucture lazily */
if (cpuid_cpu_infop == NULL) {
+ PE_parse_boot_argn("-cpuid", &cpuid_dbg, sizeof(cpuid_dbg));
cpuid_set_info();
cpuid_cpu_infop = &cpuid_cpu_info;
}
return cpuid_get_names(extfeature_map, extfeatures, buf, buf_len);
}
+char *
+cpuid_get_leaf7_feature_names(uint64_t features, char *buf, unsigned buf_len)
+{
+ return cpuid_get_names(leaf7_feature_map, features, buf, buf_len);
+}
+
void
cpuid_feature_display(
const char *header)
kprintf("%s: %s", header,
cpuid_get_feature_names(cpuid_features(), buf, sizeof(buf)));
+ if (cpuid_leaf7_features())
+ kprintf(" %s", cpuid_get_leaf7_feature_names(
+ cpuid_leaf7_features(), buf, sizeof(buf)));
kprintf("\n");
if (cpuid_features() & CPUID_FEATURE_HTT) {
#define s_if_plural(n) ((n > 1) ? "s" : "")
kprintf(" HTT: %d core%s per package;"
" %d logical cpu%s per package\n",
- cpuid_cpu_info.cpuid_cores_per_package,
- s_if_plural(cpuid_cpu_info.cpuid_cores_per_package),
- cpuid_cpu_info.cpuid_logical_per_package,
- s_if_plural(cpuid_cpu_info.cpuid_logical_per_package));
+ cpuid_cpu_infop->cpuid_cores_per_package,
+ s_if_plural(cpuid_cpu_infop->cpuid_cores_per_package),
+ cpuid_cpu_infop->cpuid_logical_per_package,
+ s_if_plural(cpuid_cpu_infop->cpuid_logical_per_package));
}
}
cpuid_cpu_display(
const char *header)
{
- if (cpuid_cpu_info.cpuid_brand_string[0] != '\0') {
- kprintf("%s: %s\n", header, cpuid_cpu_info.cpuid_brand_string);
+ if (cpuid_cpu_infop->cpuid_brand_string[0] != '\0') {
+ kprintf("%s: %s\n", header, cpuid_cpu_infop->cpuid_brand_string);
}
}
printf("limiting fpu features to: %s\n", fpu_arg);
if (!strncmp("387", fpu_arg, sizeof("387")) || !strncmp("mmx", fpu_arg, sizeof("mmx"))) {
printf("no sse or sse2\n");
- cpuid_cpu_info.cpuid_features &= ~(CPUID_FEATURE_SSE | CPUID_FEATURE_SSE2 | CPUID_FEATURE_FXSR);
+ cpuid_cpu_infop->cpuid_features &= ~(CPUID_FEATURE_SSE | CPUID_FEATURE_SSE2 | CPUID_FEATURE_FXSR);
} else if (!strncmp("sse", fpu_arg, sizeof("sse"))) {
printf("no sse2\n");
- cpuid_cpu_info.cpuid_features &= ~(CPUID_FEATURE_SSE2);
+ cpuid_cpu_infop->cpuid_features &= ~(CPUID_FEATURE_SSE2);
}
}
checked = 1;
}
- return cpuid_cpu_info.cpuid_features;
+ return cpuid_cpu_infop->cpuid_features;
}
uint64_t
return cpuid_info()->cpuid_extfeatures;
}
-
-#if MACH_KDB
+uint64_t
+cpuid_leaf7_features(void)
+{
+ return cpuid_info()->cpuid_leaf7_features;
+}
-/*
- * Display the cpuid
- * *
- * cp
- */
-void
-db_cpuid(__unused db_expr_t addr,
- __unused int have_addr,
- __unused db_expr_t count,
- __unused char *modif)
+static i386_vmm_info_t *_cpuid_vmm_infop = NULL;
+static i386_vmm_info_t _cpuid_vmm_info;
+
+static void
+cpuid_init_vmm_info(i386_vmm_info_t *info_p)
{
+ uint32_t reg[4];
+ uint32_t max_vmm_leaf;
+
+ bzero(info_p, sizeof(*info_p));
+
+ if (!cpuid_vmm_present())
+ return;
- uint32_t i, mid;
- uint32_t cpid[4];
+ DBG("cpuid_init_vmm_info(%p)\n", info_p);
- do_cpuid(0, cpid); /* Get the first cpuid which is the number of
- * basic ids */
- db_printf("%08X - %08X %08X %08X %08X\n",
- 0, cpid[eax], cpid[ebx], cpid[ecx], cpid[edx]);
+ /* do cpuid 0x40000000 to get VMM vendor */
+ cpuid_fn(0x40000000, reg);
+ max_vmm_leaf = reg[eax];
+ bcopy((char *)®[ebx], &info_p->cpuid_vmm_vendor[0], 4);
+ bcopy((char *)®[ecx], &info_p->cpuid_vmm_vendor[4], 4);
+ bcopy((char *)®[edx], &info_p->cpuid_vmm_vendor[8], 4);
+ info_p->cpuid_vmm_vendor[12] = '\0';
- mid = cpid[eax]; /* Set the number */
- for (i = 1; i <= mid; i++) { /* Dump 'em out */
- do_cpuid(i, cpid); /* Get the next */
- db_printf("%08X - %08X %08X %08X %08X\n",
- i, cpid[eax], cpid[ebx], cpid[ecx], cpid[edx]);
+ if (0 == strcmp(info_p->cpuid_vmm_vendor, CPUID_VMM_ID_VMWARE)) {
+ /* VMware identification string: kb.vmware.com/kb/1009458 */
+ info_p->cpuid_vmm_family = CPUID_VMM_FAMILY_VMWARE;
+ } else if (0 == strcmp(info_p->cpuid_vmm_vendor, CPUID_VMM_ID_PARALLELS)) {
+ /* Parallels identification string */
+ info_p->cpuid_vmm_family = CPUID_VMM_FAMILY_PARALLELS;
+ } else {
+ info_p->cpuid_vmm_family = CPUID_VMM_FAMILY_UNKNOWN;
}
- db_printf("\n");
-
- do_cpuid(0x80000000, cpid); /* Get the first extended cpuid which
- * is the number of extended ids */
- db_printf("%08X - %08X %08X %08X %08X\n",
- 0x80000000, cpid[eax], cpid[ebx], cpid[ecx], cpid[edx]);
-
- mid = cpid[eax]; /* Set the number */
- for (i = 0x80000001; i <= mid; i++) { /* Dump 'em out */
- do_cpuid(i, cpid); /* Get the next */
- db_printf("%08X - %08X %08X %08X %08X\n",
- i, cpid[eax], cpid[ebx], cpid[ecx], cpid[edx]);
+
+ /* VMM generic leaves: https://lkml.org/lkml/2008/10/1/246 */
+ if (max_vmm_leaf >= 0x40000010) {
+ cpuid_fn(0x40000010, reg);
+
+ info_p->cpuid_vmm_tsc_frequency = reg[eax];
+ info_p->cpuid_vmm_bus_frequency = reg[ebx];
}
+
+ DBG(" vmm_vendor : %s\n", info_p->cpuid_vmm_vendor);
+ DBG(" vmm_family : %u\n", info_p->cpuid_vmm_family);
+ DBG(" vmm_bus_frequency : %u\n", info_p->cpuid_vmm_bus_frequency);
+ DBG(" vmm_tsc_frequency : %u\n", info_p->cpuid_vmm_tsc_frequency);
+}
+
+boolean_t
+cpuid_vmm_present(void)
+{
+ return (cpuid_features() & CPUID_FEATURE_VMM) ? TRUE : FALSE;
+}
+
+i386_vmm_info_t *
+cpuid_vmm_info(void)
+{
+ if (_cpuid_vmm_infop == NULL) {
+ cpuid_init_vmm_info(&_cpuid_vmm_info);
+ _cpuid_vmm_infop = &_cpuid_vmm_info;
+ }
+ return _cpuid_vmm_infop;
+}
+
+uint32_t
+cpuid_vmm_family(void)
+{
+ return cpuid_vmm_info()->cpuid_vmm_family;
}
-#endif
projects / apple / xnu.git / blobdiff