xnu-4903.221.2.tar.gz

[apple/xnu.git] / osfmk / i386 / ucode.c

diff --git a/osfmk/i386/ucode.c b/osfmk/i386/ucode.c
index e416cc5ff015700f881e43f58f782a1c20a299a3..15e0e5103f474387241243231af3a99be29be861 100644 (file)
--- a/osfmk/i386/ucode.c
+++ b/osfmk/i386/ucode.c
@@ -1,3 +1,30 @@
+/*
+ * Copyright (c) 2017 Apple Inc. All rights reserved.
+ *
+ * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
+ *
+ * This file contains Original Code and/or Modifications of Original Code
+ * as defined in and that are subject to the Apple Public Source License
+ * Version 2.0 (the 'License'). You may not use this file except in
+ * compliance with the License. The rights granted to you under the License
+ * may not be used to create, or enable the creation or redistribution of,
+ * unlawful or unlicensed copies of an Apple operating system, or to
+ * circumvent, violate, or enable the circumvention or violation of, any
+ * terms of an Apple operating system software license agreement.
+ *
+ * Please obtain a copy of the License at
+ * http://www.opensource.apple.com/apsl/ and read it before using this file.
+ *
+ * The Original Code and all software distributed under the License are
+ * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
+ * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
+ * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
+ * Please see the License for the specific language governing rights and
+ * limitations under the License.
+ *
+ * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
+ */
 /*
  *  ucode.c
  *
@@ -11,7 +38,9 @@
 #include <i386/cpuid.h>
 #include <vm/vm_kern.h>
 #include <i386/mp.h>                   // mp_broadcast
+#include <i386/fpu.h>
 #include <machine/cpu_number.h> // cpu_number
+#include <pexpert/pexpert.h>  // boot-args
 
 #define IA32_BIOS_UPDT_TRIG (0x79) /* microcode update trigger MSR */
 
@@ -108,7 +137,7 @@ copyin_update(uint64_t inaddr)
         * It need only be aligned to 16-bytes, according to the SDM.
         * This also wires it down
         */
-       ret = kmem_alloc_kobject(kernel_map, (vm_offset_t *)&update, size);
+       ret = kmem_alloc_kobject(kernel_map, (vm_offset_t *)&update, size, VM_KERN_MEMORY_OSFMK);
        if (ret != KERN_SUCCESS)
                return ENOMEM;
 
@@ -134,7 +163,7 @@ ucode_update_wake()
        if (global_update) {
                kprintf("ucode: Re-applying update after wake (CPU #%d)\n", cpu_number());
                update_microcode();
-#ifdef DEBUG
+#if DEBUG
        } else {
                kprintf("ucode: No update to apply (CPU #%d)\n", cpu_number());
 #endif
@@ -150,14 +179,45 @@ cpu_update(__unused void *arg)
        /* execute the update */
        update_microcode();
 
-       /* if CPU #0, update global CPU information */
-       if (!cpu_number())
-               cpuid_set_info();
-
        /* release the lock */
        lck_spin_unlock(ucode_slock);
 }
 
+static void
+ucode_cpuid_set_info(void)
+{
+       uint64_t saved_xcr0, dest_xcr0;
+       int need_xcr0_restore = 0;
+       boolean_t intrs_enabled = ml_set_interrupts_enabled(FALSE);
+
+       /*
+        * Before we cache the CPUID information, we must configure XCR0 with the maximal set of
+        * features to ensure the save area returned in the xsave leaf is correctly-sized.
+        *
+        * Since we are guaranteed that init_fpu() has already happened, we can use state
+        * variables set there that were already predicated on the presence of explicit
+        * boot-args enables/disables.
+        */
+
+       if (fpu_capability == AVX512 || fpu_capability == AVX) {
+               saved_xcr0 = xgetbv(XCR0);
+               dest_xcr0 = (fpu_capability == AVX512) ? AVX512_XMASK : AVX_XMASK;
+               assert((get_cr4() & CR4_OSXSAVE) != 0);
+               if (saved_xcr0 != dest_xcr0) {
+                       need_xcr0_restore = 1;
+                       xsetbv(dest_xcr0 >> 32, dest_xcr0 & 0xFFFFFFFFUL);
+               }
+       }
+
+       cpuid_set_info();
+
+       if (need_xcr0_restore) {
+               xsetbv(saved_xcr0 >> 32, saved_xcr0 & 0xFFFFFFFFUL);
+       }
+
+       ml_set_interrupts_enabled(intrs_enabled);
+}
+
 /* Farm an update out to all CPUs */
 static void
 xcpu_update(void)
@@ -167,6 +227,9 @@ xcpu_update(void)
 
        /* Get all CPUs to perform the update */
        mp_broadcast(cpu_update, NULL);
+
+       /* Update the cpuid info */
+       ucode_cpuid_set_info();
 }
 
 /*
@@ -177,6 +240,12 @@ int
 ucode_interface(uint64_t addr)
 {
        int error;
+       char arg[16]; 
+
+       if (PE_parse_boot_argn("-x", arg, sizeof (arg))) {
+               printf("ucode: no updates in safe mode\n");
+               return EPERM;
+       }
 
 #if !DEBUG
        /*