xnu-1228.0.2.tar.gz

[apple/xnu.git] / osfmk / i386 / fpu.h

diff --git a/osfmk/i386/fpu.h b/osfmk/i386/fpu.h
index 618e2e3ce269b904c6a427ba41ed0b2cd3b648e3..cd0b7890635ed9a364480035e3c65ec1e4d7877d 100644 (file)
--- a/osfmk/i386/fpu.h
+++ b/osfmk/i386/fpu.h
@@ -1,23 +1,29 @@
 /*
 /*

- * Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
+ * Copyright (c) 2000-2006 Apple Computer, Inc. All rights reserved.

  *
  *

- * @APPLE_LICENSE_HEADER_START@
+ * @APPLE_OSREFERENCE_LICENSE_HEADER_START@

  * 
  * 

- * The contents of this file constitute Original Code as defined in and
- * are subject to the Apple Public Source License Version 1.1 (the
- * "License").  You may not use this file except in compliance with the
- * License.  Please obtain a copy of the License at
- * http://www.apple.com/publicsource and read it before using this file.
+ * This file contains Original Code and/or Modifications of Original Code
+ * as defined in and that are subject to the Apple Public Source License
+ * Version 2.0 (the 'License'). You may not use this file except in
+ * compliance with the License. The rights granted to you under the License
+ * may not be used to create, or enable the creation or redistribution of,
+ * unlawful or unlicensed copies of an Apple operating system, or to
+ * circumvent, violate, or enable the circumvention or violation of, any
+ * terms of an Apple operating system software license agreement.

  * 
  * 

- * This Original Code and all software distributed under the License are
- * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
+ * Please obtain a copy of the License at
+ * http://www.opensource.apple.com/apsl/ and read it before using this file.
+ * 
+ * The Original Code and all software distributed under the License are
+ * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER

  * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
  * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
  * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
  * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,

- * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT.  Please see the
- * License for the specific language governing rights and limitations
- * under the License.
+ * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
+ * Please see the License for the specific language governing rights and
+ * limitations under the License.

  * 
  * 

- * @APPLE_LICENSE_HEADER_END@
+ * @APPLE_OSREFERENCE_LICENSE_HEADER_END@

  */
 /*
  * @OSF_COPYRIGHT@
  */
 /*
  * @OSF_COPYRIGHT@


@@ -48,9 +54,6 @@
  * the rights to redistribute these changes.
  */
 
  * the rights to redistribute these changes.
  */
 

-/*
- */
-

 #ifndef        _I386_FPU_H_
 #define        _I386_FPU_H_
 
 #ifndef        _I386_FPU_H_
 #define        _I386_FPU_H_
 


@@ -58,12 +61,36 @@
  * Macro definitions for routines to manipulate the
  * floating-point processor.
  */
  * Macro definitions for routines to manipulate the
  * floating-point processor.
  */

-
-#include <i386/proc_reg.h>
+#include <kern/thread.h>

 #include <i386/thread.h>
 #include <kern/kern_types.h>
 #include <mach/i386/kern_return.h>
 #include <mach/i386/thread_status.h>
 #include <i386/thread.h>
 #include <kern/kern_types.h>
 #include <mach/i386/kern_return.h>
 #include <mach/i386/thread_status.h>

+#include <i386/proc_reg.h>
+
+extern int             fp_kind;
+
+extern void            init_fpu(void);
+extern void            fpu_module_init(void);
+extern void            fpu_free(
+                               struct x86_fpsave_state * fps);
+extern kern_return_t   fpu_set_fxstate(
+                               thread_t        thr_act,
+                               thread_state_t  state);
+extern kern_return_t   fpu_get_fxstate(
+                               thread_t        thr_act,
+                               thread_state_t  state);
+extern void            fpu_dup_fxstate(
+                               thread_t        parent,
+                               thread_t        child);
+extern void            fpnoextflt(void);
+extern void            fpextovrflt(void);
+extern void            fpexterrflt(void);
+extern void            fpSSEexterrflt(void);
+extern void            fpflush(thread_t);
+extern void            fp_setvalid(boolean_t);
+extern void            fxsave64(struct x86_fx_save *);
+extern void            fxrstor64(struct x86_fx_save *);

 
 /*
  * FPU instructions.
 
 /*
  * FPU instructions.


@@ -77,9 +104,8 @@
 #define        fldcw(control) \
        __asm__ volatile("fldcw %0" : : "m" (*(unsigned short *) &(control)) )
 
 #define        fldcw(control) \
        __asm__ volatile("fldcw %0" : : "m" (*(unsigned short *) &(control)) )
 

-extern unsigned short          fnstsw(void);
-
-extern __inline__ unsigned short fnstsw(void)
+static inline unsigned short
+fnstsw(void)

 {
        unsigned short status;
        __asm__ volatile("fnstsw %0" : "=ma" (status));
 {
        unsigned short status;
        __asm__ volatile("fnstsw %0" : "=ma" (status));


@@ -103,58 +129,46 @@ extern __inline__ unsigned short fnstsw(void)
 
 #define FXSAFE() (fp_kind == FP_FXSR)
 
 
 #define FXSAFE() (fp_kind == FP_FXSR)
 

-#define        fpu_load_context(pcb)
+
+static inline void clear_fpu(void)
+{
+       set_ts();
+}

 
 /*
  * Save thread`s FPU context.
 
 /*
  * Save thread`s FPU context.

- * If only one CPU, we just set the task-switched bit,
- * to keep the new thread from using the coprocessor.
- * If multiple CPUs, we save the entire state.
- * NOTE: in order to provide backwards compatible support in the kernel. When saving SSE2 state, we also save the
- * FP state in it's old location. Otherwise fpu_get_state() and fpu_set_state() will stop working

  */
  */

-#define        fpu_save_context(thread) \
-    { \
-       register struct i386_fpsave_state *ifps; \
-       ifps = (thread)->machine.pcb->ims.ifps; \
-       if (ifps != 0 && !ifps->fp_valid) { \
-           /* registers are in FPU - save to memory */ \
-           ifps->fp_valid = TRUE; \
-            ifps->fp_save_flavor = FP_387; \
-            if (FXSAFE()) { \
-               fxsave(&ifps->fx_save_state); \
-                ifps->fp_save_flavor = FP_FXSR; \
-           } \
-            fnsave(&ifps->fp_save_state); \
-       } \
-       set_ts(); \
-    }
-           
-
-
-extern int     fp_kind;

 
 

-extern void            init_fpu(void);
-extern void            fpu_module_init(void);
-extern void            fpu_free(
-                               struct i386_fpsave_state        * fps);
-extern kern_return_t   fpu_set_state(
-                               thread_t                        thr_act,
-                               struct i386_float_state         * st);
-extern kern_return_t   fpu_get_state(
-                               thread_t                        thr_act,
-                               struct i386_float_state         * st);
-extern kern_return_t   fpu_set_fxstate(
-                               thread_t                        thr_act,
-                               struct i386_float_state         * st);
-extern kern_return_t   fpu_get_fxstate(
-                               thread_t                        thr_act,
-                               struct i386_float_state         * st);
-extern void            fpnoextflt(void);
-extern void            fpextovrflt(void);
-extern void            fpexterrflt(void);
-extern void            fp_state_alloc(void);
-extern void            fpintr(void);
-extern void            fpflush(thread_t);
+static inline void fpu_save_context(thread_t thread)
+{
+       struct x86_fpsave_state *ifps;
+
+       assert(ml_get_interrupts_enabled() == FALSE);
+       ifps = (thread)->machine.pcb->ifps;
+       if (ifps != 0 && !ifps->fp_valid) {
+               /* Clear CR0.TS in preparation for the FP context save. In
+                * theory, this shouldn't be necessary since a live FPU should
+                * indicate that TS is clear. However, various routines
+                * (such as sendsig & sigreturn) manipulate TS directly.
+                */
+               clear_ts();
+               /* registers are in FPU - save to memory */
+               ifps->fp_valid = TRUE;
+
+               if (!thread_is_64bit(thread) || is_saved_state32(thread->machine.pcb->iss)) {
+                       /* save the compatibility/legacy mode XMM+x87 state */
+                       fxsave(&ifps->fx_save_state);
+                       ifps->fp_save_layout = FXSAVE32;
+               }
+               else {
+                       /* Execute a brief jump to 64-bit mode to save the 64
+                        * bit state
+                        */
+                       fxsave64(&ifps->fx_save_state);
+                       ifps->fp_save_layout = FXSAVE64;
+               }
+       }
+       set_ts();
+}

 
 #endif /* _I386_FPU_H_ */
 
 #endif /* _I386_FPU_H_ */