-uint32_t cpuid_feature; /* XXX obsolescent for compat */
-
-/*
- * We only identify Intel CPUs here. Adding support
- * for others would be straightforward.
- */
-static void set_cpu_generic(i386_cpu_info_t *);
-static void set_cpu_intel(i386_cpu_info_t *);
-static void set_cpu_amd(i386_cpu_info_t *);
-static void set_cpu_nsc(i386_cpu_info_t *);
-static void set_cpu_unknown(i386_cpu_info_t *);
-
-struct {
- const char *vendor;
- void (* func)(i386_cpu_info_t *);
-} cpu_vendors[] = {
- {CPUID_VID_INTEL, set_cpu_intel},
- {CPUID_VID_AMD, set_cpu_amd},
- {CPUID_VID_NSC, set_cpu_nsc},
- {0, set_cpu_unknown}
-};
-
-void
-cpuid_get_info(i386_cpu_info_t *info_p)
-{
- uint32_t cpuid_result[4];
- int i;
-
- bzero((void *)info_p, sizeof(i386_cpu_info_t));
-
- /* do cpuid 0 to get vendor */
- do_cpuid(0, cpuid_result);
- cpuid_maxcpuid = cpuid_result[eax];
- bcopy((char *)&cpuid_result[ebx], &info_p->cpuid_vendor[0], 4); /* ug */
- bcopy((char *)&cpuid_result[ecx], &info_p->cpuid_vendor[8], 4);
- bcopy((char *)&cpuid_result[edx], &info_p->cpuid_vendor[4], 4);
- info_p->cpuid_vendor[12] = 0;
-
- /* look up vendor */
- for (i = 0; ; i++) {
- if ((cpu_vendors[i].vendor == 0) ||
- (!strcmp(cpu_vendors[i].vendor, info_p->cpuid_vendor))) {
- cpu_vendors[i].func(info_p);
- break;
- }
- }
-}
-
-/*
- * Cache descriptor table. Each row has the form:
- * (descriptor_value, cache, size, linesize,
- * description)
- * Note: the CACHE_DESC macro does not expand description text in the kernel.
- */
-static cpuid_cache_desc_t cpuid_cache_desc_tab[] = {
-CACHE_DESC(CPUID_CACHE_ITLB_4K, Lnone, 0, 0, \
- "Instruction TLB, 4K, pages 4-way set associative, 64 entries"),
-CACHE_DESC(CPUID_CACHE_ITLB_4M, Lnone, 0, 0, \
- "Instruction TLB, 4M, pages 4-way set associative, 2 entries"),
-CACHE_DESC(CPUID_CACHE_DTLB_4K, Lnone, 0, 0, \
- "Data TLB, 4K pages, 4-way set associative, 64 entries"),
-CACHE_DESC(CPUID_CACHE_DTLB_4M, Lnone, 0, 0, \
- "Data TLB, 4M pages, 4-way set associative, 8 entries"),
-CACHE_DESC(CPUID_CACHE_ITLB_64, Lnone, 0, 0, \
- "Instruction TLB, 4K and 2M or 4M pages, 64 entries"),
-CACHE_DESC(CPUID_CACHE_ITLB_128, Lnone, 0, 0, \
- "Instruction TLB, 4K and 2M or 4M pages, 128 entries"),
-CACHE_DESC(CPUID_CACHE_ITLB_256, Lnone, 0, 0, \
- "Instruction TLB, 4K and 2M or 4M pages, 256 entries"),
-CACHE_DESC(CPUID_CACHE_DTLB_64, Lnone, 0, 0, \
- "Data TLB, 4K and 4M pages, 64 entries"),
-CACHE_DESC(CPUID_CACHE_DTLB_128, Lnone, 0, 0, \
- "Data TLB, 4K and 4M pages, 128 entries"),
-CACHE_DESC(CPUID_CACHE_DTLB_256, Lnone, 0, 0, \
- "Data TLB, 4K and 4M pages, 256 entries"),
-CACHE_DESC(CPUID_CACHE_ITLB_128_4, Lnone, 0, 0, \
- "Instruction TLB, 4K pages, 4-way set associative, 128 entries"),
-CACHE_DESC(CPUID_CACHE_DTLB_128_4, Lnone, 0, 0, \
- "Data TLB, 4K pages, 4-way set associative, 128 entries"),
-CACHE_DESC(CPUID_CACHE_ICACHE_8K, L1I, 8*1024, 32, \
- "Instruction L1 cache, 8K, 4-way set associative, 32byte line size"),
-CACHE_DESC(CPUID_CACHE_DCACHE_8K, L1D, 8*1024, 32, \
- "Data L1 cache, 8K, 2-way set associative, 32byte line size"),
-CACHE_DESC(CPUID_CACHE_ICACHE_16K, L1I, 16*1024, 32, \
- "Instruction L1 cache, 16K, 4-way set associative, 32byte line size"),
-CACHE_DESC(CPUID_CACHE_DCACHE_16K, L1D, 16*1024, 32, \
- "Data L1 cache, 16K, 4-way set associative, 32byte line size"),
-CACHE_DESC(CPUID_CACHE_DCACHE_8K_64, L1D, 8*1024, 64, \
- "Data L1 cache, 8K, 4-way set associative, 64byte line size"),
-CACHE_DESC(CPUID_CACHE_DCACHE_16K_64, L1D, 16*1024, 64, \
- "Data L1 cache, 16K, 4-way set associative, 64byte line size"),
-CACHE_DESC(CPUID_CACHE_DCACHE_32K_64, L1D, 32*1024, 64, \
- "Data L1 cache, 32K, 4-way set associative, 64byte line size"),
-CACHE_DESC(CPUID_CACHE_DCACHE_32K, L1D, 32*1024, 64, \
- "Data L1 cache, 32K, 8-way set assocative, 64byte line size"),
-CACHE_DESC(CPUID_CACHE_ICACHE_32K, L1I, 32*1024, 64, \
- "Instruction L1 cache, 32K, 8-way set associative, 64byte line size"),
-CACHE_DESC(CPUID_CACHE_DCACHE_16K_8, L1D, 16*1024, 64, \
- "Data L1 cache, 16K, 8-way set associative, 64byte line size"),
-CACHE_DESC(CPUID_CACHE_TRACE_12K, L1I, 12*1024, 64, \
- "Trace cache, 12K-uop, 8-way set associative"),
-CACHE_DESC(CPUID_CACHE_TRACE_16K, L1I, 16*1024, 64, \
- "Trace cache, 16K-uop, 8-way set associative"),
-CACHE_DESC(CPUID_CACHE_TRACE_32K, L1I, 32*1024, 64, \
- "Trace cache, 32K-uop, 8-way set associative"),
-CACHE_DESC(CPUID_CACHE_UCACHE_128K, L2U, 128*1024, 32, \
- "Unified L2 cache, 128K, 4-way set associative, 32byte line size"),
-CACHE_DESC(CPUID_CACHE_UCACHE_256K, L2U, 128*1024, 32, \
- "Unified L2 cache, 256K, 4-way set associative, 32byte line size"),
-CACHE_DESC(CPUID_CACHE_UCACHE_512K, L2U, 512*1024, 32, \
- "Unified L2 cache, 512K, 4-way set associative, 32byte line size"),
-CACHE_DESC(CPUID_CACHE_UCACHE_1M, L2U, 1*1024*1024, 32, \
- "Unified L2 cache, 1M, 4-way set associative, 32byte line size"),
-CACHE_DESC(CPUID_CACHE_UCACHE_2M, L2U, 2*1024*1024, 32, \
- "Unified L2 cache, 2M, 4-way set associative, 32byte line size"),
-CACHE_DESC(CPUID_CACHE_UCACHE_4M, L2U, 4*1024*1024, 64, \
- "Unified L2 cache, 4M, 16-way set associative, 64byte line size"),
-CACHE_DESC(CPUID_CACHE_UCACHE_128K_64, L2U, 128*1024, 64, \
- "Unified L2 cache, 128K, 8-way set associative, 64byte line size"),
-CACHE_DESC(CPUID_CACHE_UCACHE_256K_64, L2U, 256*1024, 64, \
- "Unified L2 cache, 256K, 8-way set associative, 64byte line size"),
-CACHE_DESC(CPUID_CACHE_UCACHE_512K_64, L2U, 512*1024, 64, \
- "Unified L2 cache, 512K, 8-way set associative, 64byte line size"),
-CACHE_DESC(CPUID_CACHE_UCACHE_1M_64, L2U, 1*1024*1024, 64, \
- "Unified L2 cache, 1M, 8-way set associative, 64byte line size"),
-CACHE_DESC(CPUID_CACHE_UCACHE_256K_32, L2U, 256*1024, 32, \
- "Unified L2 cache, 256K, 8-way set associative, 32byte line size"),
-CACHE_DESC(CPUID_CACHE_UCACHE_512K_32, L2U, 512*1024, 32, \
- "Unified L2 cache, 512K, 8-way set associative, 32byte line size"),
-CACHE_DESC(CPUID_CACHE_UCACHE_1M_32, L2U, 1*1024*1024, 32, \
- "Unified L2 cache, 1M, 8-way set associative, 32byte line size"),
-CACHE_DESC(CPUID_CACHE_UCACHE_2M_32, L2U, 2*1024*1024, 32, \
- "Unified L2 cache, 2M, 8-way set associative, 32byte line size"),
-CACHE_DESC(CPUID_CACHE_UCACHE_1M_64_4, L2U, 1*1024*1024, 64, \
- "Unified L2 cache, 1M, 4-way set associative, 64byte line size"),
-CACHE_DESC(CPUID_CACHE_UCACHE_2M_64, L2U, 2*1024*1024, 64, \
- "Unified L2 cache, 2M, 8-way set associative, 64byte line size"),
-CACHE_DESC(CPUID_CACHE_UCACHE_512K_64_2,L2U, 512*1024, 64, \
- "Unified L2 cache, 512K, 2-way set associative, 64byte line size"),
-CACHE_DESC(CPUID_CACHE_UCACHE_512K_64_4,L2U, 512*1024, 64, \
- "Unified L2 cache, 512K, 4-way set associative, 64byte line size"),
-CACHE_DESC(CPUID_CACHE_UCACHE_1M_64_8, L2U, 1*1024*1024, 64, \
- "Unified L2 cache, 1M, 8-way set associative, 64byte line size"),
-CACHE_DESC(CPUID_CACHE_UCACHE_128K_S4, L2U, 128*1024, 64, \
- "Unified L2 sectored cache, 128K, 4-way set associative, 64byte line size"),
-CACHE_DESC(CPUID_CACHE_UCACHE_128K_S2, L2U, 128*1024, 64, \
- "Unified L2 sectored cache, 128K, 2-way set associative, 64byte line size"),
-CACHE_DESC(CPUID_CACHE_UCACHE_256K_S4, L2U, 256*1024, 64, \
- "Unified L2 sectored cache, 256K, 4-way set associative, 64byte line size"),
-CACHE_DESC(CPUID_CACHE_L3CACHE_512K, L3U, 512*1024, 64, \
- "Unified L3 cache, 512K, 4-way set associative, 64byte line size"),
-CACHE_DESC(CPUID_CACHE_L3CACHE_1M, L3U, 1*1024*1024, 64, \
- "Unified L3 cache, 1M, 8-way set associative, 64byte line size"),
-CACHE_DESC(CPUID_CACHE_L3CACHE_2M, L3U, 2*1024*1024, 64, \
- "Unified L3 cache, 2M, 8-way set associative, 64byte line size"),
-CACHE_DESC(CPUID_CACHE_L3CACHE_4M, L3U, 4*1024*1024, 64, \
- "Unified L3 cache, 4M, 8-way set associative, 64byte line size"),
-CACHE_DESC(CPUID_CACHE_PREFETCH_64, Lnone, 0, 0, \
- "64-Byte Prefetching"),
-CACHE_DESC(CPUID_CACHE_PREFETCH_128, Lnone, 0, 0, \
- "128-Byte Prefetching"),
-CACHE_DESC(CPUID_CACHE_NOCACHE, Lnone, 0, 0, \
- "No L2 cache or, if valid L2 cache, no L3 cache"),
-CACHE_DESC(CPUID_CACHE_NULL, Lnone, 0, 0, \
- (char *)0),
-};
-
-static const char * get_intel_model_string( i386_cpu_info_t * info_p, cpu_type_t* type, cpu_subtype_t* subtype)
-{
- *type = CPU_TYPE_X86;
- *subtype = CPU_SUBTYPE_X86_ARCH1;
-
- /* check for brand id string */
- switch(info_p->cpuid_brand) {
- case CPUID_BRAND_UNSUPPORTED:
- /* brand ID not supported; use alternate method. */
- switch(info_p->cpuid_family) {
- case CPUID_FAMILY_486:
- return "Intel 486";
- case CPUID_FAMILY_586:
- return "Intel Pentium";
- case CPUID_FAMILY_686:
- switch(info_p->cpuid_model) {
- case CPUID_MODEL_P6:
- return "Intel Pentium Pro";
- case CPUID_MODEL_PII:
- return "Intel Pentium II";
- case CPUID_MODEL_P65:
- case CPUID_MODEL_P66:
- return "Intel Celeron";
- case CPUID_MODEL_P67:
- case CPUID_MODEL_P68:
- case CPUID_MODEL_P6A:
- case CPUID_MODEL_P6B:
- return "Intel Pentium III";
- case CPUID_MODEL_PM9:
- case CPUID_MODEL_PMD:
- return "Intel Pentium M";
- default:
- return "Unknown Intel P6 Family";
- }
- case CPUID_FAMILY_EXTENDED:
- switch (info_p->cpuid_extfamily) {
- case CPUID_EXTFAMILY_PENTIUM4:
- *subtype = CPU_SUBTYPE_PENTIUM_4;
- return "Intel Pentium 4";
- default:
- return "Unknown Intel Extended Family";
- }
- default:
- return "Unknown Intel Family";
- }
- break;
- case CPUID_BRAND_CELERON_1:
- case CPUID_BRAND_CELERON_A:
- case CPUID_BRAND_CELERON_14:
- return "Intel Celeron";
- case CPUID_BRAND_PENTIUM_III_2:
- case CPUID_BRAND_PENTIUM_III_4:
- return "Pentium III";
- case CPUID_BRAND_PIII_XEON:
- if (info_p->cpuid_signature == 0x6B1) {
- return "Intel Celeron";
- } else {
- return "Intel Pentium III Xeon";
- }
- case CPUID_BRAND_PENTIUM_III_M:
- return "Mobile Intel Pentium III-M";
- case CPUID_BRAND_M_CELERON_7:
- case CPUID_BRAND_M_CELERON_F:
- case CPUID_BRAND_M_CELERON_13:
- case CPUID_BRAND_M_CELERON_17:
- return "Mobile Intel Celeron";
- case CPUID_BRAND_PENTIUM4_8:
- case CPUID_BRAND_PENTIUM4_9:
- *subtype = CPU_SUBTYPE_PENTIUM_4;
- return "Intel Pentium 4";
- case CPUID_BRAND_XEON:
- return "Intel Xeon";
- case CPUID_BRAND_XEON_MP:
- return "Intel Xeon MP";
- case CPUID_BRAND_PENTIUM4_M:
- if (info_p->cpuid_signature == 0xF13) {
- return "Intel Xeon";
- } else {
- *subtype = CPU_SUBTYPE_PENTIUM_4;
- return "Mobile Intel Pentium 4";
- }
- case CPUID_BRAND_CELERON_M:
- return "Intel Celeron M";
- case CPUID_BRAND_PENTIUM_M:
- return "Intel Pentium M";
- case CPUID_BRAND_MOBILE_15:
- case CPUID_BRAND_MOBILE_17:
- return "Mobile Intel";
- }
- return "Unknown Intel";
-}
-
-static void set_intel_cache_info( i386_cpu_info_t * info_p )
projects / apple / xnu.git / blobdiff