/*
- * Copyright (c) 2000-2005 Apple Computer, Inc. All rights reserved.
+ * Copyright (c) 2000-2009 Apple Inc. All rights reserved.
*
- * @APPLE_LICENSE_OSREFERENCE_HEADER_START@
+ * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
*
- * This file contains Original Code and/or Modifications of Original Code
- * as defined in and that are subject to the Apple Public Source License
- * Version 2.0 (the 'License'). You may not use this file except in
- * compliance with the License. The rights granted to you under the
- * License may not be used to create, or enable the creation or
- * redistribution of, unlawful or unlicensed copies of an Apple operating
- * system, or to circumvent, violate, or enable the circumvention or
- * violation of, any terms of an Apple operating system software license
- * agreement.
- *
- * Please obtain a copy of the License at
- * http://www.opensource.apple.com/apsl/ and read it before using this
- * file.
- *
- * The Original Code and all software distributed under the License are
- * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
- * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
- * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
- * Please see the License for the specific language governing rights and
+ * This file contains Original Code and/or Modifications of Original Code
+ * as defined in and that are subject to the Apple Public Source License
+ * Version 2.0 (the 'License'). You may not use this file except in
+ * compliance with the License. The rights granted to you under the License
+ * may not be used to create, or enable the creation or redistribution of,
+ * unlawful or unlicensed copies of an Apple operating system, or to
+ * circumvent, violate, or enable the circumvention or violation of, any
+ * terms of an Apple operating system software license agreement.
+ *
+ * Please obtain a copy of the License at
+ * http://www.opensource.apple.com/apsl/ and read it before using this file.
+ *
+ * The Original Code and all software distributed under the License are
+ * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
+ * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
+ * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
+ * Please see the License for the specific language governing rights and
* limitations under the License.
- *
- * @APPLE_LICENSE_OSREFERENCE_HEADER_END@
+ *
+ * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
*/
+
#include <i386/machine_routines.h>
#include <i386/io_map_entries.h>
#include <i386/cpuid.h>
#include <i386/fpu.h>
+#include <mach/processor.h>
#include <kern/processor.h>
#include <kern/machine.h>
#include <kern/cpu_data.h>
#include <kern/cpu_number.h>
#include <kern/thread.h>
-#include <i386/cpu_data.h>
#include <i386/machine_cpu.h>
-#include <i386/mp.h>
+#include <i386/lapic.h>
#include <i386/mp_events.h>
-#include <i386/cpu_threads.h>
-#include <i386/pmap.h>
-#include <i386/misc_protos.h>
#include <i386/pmCPU.h>
+#include <i386/tsc.h>
+#include <i386/cpu_threads.h>
#include <i386/proc_reg.h>
#include <mach/vm_param.h>
+#include <i386/pmap.h>
+#include <i386/misc_protos.h>
#if MACH_KDB
-#include <i386/db_machdep.h>
+#include <machine/db_machdep.h>
#include <ddb/db_aout.h>
#include <ddb/db_access.h>
#include <ddb/db_sym.h>
#include <ddb/db_expr.h>
#endif
-#define MIN(a,b) ((a)<(b)? (a) : (b))
-
#if DEBUG
#define DBG(x...) kprintf("DBG: " x)
#else
#define DBG(x...)
#endif
-extern void initialize_screen(Boot_Video *, unsigned int);
-extern thread_t Shutdown_context(thread_t thread, void (*doshutdown)(processor_t),processor_t processor);
+
extern void wakeup(void *);
-extern unsigned KernelRelocOffset;
static int max_cpus_initialized = 0;
-unsigned int LockTimeOut = 12500000;
-unsigned int MutexSpin = 0;
+unsigned int LockTimeOut;
+unsigned int LockTimeOutTSC;
+unsigned int MutexSpin;
+uint64_t LastDebuggerEntryAllowance;
#define MAX_CPUS_SET 0x1
#define MAX_CPUS_WAIT 0x2
}
-vm_offset_t
-ml_boot_ptovirt(
- vm_offset_t paddr)
-{
- return (vm_offset_t)((paddr-KernelRelocOffset) | LINEAR_KERNEL_ADDRESS);
-}
-
vm_offset_t
ml_static_ptovirt(
vm_offset_t paddr)
{
- return (vm_offset_t)((unsigned) paddr | LINEAR_KERNEL_ADDRESS);
+#if defined(__x86_64__)
+ return (vm_offset_t)(((unsigned long) paddr) | VM_MIN_KERNEL_ADDRESS);
+#else
+ return (vm_offset_t)((paddr) | LINEAR_KERNEL_ADDRESS);
+#endif
}
vm_offset_t vaddr,
vm_size_t size)
{
- vm_offset_t vaddr_cur;
+ addr64_t vaddr_cur;
ppnum_t ppn;
-// if (vaddr < VM_MIN_KERNEL_ADDRESS) return;
+ assert(vaddr >= VM_MIN_KERNEL_ADDRESS);
assert((vaddr & (PAGE_SIZE-1)) == 0); /* must be page aligned */
+
for (vaddr_cur = vaddr;
- vaddr_cur < round_page_32(vaddr+size);
+ vaddr_cur < round_page_64(vaddr+size);
vaddr_cur += PAGE_SIZE) {
- ppn = pmap_find_phys(kernel_pmap, (addr64_t)vaddr_cur);
+ ppn = pmap_find_phys(kernel_pmap, vaddr_cur);
if (ppn != (vm_offset_t)NULL) {
- pmap_remove(kernel_pmap, (addr64_t)vaddr_cur, (addr64_t)(vaddr_cur+PAGE_SIZE));
+ kernel_pmap->stats.resident_count++;
+ if (kernel_pmap->stats.resident_count >
+ kernel_pmap->stats.resident_max) {
+ kernel_pmap->stats.resident_max =
+ kernel_pmap->stats.resident_count;
+ }
+ pmap_remove(kernel_pmap, vaddr_cur, vaddr_cur+PAGE_SIZE);
vm_page_create(ppn,(ppn+1));
vm_page_wire_count--;
}
vm_offset_t ml_vtophys(
vm_offset_t vaddr)
{
- return kvtophys(vaddr);
+ return (vm_offset_t)kvtophys(vaddr);
+}
+
+/*
+ * Routine: ml_nofault_copy
+ * Function: Perform a physical mode copy if the source and
+ * destination have valid translations in the kernel pmap.
+ * If translations are present, they are assumed to
+ * be wired; i.e. no attempt is made to guarantee that the
+ * translations obtained remained valid for
+ * the duration of the copy process.
+ */
+
+vm_size_t ml_nofault_copy(
+ vm_offset_t virtsrc, vm_offset_t virtdst, vm_size_t size)
+{
+ addr64_t cur_phys_dst, cur_phys_src;
+ uint32_t count, nbytes = 0;
+
+ while (size > 0) {
+ if (!(cur_phys_src = kvtophys(virtsrc)))
+ break;
+ if (!(cur_phys_dst = kvtophys(virtdst)))
+ break;
+ if (!pmap_valid_page(i386_btop(cur_phys_dst)) || !pmap_valid_page(i386_btop(cur_phys_src)))
+ break;
+ count = (uint32_t)(PAGE_SIZE - (cur_phys_src & PAGE_MASK));
+ if (count > (PAGE_SIZE - (cur_phys_dst & PAGE_MASK)))
+ count = (uint32_t)(PAGE_SIZE - (cur_phys_dst & PAGE_MASK));
+ if (count > size)
+ count = (uint32_t)size;
+
+ bcopy_phys(cur_phys_src, cur_phys_dst, count);
+
+ nbytes += count;
+ virtsrc += count;
+ virtdst += count;
+ size -= count;
+ }
+
+ return nbytes;
}
/* Interrupt handling */
(void) ml_set_interrupts_enabled(TRUE);
}
+
+
/* Get Interrupts Enabled */
boolean_t ml_get_interrupts_enabled(void)
{
unsigned long flags;
- __asm__ volatile("pushf; popl %0" : "=r" (flags));
+ __asm__ volatile("pushf; pop %0" : "=r" (flags));
return (flags & EFL_IF) != 0;
}
{
unsigned long flags;
- __asm__ volatile("pushf; popl %0" : "=r" (flags));
+ __asm__ volatile("pushf; pop %0" : "=r" (flags));
if (enable) {
ast_t *myast;
void ml_thread_policy(
thread_t thread,
- unsigned policy_id,
+__unused unsigned policy_id,
unsigned policy_info)
{
- if (policy_id == MACHINE_GROUP)
- thread_bind(thread, master_processor);
-
if (policy_info & MACHINE_NETWORK_WORKLOOP) {
spl_t s = splsched();
(void) ml_set_interrupts_enabled(current_state);
- initialize_screen(0, kPEAcquireScreen);
+ initialize_screen(NULL, kPEAcquireScreen);
}
-void
-machine_idle(void)
-{
- cpu_core_t *my_core = cpu_core();
- int others_active;
-
- /*
- * We halt this cpu thread
- * unless kernel param idlehalt is false and no other thread
- * in the same core is active - if so, don't halt so that this
- * core doesn't go into a low-power mode.
- * For 4/4, we set a null "active cr3" while idle.
- */
- others_active = !atomic_decl_and_test(
- (long *) &my_core->active_threads, 1);
- if (idlehalt || others_active) {
- DBGLOG(cpu_handle, cpu_number(), MP_IDLE);
- MARK_CPU_IDLE(cpu_number());
- machine_idle_cstate();
- MARK_CPU_ACTIVE(cpu_number());
- DBGLOG(cpu_handle, cpu_number(), MP_UNIDLE);
- } else {
- __asm__ volatile("sti");
- }
- atomic_incl((long *) &my_core->active_threads, 1);
-}
-
void
machine_signal_idle(
processor_t processor)
{
- cpu_interrupt(PROCESSOR_DATA(processor, slot_num));
-}
-
-thread_t
-machine_processor_shutdown(
- thread_t thread,
- void (*doshutdown)(processor_t),
- processor_t processor)
-{
- fpu_save_context(thread);
- return(Shutdown_context(thread, doshutdown, processor));
+ cpu_interrupt(processor->cpu_id);
}
-kern_return_t
-ml_processor_register(
- cpu_id_t cpu_id,
- uint32_t lapic_id,
- processor_t *processor_out,
- ipi_handler_t *ipi_handler,
- boolean_t boot_cpu)
+static kern_return_t
+register_cpu(
+ uint32_t lapic_id,
+ processor_t *processor_out,
+ boolean_t boot_cpu )
{
int target_cpu;
cpu_data_t *this_cpu_datap;
lapic_cpu_map(lapic_id, target_cpu);
- this_cpu_datap->cpu_id = cpu_id;
+ /* The cpu_id is not known at registration phase. Just do
+ * lapic_id for now
+ */
this_cpu_datap->cpu_phys_number = lapic_id;
this_cpu_datap->cpu_console_buf = console_cpu_alloc(boot_cpu);
goto failed;
if (!boot_cpu) {
- this_cpu_datap->cpu_core = cpu_thread_alloc(target_cpu);
+ cpu_thread_alloc(this_cpu_datap->cpu_number);
+ if (this_cpu_datap->lcpu.core == NULL)
+ goto failed;
+
+ pmCPUStateInit();
+#if NCOPY_WINDOWS > 0
this_cpu_datap->cpu_pmap = pmap_cpu_alloc(boot_cpu);
if (this_cpu_datap->cpu_pmap == NULL)
goto failed;
+#endif
this_cpu_datap->cpu_processor = cpu_processor_alloc(boot_cpu);
if (this_cpu_datap->cpu_processor == NULL)
goto failed;
- processor_init(this_cpu_datap->cpu_processor, target_cpu);
+ /*
+ * processor_init() deferred to topology start
+ * because "slot numbers" a.k.a. logical processor numbers
+ * are not yet finalized.
+ */
}
*processor_out = this_cpu_datap->cpu_processor;
- *ipi_handler = NULL;
return KERN_SUCCESS;
failed:
cpu_processor_free(this_cpu_datap->cpu_processor);
+#if NCOPY_WINDOWS > 0
pmap_cpu_free(this_cpu_datap->cpu_pmap);
+#endif
chudxnu_cpu_free(this_cpu_datap->cpu_chud);
console_cpu_free(this_cpu_datap->cpu_console_buf);
return KERN_FAILURE;
}
+
+kern_return_t
+ml_processor_register(
+ cpu_id_t cpu_id,
+ uint32_t lapic_id,
+ processor_t *processor_out,
+ boolean_t boot_cpu,
+ boolean_t start )
+{
+ static boolean_t done_topo_sort = FALSE;
+ static uint32_t num_registered = 0;
+
+ /* Register all CPUs first, and track max */
+ if( start == FALSE )
+ {
+ num_registered++;
+
+ DBG( "registering CPU lapic id %d\n", lapic_id );
+
+ return register_cpu( lapic_id, processor_out, boot_cpu );
+ }
+
+ /* Sort by topology before we start anything */
+ if( !done_topo_sort )
+ {
+ DBG( "about to start CPUs. %d registered\n", num_registered );
+
+ cpu_topology_sort( num_registered );
+ done_topo_sort = TRUE;
+ }
+
+ /* Assign the cpu ID */
+ uint32_t cpunum = -1;
+ cpu_data_t *this_cpu_datap = NULL;
+
+ /* find cpu num and pointer */
+ cpunum = ml_get_cpuid( lapic_id );
+
+ if( cpunum == 0xFFFFFFFF ) /* never heard of it? */
+ panic( "trying to start invalid/unregistered CPU %d\n", lapic_id );
+
+ this_cpu_datap = cpu_datap(cpunum);
+
+ /* fix the CPU id */
+ this_cpu_datap->cpu_id = cpu_id;
+
+ /* output arg */
+ *processor_out = this_cpu_datap->cpu_processor;
+
+ /* OK, try and start this CPU */
+ return cpu_topology_start_cpu( cpunum );
+}
+
+
void
ml_cpu_get_info(ml_cpu_info_t *cpu_infop)
{
* Are we supporting MMX/SSE/SSE2/SSE3?
* As distinct from whether the cpu has these capabilities.
*/
- os_supports_sse = get_cr4() & CR4_XMM;
- if ((cpuid_features() & CPUID_FEATURE_MNI) && os_supports_sse)
+ os_supports_sse = !!(get_cr4() & CR4_XMM);
+ if ((cpuid_features() & CPUID_FEATURE_SSE4_2) && os_supports_sse)
+ cpu_infop->vector_unit = 8;
+ else if ((cpuid_features() & CPUID_FEATURE_SSE4_1) && os_supports_sse)
+ cpu_infop->vector_unit = 7;
+ else if ((cpuid_features() & CPUID_FEATURE_SSSE3) && os_supports_sse)
cpu_infop->vector_unit = 6;
else if ((cpuid_features() & CPUID_FEATURE_SSE3) && os_supports_sse)
cpu_infop->vector_unit = 5;
if (max_cpus_initialized != MAX_CPUS_SET) {
if (max_cpus > 0 && max_cpus <= MAX_CPUS) {
/*
- * Note: max_cpus is the number of enable processors
+ * Note: max_cpus is the number of enabled processors
* that ACPI found; max_ncpus is the maximum number
* that the kernel supports or that the "cpus="
* boot-arg has set. Here we take int minimum.
*/
- machine_info.max_cpus = MIN(max_cpus, max_ncpus);
+ machine_info.max_cpus = (integer_t)MIN(max_cpus, max_ncpus);
}
if (max_cpus_initialized == MAX_CPUS_WAIT)
wakeup((event_t)&max_cpus_initialized);
ml_init_lock_timeout(void)
{
uint64_t abstime;
- uint32_t mtxspin;
-
- /*
- * XXX As currently implemented for x86, LockTimeOut should be a
- * cycle (tsc) count not an absolute time (nanoseconds) -
- * but it's of the right order.
- */
- nanoseconds_to_absolutetime(NSEC_PER_SEC>>2, &abstime);
- LockTimeOut = (unsigned int)abstime;
-
- if (PE_parse_boot_arg("mtxspin", &mtxspin)) {
+ uint32_t mtxspin;
+ uint64_t default_timeout_ns = NSEC_PER_SEC>>2;
+ uint32_t slto;
+
+ if (PE_parse_boot_argn("slto_us", &slto, sizeof (slto)))
+ default_timeout_ns = slto * NSEC_PER_USEC;
+
+ /* LockTimeOut is absolutetime, LockTimeOutTSC is in TSC ticks */
+ nanoseconds_to_absolutetime(default_timeout_ns, &abstime);
+ LockTimeOut = (uint32_t) abstime;
+ LockTimeOutTSC = (uint32_t) tmrCvt(abstime, tscFCvtn2t);
+
+ if (PE_parse_boot_argn("mtxspin", &mtxspin, sizeof (mtxspin))) {
if (mtxspin > USEC_PER_SEC>>4)
mtxspin = USEC_PER_SEC>>4;
nanoseconds_to_absolutetime(mtxspin*NSEC_PER_USEC, &abstime);
nanoseconds_to_absolutetime(10*NSEC_PER_USEC, &abstime);
}
MutexSpin = (unsigned int)abstime;
+
+ nanoseconds_to_absolutetime(2 * NSEC_PER_SEC, &LastDebuggerEntryAllowance);
}
/*
return;
}
-/* Stubs for pc tracing mechanism */
-
-int *pc_trace_buf;
-int pc_trace_cnt = 0;
-
-int
-set_be_bit(void)
-{
- return(0);
-}
-
-int
-clr_be_bit(void)
-{
- return(0);
-}
-
-int
-be_tracing(void)
-{
- return(0);
-}
-
/*
* The following are required for parts of the kernel
* that cannot resolve these functions as inlines:
return(current_thread_fast());
}
-/*
- * Set the worst-case time for the C4 to C2 transition.
- * The maxdelay parameter is in nanoseconds.
- */
-
-void
-ml_set_maxsnoop(uint32_t maxdelay)
-{
- C4C2SnoopDelay = maxdelay; /* Set the transition time */
- machine_nap_policy(); /* Adjust the current nap state */
-}
-
-
-/*
- * Get the worst-case time for the C4 to C2 transition. Returns nanoseconds.
- */
-
-unsigned
-ml_get_maxsnoop(void)
-{
- return C4C2SnoopDelay; /* Set the transition time */
-}
-
-
-uint32_t
-ml_get_maxbusdelay(void)
-{
- return maxBusDelay;
-}
-
-/*
- * Set the maximum delay time allowed for snoop on the bus.
- *
- * Note that this value will be compared to the amount of time that it takes
- * to transition from a non-snooping power state (C4) to a snooping state (C2).
- * If maxBusDelay is less than C4C2SnoopDelay,
- * we will not enter the lowest power state.
- */
-
-void
-ml_set_maxbusdelay(uint32_t mdelay)
-{
- maxBusDelay = mdelay; /* Set the delay */
- machine_nap_policy(); /* Adjust the current nap state */
-}
-
boolean_t ml_is64bit(void) {
current_cpu_datap()->cpu_ldt == KERNEL_LDT)
return;
+#if defined(__i386__)
/*
* If 64bit this requires a mode switch (and back).
*/
ml_64bit_lldt(selector);
else
lldt(selector);
- current_cpu_datap()->cpu_ldt = selector;
+#else
+ lldt(selector);
+#endif
+ current_cpu_datap()->cpu_ldt = selector;
}
void ml_fp_setvalid(boolean_t value)
fp_setvalid(value);
}
+uint64_t ml_cpu_int_event_time(void)
+{
+ return current_cpu_datap()->cpu_int_event_time;
+}
+
+vm_offset_t ml_stack_remaining(void)
+{
+ uintptr_t local = (uintptr_t) &local;
+
+ if (ml_at_interrupt_context() != 0) {
+ return (local - (current_cpu_datap()->cpu_int_stack_top - INTSTACK_SIZE));
+ } else {
+ return (local - current_thread()->kernel_stack);
+ }
+}
+
#if MACH_KDB
/*
projects / apple / xnu.git / blobdiff