xnu-4903.241.1.tar.gz

[apple/xnu.git] / osfmk / i386 / machine_check.h

diff --git a/osfmk/i386/machine_check.h b/osfmk/i386/machine_check.h
index 233e78e2c9929b7907c9e1a95561ca11deeb2f85..138122596a596e27a43dbf4d151b34999b99b8e5 100644 (file)
--- a/osfmk/i386/machine_check.h
+++ b/osfmk/i386/machine_check.h
@@ -29,6 +29,10 @@
 #ifndef _I386_MACHINE_CHECK_H_
 #define _I386_MACHINE_CHECK_H_
 
 #ifndef _I386_MACHINE_CHECK_H_
 #define _I386_MACHINE_CHECK_H_
 

+#include <stdint.h>
+
+#include <i386/cpu_data.h>
+

 /*
  * This header defines the machine check architecture for Pentium4 and Xeon.
  */
 /*
  * This header defines the machine check architecture for Pentium4 and Xeon.
  */


@@ -49,10 +53,12 @@ typedef union {
        uint64_t        count                   :BITS(7,0);
        uint64_t        mcg_ctl_p               :BIT1(8);
        uint64_t        mcg_ext_p               :BIT1(9);
        uint64_t        count                   :BITS(7,0);
        uint64_t        mcg_ctl_p               :BIT1(8);
        uint64_t        mcg_ext_p               :BIT1(9);

-       uint64_t        mcg_reserved1           :BIT1(10);
+       uint64_t        mcg_ext_corr_err_p      :BIT1(10);

        uint64_t        mcg_tes_p               :BIT1(11);
        uint64_t        mcg_tes_p               :BIT1(11);

-       uint64_t        mcg_reserved2           :BITS(15,12);
+       uint64_t        mcg_ecms                :BIT1(12);
+       uint64_t        mcg_reserved2           :BITS(15,13);

        uint64_t        mcg_ext_cnt             :BITS(23,16);
        uint64_t        mcg_ext_cnt             :BITS(23,16);

+       uint64_t        mcg_ser_p               :BIT1(24);

      }         bits;
      uint64_t  u64;
 } ia32_mcg_cap_t;
      }         bits;
      uint64_t  u64;
 } ia32_mcg_cap_t;


@@ -128,6 +134,8 @@ typedef union {
        uint64_t        model_specific_error    :BITS(31,16);
        uint64_t        other_information       :BITS(52,32);
        uint64_t        threshold               :BITS(54,53);
        uint64_t        model_specific_error    :BITS(31,16);
        uint64_t        other_information       :BITS(52,32);
        uint64_t        threshold               :BITS(54,53);

+       uint64_t        ar                      :BIT1(55);
+       uint64_t        s                       :BIT1(56);

        uint64_t        pcc                     :BIT1(57);
        uint64_t        addrv                   :BIT1(58);
        uint64_t        miscv                   :BIT1(59);
        uint64_t        pcc                     :BIT1(57);
        uint64_t        addrv                   :BIT1(58);
        uint64_t        miscv                   :BIT1(59);


@@ -148,47 +156,11 @@ typedef union {
 typedef uint64_t       ia32_mci_addr_t;
 typedef uint64_t       ia32_mci_misc_t;
 
 typedef uint64_t       ia32_mci_addr_t;
 typedef uint64_t       ia32_mci_misc_t;
 

-#define IA32_MCG_EAX           (0x180)
-#define IA32_MCG_EBX           (0x181)
-#define IA32_MCG_ECX           (0x182)
-#define IA32_MCG_EDX           (0x183)
-#define IA32_MCG_ESI           (0x184)
-#define IA32_MCG_EDI           (0x185)
-#define IA32_MCG_EBP           (0x186)
-#define IA32_MCG_ESP           (0x187)
-#define IA32_MCG_EFLAGS                (0x188)
-#define IA32_MCG_EIP           (0x189)
-#define IA32_MCG_MISC          (0x18A)
-
-#define IA32_MCG_RAX           (0x180)
-#define IA32_MCG_RBX           (0x181)
-#define IA32_MCG_RCX           (0x182)
-#define IA32_MCG_RDX           (0x183)
-#define IA32_MCG_RSI           (0x184)
-#define IA32_MCG_RDI           (0x185)
-#define IA32_MCG_RBP           (0x186)
-#define IA32_MCG_RSP           (0x187)
-#define IA32_MCG_RFLAGS                (0x188)
-#define IA32_MCG_RIP           (0x189)
-#define IA32_MCG_MISC          (0x18A)
-#define IA32_MCG_RESERVED1     (0x18B)
-#define IA32_MCG_RESERVED2     (0x18C)
-#define IA32_MCG_RESERVED3     (0x18D)
-#define IA32_MCG_RESERVED4     (0x18E)
-#define IA32_MCG_RESERVED5     (0x18F)
-#define IA32_MCG_R8            (0x190)
-#define IA32_MCG_R9            (0x191)
-#define IA32_MCG_R10           (0x192)
-#define IA32_MCG_R11           (0x193)
-#define IA32_MCG_R12           (0x194)
-#define IA32_MCG_R13           (0x195)
-#define IA32_MCG_R14           (0x196)
-#define IA32_MCG_R15           (0x197)
-

 extern void            mca_cpu_alloc(cpu_data_t *cdp);
 extern void            mca_cpu_init(void);
 extern void            mca_dump(void);
 extern void            mca_check_save(void);
 extern void            mca_cpu_alloc(cpu_data_t *cdp);
 extern void            mca_cpu_init(void);
 extern void            mca_dump(void);
 extern void            mca_check_save(void);

+extern boolean_t       mca_is_cmci_present(void);

 
 #endif /* _I386_MACHINE_CHECK_H_ */
 #endif /* KERNEL_PRIVATE */
 
 #endif /* _I386_MACHINE_CHECK_H_ */
 #endif /* KERNEL_PRIVATE */