*
* @APPLE_LICENSE_HEADER_START@
*
- * Copyright (c) 1999-2003 Apple Computer, Inc. All Rights Reserved.
+ * The contents of this file constitute Original Code as defined in and
+ * are subject to the Apple Public Source License Version 1.1 (the
+ * "License"). You may not use this file except in compliance with the
+ * License. Please obtain a copy of the License at
+ * http://www.apple.com/publicsource and read it before using this file.
*
- * This file contains Original Code and/or Modifications of Original Code
- * as defined in and that are subject to the Apple Public Source License
- * Version 2.0 (the 'License'). You may not use this file except in
- * compliance with the License. Please obtain a copy of the License at
- * http://www.opensource.apple.com/apsl/ and read it before using this
- * file.
- *
- * The Original Code and all software distributed under the License are
- * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
+ * This Original Code and all software distributed under the License are
+ * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
* EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
- * Please see the License for the specific language governing rights and
- * limitations under the License.
+ * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the
+ * License for the specific language governing rights and limitations
+ * under the License.
*
* @APPLE_LICENSE_HEADER_END@
*/
#define ptRevision 6
#define ptFeatures 8
#define ptCPUCap 12
-#define ptPatch 16
-#define ptInitRout 20
-#define ptRptdProc 24
-#define ptTempMax 28
-#define ptTempThr 32
-#define ptLineSize 36
-#define ptl1iSize 40
-#define ptl1dSize 44
-#define ptPTEG 48
-#define ptMaxVAddr 52
-#define ptMaxPAddr 56
-#define ptSize 60
+#define ptPwrModes 16
+#define ptPatch 20
+#define ptInitRout 24
+#define ptRptdProc 28
+#define ptTempMax 32
+#define ptTempThr 36
+#define ptLineSize 40
+#define ptl1iSize 44
+#define ptl1dSize 48
+#define ptPTEG 52
+#define ptMaxVAddr 56
+#define ptMaxPAddr 60
+#define ptSize 64
#define bootCPU 10
#define firstInit 9
lwz r18,ptRptdProc(r26) ; Get the reported processor
sth r18,pfrptdProc(r30) ; Set the reported processor
+ lwz r13,ptPwrModes(r26) ; Get the supported power modes
+ stw r13,pfPowerModes(r30) ; Set the supported power modes
+
lwz r13,ptTempMax(r26) ; Get maximum operating temperature
stw r13,thrmmaxTemp(r30) ; Set the maximum
lwz r13,ptTempThr(r26) ; Get temprature to throttle down when exceeded
rlwinm r17,r17,0,pfL2b+1,pfL2b-1 ; No L2, turn off feature
init745Xhl2:
- mfpvr r14 ; Get processor version
- rlwinm r14,r14,16,16,31 ; Isolate processor version
- cmpli cr0, r14, PROCESSOR_VERSION_7457
+ mfpvr r14 ; Get processor version
+ rlwinm r14,r14,16,16,31 ; Isolate processor version
+ cmpli cr0, r14, PROCESSOR_VERSION_7457 ; Test for 7457 or
+ cmpli cr1, r14, PROCESSOR_VERSION_7447A ; 7447A
+ cror cr0_eq, cr1_eq, cr0_eq
lis r14,hi16(512*1024) ; 512KB L2
- beq init745Xhl2_2
+ beq init745Xhl2_2
lis r14,hi16(256*1024) ; Base L2 size
rlwinm r15,r13,22,12,13 ; Convert to 256k, 512k, or 768k
add r14,r14,r15 ; Add in minimum
init745Xhl2_2:
- stw r13,pfl2crOriginal(r30) ; Shadow the L2CR
+ stw r13,pfl2crOriginal(r30) ; Shadow the L2CR
stw r13,pfl2cr(r30) ; Shadow the L2CR
stw r14,pfl2Size(r30) ; Set the L2 size
; .short ptRevision - Revision code from PVR. A zero value denotes the generic attributes if not specific
; .long ptFeatures - Available features
; .long ptCPUCap - Default value for _cpu_capabilities
+; .long ptPwrModes - Available power management features
; .long ptPatch - Patch features
; .long ptInitRout - Initilization routine. Can modify any of the other attributes.
; .long ptRptdProc - Processor type reported
.short 0x4202
.long pfFloat | pfCanSleep | pfCanNap | pfCanDoze | pf32Byte | pfL2
.long kCache32 | kHasGraphicsOps | kHasStfiwx
+ .long 0
.long PatchExt32
.long init750
.long CPU_SUBTYPE_POWERPC_750
.short 0x0200
.long pfFloat | pfCanSleep | pfCanNap | pfCanDoze | pf32Byte | pfL2
.long kCache32 | kHasGraphicsOps | kHasStfiwx
+ .long 0
.long PatchExt32
.long init750CX
.long CPU_SUBTYPE_POWERPC_750
.short 0
.long pfFloat | pfCanSleep | pfCanNap | pfCanDoze | pfThermal | pf32Byte | pfL2
.long kCache32 | kHasGraphicsOps | kHasStfiwx
+ .long 0
.long PatchExt32
.long init750
.long CPU_SUBTYPE_POWERPC_750
.short 0x0100
.long pfFloat | pfCanSleep | pfCanNap | pfCanDoze | pfSlowNap | pfNoMuMMCK | pf32Byte | pfL2
.long kCache32 | kHasGraphicsOps | kHasStfiwx
+ .long pmDualPLL
.long PatchExt32
.long init750FX
.long CPU_SUBTYPE_POWERPC_750
.short 0
.long pfFloat | pfCanSleep | pfCanNap | pfCanDoze | pfSlowNap | pfNoMuMMCK | pf32Byte | pfL2
.long kCache32 | kHasGraphicsOps | kHasStfiwx
+ .long pmDualPLL | pmDPLLVmin
.long PatchExt32
.long init750FXV2
.long CPU_SUBTYPE_POWERPC_750
.short 0x0200
.long pfFloat | pfAltivec | pfSMPcap | pfCanSleep | pfCanNap | pfCanDoze | pfThermal | pf32Byte | pfL1fa | pfL2 | pfL2fa | pfHasDcba
.long kHasAltivec | kCache32 | kDcbaAvailable | kDataStreamsAvailable | kHasGraphicsOps | kHasStfiwx
+ .long 0
.long PatchExt32
.long init7400v2_7
.long CPU_SUBTYPE_POWERPC_7400
.short 0
.long pfFloat | pfAltivec | pfSMPcap | pfCanSleep | pfCanNap | pfCanDoze | pfThermal | pf32Byte | pfL1fa | pfL2 | pfL2fa | pfHasDcba
.long kHasAltivec | kCache32 | kDcbaAvailable | kDataStreamsRecommended | kDataStreamsAvailable | kHasGraphicsOps | kHasStfiwx
+ .long 0
.long PatchExt32
.long init7400
.long CPU_SUBTYPE_POWERPC_7400
.short 0x1101
.long pfFloat | pfAltivec | pfSMPcap | pfCanSleep | pfCanNap | pfCanDoze | pf32Byte | pfL1fa | pfL2 | pfL2fa | pfHasDcba
.long kHasAltivec | kCache32 | kDcbaAvailable | kDataStreamsRecommended | kDataStreamsAvailable | kHasGraphicsOps | kHasStfiwx
+ .long 0
.long PatchExt32
.long init7410
.long CPU_SUBTYPE_POWERPC_7400
.short 0
.long pfFloat | pfAltivec | pfSMPcap | pfCanSleep | pfCanNap | pfCanDoze | pf32Byte | pfL1fa | pfL2 | pfL2fa | pfHasDcba
.long kHasAltivec | kCache32 | kDcbaAvailable | kDataStreamsRecommended | kDataStreamsAvailable | kHasGraphicsOps | kHasStfiwx
+ .long 0
.long PatchExt32
.long init7410
.long CPU_SUBTYPE_POWERPC_7400
.short 0x0100
.long pfFloat | pfAltivec | pfSMPcap | pfCanSleep | pfNoMSRir | pfNoL2PFNap | pfLClck | pf32Byte | pfL2 | pfL2fa | pfL2i | pfL3 | pfL3fa | pfHasDcba
.long kHasAltivec | kCache32 | kDcbaAvailable | kDataStreamsRecommended | kDataStreamsAvailable | kHasGraphicsOps | kHasStfiwx
+ .long 0
.long PatchExt32
.long init7450
.long CPU_SUBTYPE_POWERPC_7450
.short 0x0200
.long pfFloat | pfAltivec | pfSMPcap | pfCanSleep | pfNoMSRir | pfNoL2PFNap | pfLClck | pf32Byte | pfL2 | pfL2fa | pfL2i | pfL3 | pfL3fa | pfHasDcba
.long kHasAltivec | kCache32 | kDcbaAvailable | kDataStreamsRecommended | kDataStreamsAvailable | kHasGraphicsOps | kHasStfiwx
+ .long 0
.long PatchExt32
.long init7450
.long CPU_SUBTYPE_POWERPC_7450
.short 0
.long pfFloat | pfAltivec | pfSMPcap | pfCanSleep | pfWillNap | pfNoMSRir | pfNoL2PFNap | pfLClck | pf32Byte | pfL2 | pfL2fa | pfL2i | pfL3 | pfL3fa | pfHasDcba
.long kHasAltivec | kCache32 | kDcbaAvailable | kDataStreamsRecommended | kDataStreamsAvailable | kHasGraphicsOps | kHasStfiwx
+ .long 0
.long PatchExt32
.long init7450
.long CPU_SUBTYPE_POWERPC_7450
.short 0x0100
.long pfFloat | pfAltivec | pfSMPcap | pfCanSleep | pfNoMSRir | pfNoL2PFNap | pfLClck | pf32Byte | pfL2 | pfL2fa | pfL2i | pfL3 | pfL3fa | pfHasDcba
.long kHasAltivec | kCache32 | kDcbaAvailable | kDataStreamsRecommended | kDataStreamsAvailable | kHasGraphicsOps | kHasStfiwx
+ .long 0
.long PatchExt32
.long init745X
.long CPU_SUBTYPE_POWERPC_7450
.short 0x0200
.long pfFloat | pfAltivec | pfSMPcap | pfCanSleep | pfWillNap | pfNoMSRir | pfNoL2PFNap | pfLClck | pf32Byte | pfL2 | pfL2fa | pfL2i | pfL3 | pfL3fa | pfHasDcba
.long kHasAltivec | kCache32 | kDcbaAvailable | kDataStreamsRecommended | kDataStreamsAvailable | kHasGraphicsOps | kHasStfiwx
+ .long 0
.long PatchExt32
.long init745X
.long CPU_SUBTYPE_POWERPC_7450
.short 0
.long pfFloat | pfAltivec | pfSMPcap | pfCanSleep | pfCanNap | pfNoMSRir | pfNoL2PFNap | pfLClck | pf32Byte | pfL2 | pfL2fa | pfL2i | pfL3 | pfL3fa | pfHasDcba
.long kHasAltivec | kCache32 | kDcbaAvailable | kDataStreamsRecommended | kDataStreamsAvailable | kHasGraphicsOps | kHasStfiwx
+ .long 0
.long PatchExt32
.long init745X
.long CPU_SUBTYPE_POWERPC_7450
.short 0
.long pfFloat | pfAltivec | pfSMPcap | pfCanSleep | pfCanNap | pfNoMSRir | pfNoL2PFNap | pfLClck | pf32Byte | pfL2 | pfL2fa | pfL2i | pfL3 | pfL3fa | pfHasDcba
.long kHasAltivec | kCache32 | kDcbaAvailable | kDataStreamsRecommended | kDataStreamsAvailable | kHasGraphicsOps | kHasStfiwx
+ .long 0
.long PatchExt32
.long init745X
.long CPU_SUBTYPE_POWERPC_7450
.long 52
.long 36
+; 7447A
+
+ .align 2
+ .long 0xFFFF0000 ; All revisions
+ .short PROCESSOR_VERSION_7447A
+ .short 0
+ .long pfFloat | pfAltivec | pfSMPcap | pfCanSleep | pfCanNap | pfNoMSRir | pfNoL2PFNap | pfLClck | pf32Byte | pfL2 | pfL2fa | pfL2i | pfL3 | pfL3fa | pfHasDcba
+ .long kHasAltivec | kCache32 | kDcbaAvailable | kDataStreamsRecommended | kDataStreamsAvailable | kHasGraphicsOps | kHasStfiwx
+ .long pmDFS
+ .long PatchExt32
+ .long init745X
+ .long CPU_SUBTYPE_POWERPC_7450
+ .long 105
+ .long 90
+ .long 32
+ .long 32*1024
+ .long 32*1024
+ .long 64
+ .long 52
+ .long 36
+
+; 970FX DD1.0
+
+ .align 2
+ .long 0xFFFFFF00 ; All versions so far
+ .short PROCESSOR_VERSION_970
+ .short 0x1100
+ .long pfFloat | pfAltivec | pfSMPcap | pfCanSleep | pfCanNap | pf128Byte | pf64Bit | pfL2
+ .long kHasAltivec | k64Bit | kCache128 | kDataStreamsAvailable | kDcbtStreamsRecommended | kDcbtStreamsAvailable | kHasGraphicsOps | kHasStfiwx | kHasFsqrt
+ .long pmPowerTune
+ .long PatchLwsync
+ .long init970
+ .long CPU_SUBTYPE_POWERPC_970
+ .long 105
+ .long 90
+ .long 128
+ .long 64*1024
+ .long 32*1024
+ .long 128
+ .long 65
+ .long 42
+
; 970
.align 2
.short 0
.long pfFloat | pfAltivec | pfSMPcap | pfCanSleep | pfCanNap | pf128Byte | pf64Bit | pfL2 | pfSCOMFixUp
.long kHasAltivec | k64Bit | kCache128 | kDataStreamsAvailable | kDcbtStreamsRecommended | kDcbtStreamsAvailable | kHasGraphicsOps | kHasStfiwx | kHasFsqrt
+ .long 0
+ .long PatchLwsync
+ .long init970
+ .long CPU_SUBTYPE_POWERPC_970
+ .long 105
+ .long 90
+ .long 128
+ .long 64*1024
+ .long 32*1024
+ .long 128
+ .long 65
+ .long 42
+
+; 970FX
+
+ .align 2
+ .long 0xFFFF0000 ; All versions so far
+ .short PROCESSOR_VERSION_970FX
+ .short 0
+ .long pfFloat | pfAltivec | pfSMPcap | pfCanSleep | pfCanNap | pf128Byte | pf64Bit | pfL2
+ .long kHasAltivec | k64Bit | kCache128 | kDataStreamsAvailable | kDcbtStreamsRecommended | kDcbtStreamsAvailable | kHasGraphicsOps | kHasStfiwx | kHasFsqrt
+ .long pmPowerTune
.long PatchLwsync
.long init970
.long CPU_SUBTYPE_POWERPC_970
.short 0
.long pfFloat | pf32Byte
.long kCache32 | kHasGraphicsOps | kHasStfiwx
+ .long 0
.long PatchExt32
.long initUnsupported
.long CPU_SUBTYPE_POWERPC_ALL
projects / apple / xnu.git / blobdiff