]> git.saurik.com Git - apple/xnu.git/blobdiff - osfmk/ppc/Firmware.s
xnu-517.12.7.tar.gz
[apple/xnu.git] / osfmk / ppc / Firmware.s
index cbdb30cff96148fbbcb76caa34e15e4a4dbde042..d07ed62e858f57b2b9d8cfc04b3e3ad0416ecc01 100644 (file)
@@ -2174,10 +2174,12 @@ LEXT(stSpecrs)
                        ori             r2,r2,lo16(MASK(MSR_FP))                ; Get the FP enable 
                        ori             r4,r4,lo16(MASK(MSR_EE))                ; Get the EE bit
 
+                       mfsprg  r9,2                                                    ; Get feature flags 
+                       mtcrf   0x02,r9                                                 ; move pf64Bit cr6
 
-                       mfmsr   r0                                      ; Save the MSR
-                       andc    r0,r0,r2                        ; Turn of VEC and FP
-                       andc    r4,r0,r4                        ; And EE
+                       mfmsr   r0                                                              ; Save the MSR
+                       andc    r0,r0,r2                                                ; Turn off VEC and FP
+                       andc    r4,r0,r4                                                ; And EE
                        mtmsr   r4
                        isync
                        
@@ -2185,6 +2187,8 @@ LEXT(stSpecrs)
                        stw             r12,4(r3)
                        rlwinm  r12,r12,16,16,31
 
+                       bt++    pf64Bitb,stsSF1                                 ; skip if 64-bit (only they take the hint)
+
                        mfdbatu r4,0
                        mfdbatl r5,0
                        mfdbatu r6,1
@@ -2230,7 +2234,7 @@ LEXT(stSpecrs)
                        
                        mfsdr1  r4
                        stw             r4,88(r3)
-                       
+
                        la              r4,92(r3)
                        li              r5,0
                        
@@ -2240,7 +2244,7 @@ stSnsr:           mfsrin  r6,r5
                        mr.             r5,r5
                        addi    r4,r4,4
                        bne+    stSnsr
-
+                       
                        cmplwi  r12,PROCESSOR_VERSION_750
                        mfspr   r4,hid0
                        stw             r4,(39*4)(r3)
@@ -2305,6 +2309,45 @@ nnmax:           stw             r4,(48*4)(r3)
 
                        blr
 
+stsSF1:                mfsprg  r4,0
+                       mfsprg  r5,1
+                       mfsprg  r6,2
+                       mfsprg  r7,3
+                       std             r4,(18*4)(r3)
+                       std             r5,(20*4)(r3)
+                       std             r6,(22*4)(r3)
+                       std             r7,(24*4)(r3)
+                       
+                       mfsdr1  r4
+                       std             r4,(26*4)(r3)
+
+                       mfspr   r4,hid0
+                       std             r4,(28*4)(r3)
+                       mfspr   r4,hid1
+                       std             r4,(30*4)(r3)
+                       mfspr   r4,hid4
+                       std             r4,(32*4)(r3)
+                       mfspr   r4,hid5
+                       std             r4,(34*4)(r3)
+
+
+stsSF2:                li              r5,0
+                       la              r4,(80*4)(r3)
+                       
+stsslbm:       slbmfee r6,r5
+                       slbmfev r7,r5
+                       std             r6,0(r4)
+                       std             r7,8(r4)
+                       addi    r5,r5,1
+                       cmplwi  r5,64
+                       addi    r4,r4,16
+                       blt             stsslbm
+
+                       
+                       mtmsr   r0
+                       isync
+
+                       blr
 
 ;
 ;                      fwEmMck - this forces the hardware to emulate machine checks