+ switch (cmd->cmd_op)
+ {
+ case PROCESSOR_PM_CLR_PMC: /* Clear Performance Monitor Counters */
+ switch (tcpu_subtype)
+ {
+ case CPU_SUBTYPE_POWERPC_750:
+ case CPU_SUBTYPE_POWERPC_7400:
+ case CPU_SUBTYPE_POWERPC_7450:
+ {
+ oldlevel = ml_set_interrupts_enabled(FALSE); /* disable interrupts */
+ mtpmc1(0x0);
+ mtpmc2(0x0);
+ mtpmc3(0x0);
+ mtpmc4(0x0);
+ ml_set_interrupts_enabled(oldlevel); /* enable interrupts */
+ return(KERN_SUCCESS);
+ }
+ default:
+ return(KERN_FAILURE);
+ } /* tcpu_subtype */
+ case PROCESSOR_PM_SET_REGS: /* Set Performance Monitor Registors */
+ switch (tcpu_subtype)
+ {
+ case CPU_SUBTYPE_POWERPC_750:
+ if (count < (PROCESSOR_CONTROL_CMD_COUNT +
+ PROCESSOR_PM_REGS_COUNT_POWERPC_750))
+ return(KERN_FAILURE);
+ else
+ {
+ perf_regs = (processor_pm_regs_t)cmd->cmd_pm_regs;
+ oldlevel = ml_set_interrupts_enabled(FALSE); /* disable interrupts */
+ mtmmcr0(PERFMON_MMCR0(perf_regs) & MMCR0_SUPPORT_MASK);
+ mtpmc1(PERFMON_PMC1(perf_regs));
+ mtpmc2(PERFMON_PMC2(perf_regs));
+ mtmmcr1(PERFMON_MMCR1(perf_regs) & MMCR1_SUPPORT_MASK);
+ mtpmc3(PERFMON_PMC3(perf_regs));
+ mtpmc4(PERFMON_PMC4(perf_regs));
+ ml_set_interrupts_enabled(oldlevel); /* enable interrupts */
+ return(KERN_SUCCESS);
+ }
+ case CPU_SUBTYPE_POWERPC_7400:
+ case CPU_SUBTYPE_POWERPC_7450:
+ if (count < (PROCESSOR_CONTROL_CMD_COUNT +
+ PROCESSOR_PM_REGS_COUNT_POWERPC_7400))
+ return(KERN_FAILURE);
+ else
+ {
+ perf_regs = (processor_pm_regs_t)cmd->cmd_pm_regs;
+ oldlevel = ml_set_interrupts_enabled(FALSE); /* disable interrupts */
+ mtmmcr0(PERFMON_MMCR0(perf_regs) & MMCR0_SUPPORT_MASK);
+ mtpmc1(PERFMON_PMC1(perf_regs));
+ mtpmc2(PERFMON_PMC2(perf_regs));
+ mtmmcr1(PERFMON_MMCR1(perf_regs) & MMCR1_SUPPORT_MASK);
+ mtpmc3(PERFMON_PMC3(perf_regs));
+ mtpmc4(PERFMON_PMC4(perf_regs));
+ mtmmcr2(PERFMON_MMCR2(perf_regs) & MMCR2_SUPPORT_MASK);
+ ml_set_interrupts_enabled(oldlevel); /* enable interrupts */
+ return(KERN_SUCCESS);
+ }
+ default:
+ return(KERN_FAILURE);
+ } /* switch tcpu_subtype */
+ case PROCESSOR_PM_SET_MMCR:
+ switch (tcpu_subtype)
+ {
+ case CPU_SUBTYPE_POWERPC_750:
+ if (count < (PROCESSOR_CONTROL_CMD_COUNT +
+ PROCESSOR_PM_REGS_COUNT_POWERPC_750))
+ return(KERN_FAILURE);
+ else
+ {
+ perf_regs = (processor_pm_regs_t)cmd->cmd_pm_regs;
+ oldlevel = ml_set_interrupts_enabled(FALSE); /* disable interrupts */
+ mtmmcr0(PERFMON_MMCR0(perf_regs) & MMCR0_SUPPORT_MASK);
+ mtmmcr1(PERFMON_MMCR1(perf_regs) & MMCR1_SUPPORT_MASK);
+ ml_set_interrupts_enabled(oldlevel); /* enable interrupts */
+ return(KERN_SUCCESS);
+ }
+ case CPU_SUBTYPE_POWERPC_7400:
+ case CPU_SUBTYPE_POWERPC_7450:
+ if (count < (PROCESSOR_CONTROL_CMD_COUNT +
+ PROCESSOR_PM_REGS_COUNT_POWERPC_7400))
+ return(KERN_FAILURE);
+ else
+ {
+ perf_regs = (processor_pm_regs_t)cmd->cmd_pm_regs;
+ oldlevel = ml_set_interrupts_enabled(FALSE); /* disable interrupts */
+ mtmmcr0(PERFMON_MMCR0(perf_regs) & MMCR0_SUPPORT_MASK);
+ mtmmcr1(PERFMON_MMCR1(perf_regs) & MMCR1_SUPPORT_MASK);
+ mtmmcr2(PERFMON_MMCR2(perf_regs) & MMCR2_SUPPORT_MASK);
+ ml_set_interrupts_enabled(oldlevel); /* enable interrupts */
+ return(KERN_SUCCESS);
+ }
+ default:
+ return(KERN_FAILURE);
+ } /* tcpu_subtype */
+ default:
+ return(KERN_FAILURE);
+ } /* switch cmd_op */
+}