/*
* Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
*
- * @APPLE_LICENSE_HEADER_START@
- *
- * Copyright (c) 1999-2003 Apple Computer, Inc. All Rights Reserved.
+ * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
*
* This file contains Original Code and/or Modifications of Original Code
* as defined in and that are subject to the Apple Public Source License
* Version 2.0 (the 'License'). You may not use this file except in
- * compliance with the License. Please obtain a copy of the License at
- * http://www.opensource.apple.com/apsl/ and read it before using this
- * file.
+ * compliance with the License. The rights granted to you under the License
+ * may not be used to create, or enable the creation or redistribution of,
+ * unlawful or unlicensed copies of an Apple operating system, or to
+ * circumvent, violate, or enable the circumvention or violation of, any
+ * terms of an Apple operating system software license agreement.
+ *
+ * Please obtain a copy of the License at
+ * http://www.opensource.apple.com/apsl/ and read it before using this file.
*
* The Original Code and all software distributed under the License are
* distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
* Please see the License for the specific language governing rights and
* limitations under the License.
*
- * @APPLE_LICENSE_HEADER_END@
+ * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
*/
/*
* @OSF_COPYRIGHT@
stw r0, 88(ARG0) /* Fixed point exception register */
#if FLOATING_POINT_SUPPORT /* TODO NMGS probably not needed for kern */
- mffs r0
- stw r0, 92(ARG0) /* Floating point status register */
+ mffs f0 /* get FPSCR in low 32 bits of f0 */
+ stfiwx f0, 92(ARG0) /* Floating point status register */
stfd f14, 96(ARG0) /* Floating point context - 8 byte aligned */
stfd f15, 104(ARG0)
mtxer r0
#ifdef FLOATING_POINT_SUPPORT
- lwz r0, 92(ARG0) /* Floating point status register */
- mtfs r0
+ lfd f0, 92-4(ARG0) /* get Floating point status register in low 32 bits of f0 */
+ mtfsf 0xFF,f0 /* restore FPSCR */
lfd f14, 96(ARG0) /* Floating point context - 8 byte aligned */
lfd f15, 104(ARG0)