/*
- * Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
+ * Copyright (c) 2000-2006 Apple Computer, Inc. All rights reserved.
*
- * @APPLE_LICENSE_HEADER_START@
- *
- * Copyright (c) 1999-2003 Apple Computer, Inc. All Rights Reserved.
+ * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
*
* This file contains Original Code and/or Modifications of Original Code
* as defined in and that are subject to the Apple Public Source License
* Version 2.0 (the 'License'). You may not use this file except in
- * compliance with the License. Please obtain a copy of the License at
- * http://www.opensource.apple.com/apsl/ and read it before using this
- * file.
+ * compliance with the License. The rights granted to you under the License
+ * may not be used to create, or enable the creation or redistribution of,
+ * unlawful or unlicensed copies of an Apple operating system, or to
+ * circumvent, violate, or enable the circumvention or violation of, any
+ * terms of an Apple operating system software license agreement.
+ *
+ * Please obtain a copy of the License at
+ * http://www.opensource.apple.com/apsl/ and read it before using this file.
*
* The Original Code and all software distributed under the License are
* distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
* Please see the License for the specific language governing rights and
* limitations under the License.
*
- * @APPLE_LICENSE_HEADER_END@
+ * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
*/
/*
* @OSF_COPYRIGHT@
* the rights to redistribute these changes.
*/
-/*
- */
-
#ifndef _I386_FPU_H_
#define _I386_FPU_H_
* Macro definitions for routines to manipulate the
* floating-point processor.
*/
-
-#include <cpus.h>
-#include <i386/proc_reg.h>
+#include <kern/thread.h>
#include <i386/thread.h>
#include <kern/kern_types.h>
#include <mach/i386/kern_return.h>
#include <mach/i386/thread_status.h>
+#include <i386/proc_reg.h>
+
+extern int fp_kind;
+
+extern void init_fpu(void);
+extern void fpu_module_init(void);
+extern void fpu_free(
+ struct x86_fpsave_state * fps);
+extern kern_return_t fpu_set_fxstate(
+ thread_t thr_act,
+ thread_state_t state);
+extern kern_return_t fpu_get_fxstate(
+ thread_t thr_act,
+ thread_state_t state);
+extern void fpu_dup_fxstate(
+ thread_t parent,
+ thread_t child);
+extern void fpnoextflt(void);
+extern void fpextovrflt(void);
+extern void fpexterrflt(void);
+extern void fpSSEexterrflt(void);
+extern void fpflush(thread_t);
+extern void fp_setvalid(boolean_t);
+extern void fxsave64(struct x86_fx_save *);
+extern void fxrstor64(struct x86_fx_save *);
/*
* FPU instructions.
#define fldcw(control) \
__asm__ volatile("fldcw %0" : : "m" (*(unsigned short *) &(control)) )
-extern unsigned short fnstsw(void);
-
-extern __inline__ unsigned short fnstsw(void)
+static inline unsigned short
+fnstsw(void)
{
unsigned short status;
__asm__ volatile("fnstsw %0" : "=ma" (status));
#define fnclex() \
__asm__ volatile("fnclex")
-#define fnsave(state) \
+#define fnsave(state) \
__asm__ volatile("fnsave %0" : "=m" (*state))
#define frstor(state) \
#define fwait() \
__asm__("fwait");
+#define fxrstor(addr) __asm("fxrstor %0" : : "m" (*(addr)))
+#define fxsave(addr) __asm __volatile("fxsave %0" : "=m" (*(addr)))
-#define fpu_load_context(pcb)
+#define FXSAFE() (fp_kind == FP_FXSR)
+
+
+static inline void clear_fpu(void)
+{
+ set_ts();
+}
/*
* Save thread`s FPU context.
- * If only one CPU, we just set the task-switched bit,
- * to keep the new thread from using the coprocessor.
- * If multiple CPUs, we save the entire state.
*/
-#if NCPUS > 1
-#define fpu_save_context(thread) \
- { \
- register struct i386_fpsave_state *ifps; \
- ifps = (thread)->top_act->mact.pcb->ims.ifps; \
- if (ifps != 0 && !ifps->fp_valid) { \
- /* registers are in FPU - save to memory */ \
- ifps->fp_valid = TRUE; \
- fnsave(&ifps->fp_save_state); \
- } \
- set_ts(); \
- }
-
-#else /* NCPUS == 1 */
-#define fpu_save_context(thread) \
- { \
- set_ts(); \
- }
-
-#endif /* NCPUS == 1 */
-
-
-extern int fp_kind;
-extern void init_fpu(void);
-extern void fpu_module_init(void);
-extern void fp_free(
- struct i386_fpsave_state * fps);
-extern kern_return_t fpu_set_state(
- thread_act_t thr_act,
- struct i386_float_state * st);
-extern kern_return_t fpu_get_state(
- thread_act_t thr_act,
- struct i386_float_state * st);
-extern void fpnoextflt(void);
-extern void fpextovrflt(void);
-extern void fpexterrflt(void);
-extern void fp_state_alloc(void);
-extern void fpintr(void);
-extern void fpflush(thread_act_t);
+static inline void fpu_save_context(thread_t thread)
+{
+ struct x86_fpsave_state *ifps;
+
+ assert(ml_get_interrupts_enabled() == FALSE);
+ ifps = (thread)->machine.pcb->ifps;
+ if (ifps != 0 && !ifps->fp_valid) {
+ /* Clear CR0.TS in preparation for the FP context save. In
+ * theory, this shouldn't be necessary since a live FPU should
+ * indicate that TS is clear. However, various routines
+ * (such as sendsig & sigreturn) manipulate TS directly.
+ */
+ clear_ts();
+ /* registers are in FPU - save to memory */
+ ifps->fp_valid = TRUE;
+
+ if (!thread_is_64bit(thread) || is_saved_state32(thread->machine.pcb->iss)) {
+ /* save the compatibility/legacy mode XMM+x87 state */
+ fxsave(&ifps->fx_save_state);
+ ifps->fp_save_layout = FXSAVE32;
+ }
+ else {
+ /* Execute a brief jump to 64-bit mode to save the 64
+ * bit state
+ */
+ fxsave64(&ifps->fx_save_state);
+ ifps->fp_save_layout = FXSAVE64;
+ }
+ }
+ set_ts();
+}
#endif /* _I386_FPU_H_ */
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