-/*
- * FPU instructions.
- */
-#define fninit() \
- __asm__ volatile("fninit")
-
-#define fnstcw(control) \
- __asm__("fnstcw %0" : "=m" (*(unsigned short *)(control)))
-
-#define fldcw(control) \
- __asm__ volatile("fldcw %0" : : "m" (*(unsigned short *) &(control)) )
-
-extern unsigned short fnstsw(void);
-
-extern __inline__ unsigned short fnstsw(void)
-{
- unsigned short status;
- __asm__ volatile("fnstsw %0" : "=ma" (status));
- return(status);
-}
-
-#define fnclex() \
- __asm__ volatile("fnclex")
-
-#define fnsave(state) \
- __asm__ volatile("fnsave %0" : "=m" (*state))
-
-#define frstor(state) \
- __asm__ volatile("frstor %0" : : "m" (state))
-
-#define fwait() \
- __asm__("fwait");
-
-#define fxrstor(addr) __asm("fxrstor %0" : : "m" (*(addr)))
-#define fxsave(addr) __asm __volatile("fxsave %0" : "=m" (*(addr)))
-
-#define FXSAFE() (fp_kind == FP_FXSR)
-
-#define fpu_load_context(pcb)
-
-/*
- * Save thread`s FPU context.
- * If only one CPU, we just set the task-switched bit,
- * to keep the new thread from using the coprocessor.
- * If multiple CPUs, we save the entire state.
- * NOTE: in order to provide backwards compatible support in the kernel. When saving SSE2 state, we also save the
- * FP state in it's old location. Otherwise fpu_get_state() and fpu_set_state() will stop working
- */
-#define fpu_save_context(thread) \
- { \
- register struct i386_fpsave_state *ifps; \
- ifps = (thread)->machine.pcb->ims.ifps; \
- if (ifps != 0 && !ifps->fp_valid) { \
- /* registers are in FPU - save to memory */ \
- ifps->fp_valid = TRUE; \
- ifps->fp_save_flavor = FP_387; \
- if (FXSAFE()) { \
- fxsave(&ifps->fx_save_state); \
- ifps->fp_save_flavor = FP_FXSR; \
- } \
- fnsave(&ifps->fp_save_state); \
- } \
- set_ts(); \
- }
-
-
-
-extern int fp_kind;