/*
- * Copyright (c) 2000-2004 Apple Computer, Inc. All rights reserved.
+ * Copyright (c) 2000-2008 Apple Inc. All rights reserved.
*
- * @APPLE_LICENSE_HEADER_START@
+ * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
*
- * The contents of this file constitute Original Code as defined in and
- * are subject to the Apple Public Source License Version 1.1 (the
- * "License"). You may not use this file except in compliance with the
- * License. Please obtain a copy of the License at
- * http://www.apple.com/publicsource and read it before using this file.
+ * This file contains Original Code and/or Modifications of Original Code
+ * as defined in and that are subject to the Apple Public Source License
+ * Version 2.0 (the 'License'). You may not use this file except in
+ * compliance with the License. The rights granted to you under the License
+ * may not be used to create, or enable the creation or redistribution of,
+ * unlawful or unlicensed copies of an Apple operating system, or to
+ * circumvent, violate, or enable the circumvention or violation of, any
+ * terms of an Apple operating system software license agreement.
*
- * This Original Code and all software distributed under the License are
- * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
+ * Please obtain a copy of the License at
+ * http://www.opensource.apple.com/apsl/ and read it before using this file.
+ *
+ * The Original Code and all software distributed under the License are
+ * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
* EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the
- * License for the specific language governing rights and limitations
- * under the License.
+ * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
+ * Please see the License for the specific language governing rights and
+ * limitations under the License.
*
- * @APPLE_LICENSE_HEADER_END@
+ * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
*/
/*
* @OSF_COPYRIGHT@
#include <mach/i386/vm_param.h>
#include <kern/kern_types.h>
#include <kern/misc_protos.h>
+#include <sys/errno.h>
#include <i386/param.h>
#include <i386/misc_protos.h>
#include <i386/cpu_data.h>
#include <i386/machine_routines.h>
#include <i386/cpuid.h>
+#include <i386/vmx.h>
#include <vm/pmap.h>
#include <vm/vm_map.h>
#include <vm/vm_kern.h>
#include <vm/vm_fault.h>
+#include <libkern/OSAtomic.h>
+#include <sys/kdebug.h>
+
+#if 0
+
+#undef KERNEL_DEBUG
+#define KERNEL_DEBUG KERNEL_DEBUG_CONSTANT
+#define KDEBUG 1
+
+#endif
+
/* XXX - should be gone from here */
extern void invalidate_icache64(addr64_t addr, unsigned cnt, int phys);
extern void flush_dcache64(addr64_t addr, unsigned count, int phys);
extern boolean_t phys_page_exists(ppnum_t);
-extern pt_entry_t *pmap_mapgetpte(vm_map_t, vm_offset_t);
extern void bcopy_no_overwrite(const char *from, char *to,vm_size_t bytes);
extern void pmap_set_reference(ppnum_t pn);
extern void mapping_set_mod(ppnum_t pa);
extern void mapping_set_ref(ppnum_t pn);
-extern void switch_to_serial_console(void);
-extern kern_return_t copyp2p(vm_offset_t source,
- vm_offset_t dest,
- unsigned int size,
- unsigned int flush_action);
-extern void fillPage(ppnum_t pa, unsigned int fill);
+
extern void ovbcopy(const char *from,
char *to,
vm_size_t nbytes);
#define value_64bit(value) ((value) & 0xFFFFFFFF00000000LL)
#define low32(x) ((unsigned int)((x) & 0x00000000FFFFFFFFLL))
+#define JOE_DEBUG 0
+
+void
+bzero_phys_nc(
+ addr64_t src64,
+ uint32_t bytes)
+{
+ bzero_phys(src64,bytes);
+}
void
bzero_phys(
addr64_t src64,
- vm_size_t bytes)
+ uint32_t bytes)
{
- vm_offset_t src = low32(src64);
- pt_entry_t save2;
- mp_disable_preemption();
- if (*(pt_entry_t *) CM2)
- panic("bzero_phys: CMAP busy");
+ mapwindow_t *map;
- *(pt_entry_t *) CM2 = INTEL_PTE_VALID | INTEL_PTE_RW | (src & PG_FRAME) |
- INTEL_PTE_REF | INTEL_PTE_MOD;
- save2=*(pt_entry_t *)CM2;
- invlpg((u_int)CA2);
-
- bzero((void *)((unsigned int)CA2 | (src & INTEL_OFFMASK)), bytes);
- if (save2 != *(pt_entry_t *)CM2) panic("bzero_phys CMAP changed");
- *(pt_entry_t *) CM2 = 0;
- mp_enable_preemption();
-}
+ mp_disable_preemption();
-/*
- * copy 'size' bytes from physical to physical address
- * the caller must validate the physical ranges
- *
- * if flush_action == 0, no cache flush necessary
- * if flush_action == 1, flush the source
- * if flush_action == 2, flush the dest
- * if flush_action == 3, flush both source and dest
- */
+ map = pmap_get_mapwindow((pt_entry_t)(INTEL_PTE_VALID | INTEL_PTE_RW | ((pmap_paddr_t)src64 & PG_FRAME) | INTEL_PTE_REF | INTEL_PTE_MOD));
-kern_return_t
-copyp2p(vm_offset_t source,
- vm_offset_t dest,
- unsigned int size,
- unsigned int flush_action)
-{
-
- switch(flush_action) {
- case 1:
- flush_dcache(source, size, 1);
- break;
- case 2:
- flush_dcache(dest, size, 1);
- break;
- case 3:
- flush_dcache(source, size, 1);
- flush_dcache(dest, size, 1);
- break;
+ bzero((void *)((uintptr_t)map->prv_CADDR | ((uint32_t)src64 & INTEL_OFFMASK)), bytes);
- }
- bcopy_phys((addr64_t)source, (addr64_t)dest, (vm_size_t)size); /* Do a physical copy */
-
- switch(flush_action) {
- case 1:
- flush_dcache(source, size, 1);
- break;
- case 2:
- flush_dcache(dest, size, 1);
- break;
- case 3:
- flush_dcache(source, size, 1);
- flush_dcache(dest, size, 1);
- break;
+ pmap_put_mapwindow(map);
- }
- return KERN_SUCCESS;
+ mp_enable_preemption();
}
+
/*
* bcopy_phys - like bcopy but copies from/to physical addresses.
*/
addr64_t dst64,
vm_size_t bytes)
{
- vm_offset_t src = low32(src64);
- vm_offset_t dst = low32(dst64);
- pt_entry_t save1,save2;
- /* ensure we stay within a page */
- if ( (((src & (NBPG-1)) + bytes) > NBPG) ||
- (((dst & (NBPG-1)) + bytes) > NBPG) ) panic("bcopy_phys");
- mp_disable_preemption();
- if (*(pt_entry_t *) CM1 || *(pt_entry_t *) CM2)
- panic("bcopy_phys: CMAP busy");
-
- *(pt_entry_t *) CM1 = INTEL_PTE_VALID | (src & PG_FRAME) | INTEL_PTE_REF;
- *(pt_entry_t *) CM2 = INTEL_PTE_VALID | INTEL_PTE_RW | (dst & PG_FRAME) |
- INTEL_PTE_REF | INTEL_PTE_MOD;
- save1 = *(pt_entry_t *)CM1;save2 = *(pt_entry_t *)CM2;
- invlpg((u_int)CA1);
- invlpg((u_int)CA2);
-
- bcopy((void *) ((uintptr_t)CA1 | (src & INTEL_OFFMASK)),
- (void *) ((uintptr_t)CA2 | (dst & INTEL_OFFMASK)), bytes);
- if ( (save1 != *(pt_entry_t *)CM1) || (save2 != *(pt_entry_t *)CM2)) panic("bcopy_phys CMAP changed");
- *(pt_entry_t *) CM1 = 0;
- *(pt_entry_t *) CM2 = 0;
+ mapwindow_t *src_map, *dst_map;
+
+ /* ensure we stay within a page */
+ if ( ((((uint32_t)src64 & (NBPG-1)) + bytes) > NBPG) || ((((uint32_t)dst64 & (NBPG-1)) + bytes) > NBPG) ) {
+ panic("bcopy_phys alignment");
+ }
+ mp_disable_preemption();
+
+ src_map = pmap_get_mapwindow((pt_entry_t)(INTEL_PTE_VALID | ((pmap_paddr_t)src64 & PG_FRAME) | INTEL_PTE_REF));
+ dst_map = pmap_get_mapwindow((pt_entry_t)(INTEL_PTE_VALID | INTEL_PTE_RW | ((pmap_paddr_t)dst64 & PG_FRAME) |
+ INTEL_PTE_REF | INTEL_PTE_MOD));
+
+ bcopy((void *) ((uintptr_t)src_map->prv_CADDR | ((uint32_t)src64 & INTEL_OFFMASK)),
+ (void *) ((uintptr_t)dst_map->prv_CADDR | ((uint32_t)dst64 & INTEL_OFFMASK)), bytes);
+
+ pmap_put_mapwindow(src_map);
+ pmap_put_mapwindow(dst_map);
+
+ mp_enable_preemption();
+}
+
+/*
+ * allow a function to get a quick virtual mapping of a physical page
+ */
+
+int
+apply_func_phys(
+ addr64_t dst64,
+ vm_size_t bytes,
+ int (*func)(void * buffer, vm_size_t bytes, void * arg),
+ void * arg)
+{
+ mapwindow_t *dst_map;
+ int rc = -1;
+
+ /* ensure we stay within a page */
+ if ( ((((uint32_t)dst64 & (NBPG-1)) + bytes) > NBPG) ) {
+ panic("apply_func_phys alignment");
+ }
+ mp_disable_preemption();
+
+ dst_map = pmap_get_mapwindow((pt_entry_t)(INTEL_PTE_VALID | INTEL_PTE_RW | ((pmap_paddr_t)dst64 & PG_FRAME) |
+ INTEL_PTE_REF | INTEL_PTE_MOD));
+
+ rc = func((void *)((uintptr_t)dst_map->prv_CADDR | ((uint32_t)dst64 & INTEL_OFFMASK)), bytes, arg);
+
+ pmap_put_mapwindow(dst_map);
+
mp_enable_preemption();
+ return rc;
}
/*
/*
- * Read data from a physical address. Memory should not be cache inhibited.
+ * Read data from a physical address.
*/
static unsigned int
-ml_phys_read_data( vm_offset_t paddr, int size )
+ml_phys_read_data(pmap_paddr_t paddr, int size )
{
- unsigned int result;
- pt_entry_t save;
- mp_disable_preemption();
- if (*(pt_entry_t *) CM3)
- panic("ml_phys_read_data: CMAP busy");
+ mapwindow_t *map;
+ unsigned int result;
- *(pt_entry_t *) CM3 = INTEL_PTE_VALID | (paddr & PG_FRAME) | INTEL_PTE_REF;
- save = *(pt_entry_t *)CM3;
- invlpg((u_int)CA3);
+ mp_disable_preemption();
+ map = pmap_get_mapwindow((pt_entry_t)(INTEL_PTE_VALID | (paddr & PG_FRAME) | INTEL_PTE_REF));
switch (size) {
unsigned char s1;
unsigned short s2;
case 1:
- s1 = *(unsigned char *)((unsigned int)CA3 | (paddr & INTEL_OFFMASK));
+ s1 = *(unsigned char *)((uintptr_t)map->prv_CADDR | ((uint32_t)paddr & INTEL_OFFMASK));
result = s1;
break;
case 2:
- s2 = *(unsigned short *)((unsigned int)CA3 | (paddr & INTEL_OFFMASK));
+ s2 = *(unsigned short *)((uintptr_t)map->prv_CADDR | ((uint32_t)paddr & INTEL_OFFMASK));
result = s2;
break;
case 4:
default:
- result = *(unsigned int *)((unsigned int)CA3 | (paddr & INTEL_OFFMASK));
+ result = *(unsigned int *)((uintptr_t)map->prv_CADDR | ((uint32_t)paddr & INTEL_OFFMASK));
break;
}
+ pmap_put_mapwindow(map);
- if (save != *(pt_entry_t *)CM3) panic("ml_phys_read_data CMAP changed");
- *(pt_entry_t *) CM3 = 0;
mp_enable_preemption();
+
return result;
}
static unsigned long long
-ml_phys_read_long_long( vm_offset_t paddr )
+ml_phys_read_long_long(pmap_paddr_t paddr )
{
- unsigned long long result;
- pt_entry_t save;
- mp_disable_preemption();
- if (*(pt_entry_t *) CM3)
- panic("ml_phys_read_data: CMAP busy");
+ mapwindow_t *map;
+ unsigned long long result;
+
+ mp_disable_preemption();
+
+ map = pmap_get_mapwindow((pt_entry_t)(INTEL_PTE_VALID | (paddr & PG_FRAME) | INTEL_PTE_REF));
- *(pt_entry_t *) CM3 = INTEL_PTE_VALID | (paddr & PG_FRAME) | INTEL_PTE_REF;
- save = *(pt_entry_t *)CM3;
- invlpg((u_int)CA3);
+ result = *(unsigned long long *)((uintptr_t)map->prv_CADDR | ((uint32_t)paddr & INTEL_OFFMASK));
- result = *(unsigned long long *)((unsigned int)CA3 | (paddr & INTEL_OFFMASK));
+ pmap_put_mapwindow(map);
- if (save != *(pt_entry_t *)CM3) panic("ml_phys_read_data CMAP changed");
- *(pt_entry_t *) CM3 = 0;
mp_enable_preemption();
+
return result;
}
unsigned int ml_phys_read( vm_offset_t paddr)
{
- return ml_phys_read_data(paddr, 4);
+ return ml_phys_read_data((pmap_paddr_t)paddr, 4);
}
unsigned int ml_phys_read_word(vm_offset_t paddr) {
- return ml_phys_read_data(paddr, 4);
+
+ return ml_phys_read_data((pmap_paddr_t)paddr, 4);
}
unsigned int ml_phys_read_64(addr64_t paddr64)
{
- return ml_phys_read_data(low32(paddr64), 4);
+ return ml_phys_read_data((pmap_paddr_t)paddr64, 4);
}
unsigned int ml_phys_read_word_64(addr64_t paddr64)
{
- return ml_phys_read_data(low32(paddr64), 4);
+ return ml_phys_read_data((pmap_paddr_t)paddr64, 4);
}
unsigned int ml_phys_read_half(vm_offset_t paddr)
{
- return ml_phys_read_data(paddr, 2);
+ return ml_phys_read_data((pmap_paddr_t)paddr, 2);
}
unsigned int ml_phys_read_half_64(addr64_t paddr64)
{
- return ml_phys_read_data(low32(paddr64), 2);
+ return ml_phys_read_data((pmap_paddr_t)paddr64, 2);
}
unsigned int ml_phys_read_byte(vm_offset_t paddr)
{
- return ml_phys_read_data(paddr, 1);
+ return ml_phys_read_data((pmap_paddr_t)paddr, 1);
}
unsigned int ml_phys_read_byte_64(addr64_t paddr64)
{
- return ml_phys_read_data(low32(paddr64), 1);
+ return ml_phys_read_data((pmap_paddr_t)paddr64, 1);
}
unsigned long long ml_phys_read_double(vm_offset_t paddr)
{
- return ml_phys_read_long_long(paddr);
+ return ml_phys_read_long_long((pmap_paddr_t)paddr);
}
-unsigned long long ml_phys_read_double_64(addr64_t paddr)
+unsigned long long ml_phys_read_double_64(addr64_t paddr64)
{
- return ml_phys_read_long_long(low32(paddr));
+ return ml_phys_read_long_long((pmap_paddr_t)paddr64);
}
+
/*
- * Write data to a physical address. Memory should not be cache inhibited.
+ * Write data to a physical address.
*/
static void
-ml_phys_write_data( vm_offset_t paddr, unsigned long data, int size )
+ml_phys_write_data(pmap_paddr_t paddr, unsigned long data, int size)
{
- pt_entry_t save;
- mp_disable_preemption();
- if (*(pt_entry_t *) CM3)
- panic("ml_phys_write_data: CMAP busy");
+ mapwindow_t *map;
- *(pt_entry_t *) CM3 = INTEL_PTE_VALID | INTEL_PTE_RW | (paddr & PG_FRAME) |
- INTEL_PTE_REF | INTEL_PTE_MOD;
- save = *(pt_entry_t *)CM3;
- invlpg((u_int)CA3);
+ mp_disable_preemption();
+
+ map = pmap_get_mapwindow((pt_entry_t)(INTEL_PTE_VALID | INTEL_PTE_RW | (paddr & PG_FRAME) |
+ INTEL_PTE_REF | INTEL_PTE_MOD));
switch (size) {
case 1:
- *(unsigned char *)((unsigned int)CA3 | (paddr & INTEL_OFFMASK)) = (unsigned char)data;
+ *(unsigned char *)((uintptr_t)map->prv_CADDR | ((uint32_t)paddr & INTEL_OFFMASK)) = (unsigned char)data;
break;
case 2:
- *(unsigned short *)((unsigned int)CA3 | (paddr & INTEL_OFFMASK)) = (unsigned short)data;
+ *(unsigned short *)((uintptr_t)map->prv_CADDR | ((uint32_t)paddr & INTEL_OFFMASK)) = (unsigned short)data;
break;
case 4:
default:
- *(unsigned int *)((unsigned int)CA3 | (paddr & INTEL_OFFMASK)) = data;
+ *(unsigned int *)((uintptr_t)map->prv_CADDR | ((uint32_t)paddr & INTEL_OFFMASK)) = (uint32_t)data;
break;
}
+ pmap_put_mapwindow(map);
- if (save != *(pt_entry_t *)CM3) panic("ml_phys_write_data CMAP changed");
- *(pt_entry_t *) CM3 = 0;
mp_enable_preemption();
}
static void
-ml_phys_write_long_long( vm_offset_t paddr, unsigned long long data )
+ml_phys_write_long_long(pmap_paddr_t paddr, unsigned long long data)
{
- pt_entry_t save;
- mp_disable_preemption();
- if (*(pt_entry_t *) CM3)
- panic("ml_phys_write_data: CMAP busy");
+ mapwindow_t *map;
+
+ mp_disable_preemption();
- *(pt_entry_t *) CM3 = INTEL_PTE_VALID | INTEL_PTE_RW | (paddr & PG_FRAME) |
- INTEL_PTE_REF | INTEL_PTE_MOD;
- save = *(pt_entry_t *)CM3;
- invlpg((u_int)CA3);
+ map = pmap_get_mapwindow((pt_entry_t)(INTEL_PTE_VALID | INTEL_PTE_RW | (paddr & PG_FRAME) |
+ INTEL_PTE_REF | INTEL_PTE_MOD));
- *(unsigned long long *)((unsigned int)CA3 | (paddr & INTEL_OFFMASK)) = data;
+ *(unsigned long long *)((uintptr_t)map->prv_CADDR | ((uint32_t)paddr & INTEL_OFFMASK)) = data;
+
+ pmap_put_mapwindow(map);
- if (save != *(pt_entry_t *)CM3) panic("ml_phys_write_data CMAP changed");
- *(pt_entry_t *) CM3 = 0;
mp_enable_preemption();
}
+
+
void ml_phys_write_byte(vm_offset_t paddr, unsigned int data)
{
- ml_phys_write_data(paddr, data, 1);
+ ml_phys_write_data((pmap_paddr_t)paddr, data, 1);
}
-void ml_phys_write_byte_64(addr64_t paddr, unsigned int data)
+void ml_phys_write_byte_64(addr64_t paddr64, unsigned int data)
{
- ml_phys_write_data(low32(paddr), data, 1);
+ ml_phys_write_data((pmap_paddr_t)paddr64, data, 1);
}
void ml_phys_write_half(vm_offset_t paddr, unsigned int data)
{
- ml_phys_write_data(paddr, data, 2);
+ ml_phys_write_data((pmap_paddr_t)paddr, data, 2);
}
-void ml_phys_write_half_64(addr64_t paddr, unsigned int data)
+void ml_phys_write_half_64(addr64_t paddr64, unsigned int data)
{
- ml_phys_write_data(low32(paddr), data, 2);
+ ml_phys_write_data((pmap_paddr_t)paddr64, data, 2);
}
void ml_phys_write(vm_offset_t paddr, unsigned int data)
{
- ml_phys_write_data(paddr, data, 4);
+ ml_phys_write_data((pmap_paddr_t)paddr, data, 4);
}
-void ml_phys_write_64(addr64_t paddr, unsigned int data)
+void ml_phys_write_64(addr64_t paddr64, unsigned int data)
{
- ml_phys_write_data(low32(paddr), data, 4);
+ ml_phys_write_data((pmap_paddr_t)paddr64, data, 4);
}
void ml_phys_write_word(vm_offset_t paddr, unsigned int data)
{
- ml_phys_write_data(paddr, data, 4);
+ ml_phys_write_data((pmap_paddr_t)paddr, data, 4);
}
-void ml_phys_write_word_64(addr64_t paddr, unsigned int data)
+void ml_phys_write_word_64(addr64_t paddr64, unsigned int data)
{
- ml_phys_write_data(low32(paddr), data, 4);
+ ml_phys_write_data((pmap_paddr_t)paddr64, data, 4);
}
-
void ml_phys_write_double(vm_offset_t paddr, unsigned long long data)
{
- ml_phys_write_long_long(paddr, data);
+ ml_phys_write_long_long((pmap_paddr_t)paddr, data);
}
-void ml_phys_write_double_64(addr64_t paddr, unsigned long long data)
+void ml_phys_write_double_64(addr64_t paddr64, unsigned long long data)
{
- ml_phys_write_long_long(low32(paddr), data);
+ ml_phys_write_long_long((pmap_paddr_t)paddr64, data);
}
boolean_t
ml_probe_read(vm_offset_t paddr, unsigned int *val)
{
+ if ((PAGE_SIZE - (paddr & PAGE_MASK)) < 4)
+ return FALSE;
+
*val = ml_phys_read(paddr);
+
return TRUE;
}
* We assume that machine checks are enabled both in MSR and HIDs
*/
boolean_t
-ml_probe_read_64(addr64_t paddr, unsigned int *val)
+ml_probe_read_64(addr64_t paddr64, unsigned int *val)
{
- *val = ml_phys_read_64(paddr);
+ if ((PAGE_SIZE - (paddr64 & PAGE_MASK)) < 4)
+ return FALSE;
+
+ *val = ml_phys_read_64((pmap_paddr_t)paddr64);
return TRUE;
}
break;
while (--len);
- return len;
+ return (int)len;
}
int
-memcmp(s1, s2, n)
- const void *s1, *s2;
- size_t n;
+memcmp(const void *s1, const void *s2, size_t n)
{
if (n != 0) {
const unsigned char *p1 = s1, *p2 = s2;
return string - 1 - ret;
}
-#include <libkern/OSAtomic.h>
-
-uint32_t
-hw_atomic_add(
- uint32_t *dest,
- uint32_t delt)
-{
- uint32_t oldValue;
- uint32_t newValue;
-
- do {
- oldValue = *dest;
- newValue = (oldValue + delt);
- } while (!OSCompareAndSwap((UInt32)oldValue,
- (UInt32)newValue, (UInt32 *)dest));
-
- return newValue;
-}
-
-uint32_t
-hw_atomic_sub(
- uint32_t *dest,
- uint32_t delt)
-{
- uint32_t oldValue;
- uint32_t newValue;
-
- do {
- oldValue = *dest;
- newValue = (oldValue - delt);
- } while (!OSCompareAndSwap((UInt32)oldValue,
- (UInt32)newValue, (UInt32 *)dest));
-
- return newValue;
-}
-
-uint32_t
-hw_atomic_or(
- uint32_t *dest,
- uint32_t mask)
-{
- uint32_t oldValue;
- uint32_t newValue;
-
- do {
- oldValue = *dest;
- newValue = (oldValue | mask);
- } while (!OSCompareAndSwap((UInt32)oldValue,
- (UInt32)newValue, (UInt32 *)dest));
-
- return newValue;
-}
-
-uint32_t
-hw_atomic_and(
- uint32_t *dest,
- uint32_t mask)
-{
- uint32_t oldValue;
- uint32_t newValue;
-
- do {
- oldValue = *dest;
- newValue = (oldValue & mask);
- } while (!OSCompareAndSwap((UInt32)oldValue,
- (UInt32)newValue, (UInt32 *)dest));
-
- return newValue;
-}
-
uint32_t
-hw_compare_and_store(
- uint32_t oldval,
- uint32_t newval,
- uint32_t *dest)
+hw_compare_and_store(uint32_t oldval, uint32_t newval, volatile uint32_t *dest)
{
- return OSCompareAndSwap((UInt32)oldval, (UInt32)newval, (UInt32 *)dest);
+ return OSCompareAndSwap((UInt32)oldval,
+ (UInt32)newval,
+ (volatile UInt32 *)dest);
}
#if MACH_ASSERT
#endif /* MACH_ASSERT */
+void fillPage(ppnum_t pa, unsigned int fill)
+{
+ mapwindow_t *map;
+ pmap_paddr_t src;
+ int i;
+ int cnt = PAGE_SIZE/sizeof(unsigned int);
+ unsigned int *addr;
+ mp_disable_preemption();
+ src = i386_ptob(pa);
+ map = pmap_get_mapwindow((pt_entry_t)(INTEL_PTE_VALID | INTEL_PTE_RW | (src & PG_FRAME) |
+ INTEL_PTE_REF | INTEL_PTE_MOD));
-void fillPage(ppnum_t pa, unsigned int fill)
-{
- pmap_paddr_t src;
- int i;
- int cnt = PAGE_SIZE/sizeof(unsigned int);
- unsigned int *addr;
- mp_disable_preemption();
- if (*(pt_entry_t *) CM2)
- panic("fillPage: CMAP busy");
- src = (pmap_paddr_t)i386_ptob(pa);
- *(pt_entry_t *) CM2 = INTEL_PTE_VALID | INTEL_PTE_RW | (src & PG_FRAME) |
- INTEL_PTE_REF | INTEL_PTE_MOD;
- invlpg((u_int)CA2);
+ for (i = 0, addr = (unsigned int *)map->prv_CADDR; i < cnt ; i++ )
+ *addr++ = fill;
- for (i = 0, addr = (unsigned int *)CA2; i < cnt ; i++ )
- *addr++ = fill;
+ pmap_put_mapwindow(map);
- *(pt_entry_t *) CM2 = 0;
- mp_enable_preemption();
+ mp_enable_preemption();
}
static inline void __sfence(void)
}
static inline void __clflush(void *ptr)
{
- __asm__ volatile(".byte 0x0F; .byte 0xae; .byte 0x38" : : "a" (ptr));
+ __asm__ volatile("clflush (%0)" : : "r" (ptr));
}
void dcache_incoherent_io_store64(addr64_t pa, unsigned int count)
{
- if (cpuid_features() & CPUID_FEATURE_CLFSH)
- {
+ mapwindow_t *map;
uint32_t linesize = cpuid_info()->cache_linesize;
addr64_t addr;
uint32_t offset, chunk;
boolean_t istate;
+ __mfence();
+
istate = ml_set_interrupts_enabled(FALSE);
- if (*(pt_entry_t *) CM2)
- panic("cache_flush_page_phys: CMAP busy");
+ offset = (uint32_t)(pa & (linesize - 1));
+ addr = pa - offset;
+
+ map = pmap_get_mapwindow((pt_entry_t)(i386_ptob(atop_64(addr)) | INTEL_PTE_VALID));
- offset = pa & (linesize - 1);
count += offset;
- addr = pa - offset;
- offset = addr & ((addr64_t) (page_size - 1));
- chunk = page_size - offset;
+ offset = (uint32_t)(addr & ((addr64_t) (page_size - 1)));
+ chunk = (uint32_t)page_size - offset;
do
{
if (chunk > count)
chunk = count;
-
- *(pt_entry_t *) CM2 = i386_ptob(atop_64(addr)) | INTEL_PTE_VALID;
- invlpg((u_int)CA2);
for (; offset < chunk; offset += linesize)
- __clflush((void *)(((u_int)CA2) + offset));
+ __clflush((void *)(((uintptr_t)map->prv_CADDR) + offset));
count -= chunk;
addr += chunk;
- chunk = page_size;
+ chunk = (uint32_t) page_size;
offset = 0;
+
+ if (count) {
+ pmap_store_pte(map->prv_CMAP, (pt_entry_t)(i386_ptob(atop_64(addr)) | INTEL_PTE_VALID));
+ invlpg((uintptr_t)map->prv_CADDR);
+ }
}
while (count);
- *(pt_entry_t *) CM2 = 0;
+ pmap_put_mapwindow(map);
(void) ml_set_interrupts_enabled(istate);
- }
- else
- __wbinvd();
- __sfence();
+
+ __mfence();
}
void dcache_incoherent_io_flush64(addr64_t pa, unsigned int count)
return(dcache_incoherent_io_store64(pa,count));
}
+
void
-flush_dcache64(__unused addr64_t addr,
- __unused unsigned count,
- __unused int phys)
+flush_dcache64(addr64_t addr, unsigned count, int phys)
{
+ if (phys) {
+ dcache_incoherent_io_flush64(addr, count);
+ }
+ else {
+ uint32_t linesize = cpuid_info()->cache_linesize;
+ addr64_t bound = (addr + count + linesize - 1) & ~(linesize - 1);
+ __mfence();
+ while (addr < bound) {
+ __clflush((void *) (uintptr_t) addr);
+ addr += linesize;
+ }
+ __mfence();
+ }
}
void
{
}
-kern_return_t copypv(addr64_t src64,
- addr64_t snk64,
- unsigned int size,
- int which)
-{
-
- vm_map_t map;
- kern_return_t ret;
- vm_offset_t source, sink;
- vm_offset_t vaddr;
- vm_offset_t paddr;
- spl_t s;
- unsigned int lop, csize;
- int needtran, bothphys;
- vm_prot_t prot;
- pt_entry_t *ptep;
-
- map = (which & cppvKmap) ? kernel_map : current_map_fast();
-
- source = low32(src64);
- sink = low32(snk64);
-
- if((which & (cppvPsrc | cppvPsnk)) == 0 ) { /* Make sure that only one is virtual */
- panic("copypv: no more than 1 parameter may be virtual\n"); /* Not allowed */
- }
-
- bothphys = 1; /* Assume both are physical */
-
- if(!(which & cppvPsnk)) { /* Is there a virtual page here? */
- vaddr = sink; /* Sink side is virtual */
- bothphys = 0; /* Show both aren't physical */
- prot = VM_PROT_READ | VM_PROT_WRITE; /* Sink always must be read/write */
- } else /* if(!(which & cppvPsrc)) */ { /* Source side is virtual */
- vaddr = source; /* Source side is virtual */
- bothphys = 0; /* Show both aren't physical */
- prot = VM_PROT_READ; /* Virtual source is always read only */
- }
-
- needtran = 1; /* Show we need to map the virtual the first time */
- s = splhigh(); /* Don't bother me */
-
- while(size) {
-
- if(!bothphys && (needtran || !(vaddr & 4095LL))) { /* If first time or we stepped onto a new page, we need to translate */
- needtran = 0;
- while(1) {
- ptep = pmap_mapgetpte(map, vaddr);
- if((0 == ptep) || ((*ptep & INTEL_PTE_VALID) == 0)) {
- splx(s); /* Restore the interrupt level */
- ret = vm_fault(map, vm_map_trunc_page(vaddr), prot, FALSE, THREAD_UNINT, NULL, 0); /* Didn't find it, try to fault it in... */
-
- if(ret != KERN_SUCCESS)return KERN_FAILURE; /* Didn't find any, return no good... */
-
- s = splhigh(); /* Don't bother me */
- continue; /* Go try for the map again... */
-
- }
-
- /* Note that we have to have the destination writable. So, if we already have it, or we are mapping the source,
- we can just leave.
- */
- if((which & cppvPsnk) || (*ptep & INTEL_PTE_WRITE)) break; /* We got it mapped R/W or the source is not virtual, leave... */
- splx(s); /* Restore the interrupt level */
-
- ret = vm_fault(map, vm_map_trunc_page(vaddr), VM_PROT_READ | VM_PROT_WRITE, FALSE, THREAD_UNINT, NULL, 0); /* check for a COW area */
- if (ret != KERN_SUCCESS) return KERN_FAILURE; /* We couldn't get it R/W, leave in disgrace... */
- s = splhigh(); /* Don't bother me */
- }
-
- paddr = pte_to_pa(*ptep) | (vaddr & 4095);
-
- if(which & cppvPsrc) sink = paddr; /* If source is physical, then the sink is virtual */
- else source = paddr; /* Otherwise the source is */
- }
-
- lop = (unsigned int)(4096LL - (sink & 4095LL)); /* Assume sink smallest */
- if(lop > (unsigned int)(4096LL - (source & 4095LL))) lop = (unsigned int)(4096LL - (source & 4095LL)); /* No, source is smaller */
-
- csize = size; /* Assume we can copy it all */
- if(lop < size) csize = lop; /* Nope, we can't do it all */
-
- if(which & cppvFsrc) flush_dcache64((addr64_t)source, csize, 1); /* If requested, flush source before move */
- if(which & cppvFsnk) flush_dcache64((addr64_t)sink, csize, 1); /* If requested, flush sink before move */
-
- bcopy_phys((addr64_t)source, (addr64_t)sink, csize); /* Do a physical copy, virtually */
-
- if(which & cppvFsrc) flush_dcache64((addr64_t)source, csize, 1); /* If requested, flush source after move */
- if(which & cppvFsnk) flush_dcache64((addr64_t)sink, csize, 1); /* If requested, flush sink after move */
-
-
-/*
- * Note that for certain ram disk flavors, we may be copying outside of known memory.
- * Therefore, before we try to mark it modifed, we check if it exists.
- */
-
- if( !(which & cppvNoModSnk)) {
- if (phys_page_exists((ppnum_t)sink >> 12))
- mapping_set_mod((ppnum_t)(sink >> 12)); /* Make sure we know that it is modified */
- }
- if( !(which & cppvNoRefSrc)) {
- if (phys_page_exists((ppnum_t)source >> 12))
- mapping_set_ref((ppnum_t)(source >> 12)); /* Make sure we know that it is modified */
- }
-
-
- size = size - csize; /* Calculate what is left */
- vaddr = vaddr + csize; /* Move to next sink address */
- source = source + csize; /* Bump source to next physical address */
- sink = sink + csize; /* Bump sink to next physical address */
- }
-
- splx(s); /* Open up for interrupts */
-
- return KERN_SUCCESS;
-}
-
-void switch_to_serial_console(void)
-{
-}
addr64_t vm_last_addr;
void
cache_flush_page_phys(ppnum_t pa)
{
+ mapwindow_t *map;
boolean_t istate;
int i;
- unsigned int *cacheline_addr;
+ unsigned char *cacheline_addr;
int cacheline_size = cpuid_info()->cache_linesize;
int cachelines_in_page = PAGE_SIZE/cacheline_size;
- /*
- * If there's no clflush instruction, we're sadly forced to use wbinvd.
- */
- if (!(cpuid_features() & CPUID_FEATURE_CLFSH)) {
- asm volatile("wbinvd" : : : "memory");
- return;
- }
+ __mfence();
istate = ml_set_interrupts_enabled(FALSE);
- if (*(pt_entry_t *) CM2)
- panic("cache_flush_page_phys: CMAP busy");
-
- *(pt_entry_t *) CM2 = i386_ptob(pa) | INTEL_PTE_VALID;
- invlpg((u_int)CA2);
+ map = pmap_get_mapwindow((pt_entry_t)(i386_ptob(pa) | INTEL_PTE_VALID));
- for (i = 0, cacheline_addr = (unsigned int *)CA2;
+ for (i = 0, cacheline_addr = (unsigned char *)map->prv_CADDR;
i < cachelines_in_page;
i++, cacheline_addr += cacheline_size) {
- asm volatile("clflush %0" : : "m" (cacheline_addr));
+ __clflush((void *) cacheline_addr);
}
-
- *(pt_entry_t *) CM2 = 0;
+ pmap_put_mapwindow(map);
(void) ml_set_interrupts_enabled(istate);
+ __mfence();
+}
+
+
+#if !MACH_KDP
+void
+kdp_register_callout(void)
+{
}
+#endif
+#if !CONFIG_VMX
+int host_vmxon(boolean_t exclusive __unused)
+{
+ return VMX_UNSUPPORTED;
+}
+
+void host_vmxoff(void)
+{
+ return;
+}
+#endif
+
+#ifdef __LP64__
+
+#define INT_SIZE (BYTE_SIZE * sizeof (int))
+
+/*
+ * Set indicated bit in bit string.
+ */
+void
+setbit(int bitno, int *s)
+{
+ s[bitno / INT_SIZE] |= 1 << (bitno % INT_SIZE);
+}
+
+/*
+ * Clear indicated bit in bit string.
+ */
+void
+clrbit(int bitno, int *s)
+{
+ s[bitno / INT_SIZE] &= ~(1 << (bitno % INT_SIZE));
+}
+
+/*
+ * Test if indicated bit is set in bit string.
+ */
+int
+testbit(int bitno, int *s)
+{
+ return s[bitno / INT_SIZE] & (1 << (bitno % INT_SIZE));
+}
+
+/*
+ * Find first bit set in bit string.
+ */
+int
+ffsbit(int *s)
+{
+ int offset;
+
+ for (offset = 0; !*s; offset += (int)INT_SIZE, ++s);
+ return offset + __builtin_ctz(*s);
+}
+
+int
+ffs(unsigned int mask)
+{
+ if (mask == 0)
+ return 0;
+
+ /*
+ * NOTE: cannot use __builtin_ffs because it generates a call to
+ * 'ffs'
+ */
+ return 1 + __builtin_ctz(mask);
+}
+#endif
projects / apple / xnu.git / blobdiff