+#endif /* !PMAP_ENTER_OPTIONS */
+
+#ifndef PMAP_SET_CACHE_ATTR
+#define PMAP_SET_CACHE_ATTR(mem, object, cache_attr, batch_pmap_op) \
+ MACRO_BEGIN \
+ if (!batch_pmap_op) { \
+ pmap_set_cache_attributes(VM_PAGE_GET_PHYS_PAGE(mem), cache_attr); \
+ object->set_cache_attr = TRUE; \
+ } \
+ MACRO_END
+#endif /* PMAP_SET_CACHE_ATTR */
+
+#ifndef PMAP_BATCH_SET_CACHE_ATTR
+#if defined(__arm__) || defined(__arm64__)
+#define PMAP_BATCH_SET_CACHE_ATTR(object, user_page_list, \
+ cache_attr, num_pages, batch_pmap_op) \
+ MACRO_BEGIN \
+ if ((batch_pmap_op)) { \
+ unsigned int __page_idx=0; \
+ unsigned int res=0; \
+ boolean_t batch=TRUE; \
+ while (__page_idx < (num_pages)) { \
+ if (!pmap_batch_set_cache_attributes( \
+ user_page_list[__page_idx].phys_addr, \
+ (cache_attr), \
+ (num_pages), \
+ (__page_idx), \
+ FALSE, \
+ (&res))) { \
+ batch = FALSE; \
+ break; \
+ } \
+ __page_idx++; \
+ } \
+ __page_idx=0; \
+ res=0; \
+ while (__page_idx < (num_pages)) { \
+ if (batch) \
+ (void)pmap_batch_set_cache_attributes( \
+ user_page_list[__page_idx].phys_addr, \
+ (cache_attr), \
+ (num_pages), \
+ (__page_idx), \
+ TRUE, \
+ (&res)); \
+ else \
+ pmap_set_cache_attributes( \
+ user_page_list[__page_idx].phys_addr, \
+ (cache_attr)); \
+ __page_idx++; \
+ } \
+ (object)->set_cache_attr = TRUE; \
+ } \
+ MACRO_END
+#else
+#define PMAP_BATCH_SET_CACHE_ATTR(object, user_page_list, \
+ cache_attr, num_pages, batch_pmap_op) \
+ MACRO_BEGIN \
+ if ((batch_pmap_op)) { \
+ unsigned int __page_idx=0; \
+ while (__page_idx < (num_pages)) { \
+ pmap_set_cache_attributes( \
+ user_page_list[__page_idx].phys_addr, \
+ (cache_attr)); \
+ __page_idx++; \
+ } \
+ (object)->set_cache_attr = TRUE; \
+ } \
+ MACRO_END
+#endif
+#endif /* PMAP_BATCH_SET_CACHE_ATTR */
+
+#define PMAP_ENTER_CHECK(pmap, page) \
+{ \
+ if ((page)->vmp_error) { \
+ panic("VM page %p should not have an error\n", \
+ (page)); \
+ } \
+}