#include <i386/machine_cpu.h>
#include <i386/machine_routines.h>
#include <i386/lock.h>
-#include <i386/mp.h>
+#include <i386/lapic.h>
//#define TOPO_DEBUG 1
#if TOPO_DEBUG
#else
#define DBG(x...)
#endif
+void debug_topology_print(void);
+void validate_topology(void);
__private_extern__ void qsort(
void * array,
*/
for (i = 1; i < ncpus; i++) {
cpu_data_t *cpup = cpu_datap(i);
+ x86_core_t *core = cpup->lcpu.core;
+ x86_die_t *die = cpup->lcpu.die;
+ x86_pkg_t *pkg = cpup->lcpu.package;
+
+ assert(core != NULL);
+ assert(die != NULL);
+ assert(pkg != NULL);
if (cpup->cpu_number != i) {
kprintf("cpu_datap(%d):0x%08x local apic id 0x%x "
cpup->cpu_number);
}
cpup->cpu_number = i;
- cpup->lcpu.lnum = i;
+ cpup->lcpu.cpu_num = i;
+ cpup->lcpu.pnum = cpup->cpu_phys_number;
lapic_cpu_map(cpup->cpu_phys_number, i);
+ x86_set_lcpu_numbers(&cpup->lcpu);
+ x86_set_core_numbers(core, &cpup->lcpu);
+ x86_set_die_numbers(die, &cpup->lcpu);
+ x86_set_pkg_numbers(pkg, &cpup->lcpu);
}
+#if TOPO_DEBUG
+ debug_topology_print();
+#endif /* TOPO_DEBUG */
+ validate_topology();
+
ml_set_interrupts_enabled(istate);
+ DBG("cpu_topology_start() LLC is L%d\n", topoParms.LLCDepth + 1);
/*
* Iterate over all logical cpus finding or creating the affinity set
- * for their L2 cache. Each affinity set possesses a processor set
+ * for their LLC cache. Each affinity set possesses a processor set
* into which each logical processor is added.
*/
DBG("cpu_topology_start() creating affinity sets:\n");
for (i = 0; i < ncpus; i++) {
cpu_data_t *cpup = cpu_datap(i);
x86_lcpu_t *lcpup = cpu_to_lcpu(i);
- x86_cpu_cache_t *L2_cachep;
+ x86_cpu_cache_t *LLC_cachep;
x86_affinity_set_t *aset;
- L2_cachep = lcpup->caches[CPU_CACHE_DEPTH_L2];
- assert(L2_cachep->type == CPU_CACHE_TYPE_UNIF);
- aset = find_cache_affinity(L2_cachep);
+ LLC_cachep = lcpup->caches[topoParms.LLCDepth];
+ assert(LLC_cachep->type == CPU_CACHE_TYPE_UNIF);
+ aset = find_cache_affinity(LLC_cachep);
if (aset == NULL) {
aset = (x86_affinity_set_t *) kalloc(sizeof(*aset));
if (aset == NULL)
aset->next = x86_affinities;
x86_affinities = aset;
aset->num = x86_affinity_count++;
- aset->cache = L2_cachep;
+ aset->cache = LLC_cachep;
aset->pset = (i == master_cpu) ?
processor_pset(master_processor) :
pset_create(pset_node_root());
}
DBG("\tprocessor_init set %p(%d) lcpup %p(%d) cpu %p processor %p\n",
- aset, aset->num, lcpup, lcpup->lnum, cpup, cpup->cpu_processor);
+ aset, aset->num, lcpup, lcpup->cpu_num, cpup, cpup->cpu_processor);
if (i != master_cpu)
processor_init(cpup->cpu_processor, i, aset->pset);
if (affinity_num == aset->num)
break;
}
- return (aset == NULL) ? PROCESSOR_SET_NULL : aset->pset;
-
+ return (aset == NULL) ? PROCESSOR_SET_NULL : aset->pset;
}
uint64_t
if (level == 0) {
return machine_info.max_mem;
- } else if ( 1 <= level && level <= 3) {
+ } else if ( 1 <= level && level <= MAX_CACHE_DEPTH) {
cachep = current_cpu_datap()->lcpu.caches[level-1];
return cachep ? cachep->cache_size : 0;
} else {
if (level == 0) {
return machine_info.max_cpus;
- } else if ( 1 <= level && level <= 3) {
+ } else if ( 1 <= level && level <= MAX_CACHE_DEPTH) {
cachep = current_cpu_datap()->lcpu.caches[level-1];
return cachep ? cachep->nlcpus : 0;
} else {