/*
- * Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
+ * Copyright (c) 2000-2012 Apple Inc. All rights reserved.
*
- * @APPLE_LICENSE_HEADER_START@
- *
- * The contents of this file constitute Original Code as defined in and
- * are subject to the Apple Public Source License Version 1.1 (the
- * "License"). You may not use this file except in compliance with the
- * License. Please obtain a copy of the License at
- * http://www.apple.com/publicsource and read it before using this file.
- *
- * This Original Code and all software distributed under the License are
- * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
+ * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
+ *
+ * This file contains Original Code and/or Modifications of Original Code
+ * as defined in and that are subject to the Apple Public Source License
+ * Version 2.0 (the 'License'). You may not use this file except in
+ * compliance with the License. The rights granted to you under the License
+ * may not be used to create, or enable the creation or redistribution of,
+ * unlawful or unlicensed copies of an Apple operating system, or to
+ * circumvent, violate, or enable the circumvention or violation of, any
+ * terms of an Apple operating system software license agreement.
+ *
+ * Please obtain a copy of the License at
+ * http://www.opensource.apple.com/apsl/ and read it before using this file.
+ *
+ * The Original Code and all software distributed under the License are
+ * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
* EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the
- * License for the specific language governing rights and limitations
- * under the License.
- *
- * @APPLE_LICENSE_HEADER_END@
+ * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
+ * Please see the License for the specific language governing rights and
+ * limitations under the License.
+ *
+ * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
*/
/*
* @OSF_COPYRIGHT@
*/
-/*
+/*
* Mach Operating System
* Copyright (c) 1991 Carnegie Mellon University
* All Rights Reserved.
- *
+ *
* Permission to use, copy, modify and distribute this software and its
* documentation is hereby granted, provided that both the copyright
* notice and this permission notice appear in all copies of the
* software, derivative works or modified versions, and any portions
* thereof, and that both notices appear in supporting documentation.
- *
+ *
* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
* ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
- *
+ *
* Carnegie Mellon requests users of this software to return to
- *
+ *
* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
* School of Computer Science
* Carnegie Mellon University
* Pittsburgh PA 15213-3890
- *
- * any improvements or extensions that they make and grant Carnegie Mellon
+ *
+ * any improvements or extensions that they make and grant Carnegie Mellon
* the rights to redistribute these changes.
*/
-/*
- */
-
-#ifndef _I386_FPU_H_
-#define _I386_FPU_H_
+#ifndef _I386_FPU_H_
+#define _I386_FPU_H_
/*
* Macro definitions for routines to manipulate the
* floating-point processor.
*/
-
-#include <cpus.h>
-#include <i386/proc_reg.h>
-#include <i386/thread.h>
#include <kern/kern_types.h>
#include <mach/i386/kern_return.h>
#include <mach/i386/thread_status.h>
+#include <i386/proc_reg.h>
-/*
- * FPU instructions.
- */
-#define fninit() \
- __asm__ volatile("fninit")
-
-#define fnstcw(control) \
- __asm__("fnstcw %0" : "=m" (*(unsigned short *)(control)))
-
-#define fldcw(control) \
- __asm__ volatile("fldcw %0" : : "m" (*(unsigned short *) &(control)) )
-
-extern unsigned short fnstsw(void);
-
-extern __inline__ unsigned short fnstsw(void)
+#define FP_XMASK ((uint32_t) (XFEM_X87 | XFEM_SSE))
+#define AVX_XMASK ((uint32_t) (XFEM_X87 | XFEM_SSE | XFEM_YMM))
+#define AVX512_XMASK ((uint32_t) (XFEM_X87 | XFEM_SSE | XFEM_YMM | XFEM_ZMM))
+
+typedef enum {
+ FXSAVE32 = 1,
+ FXSAVE64 = 2,
+ XSAVE32 = 3,
+ XSAVE64 = 4,
+ FP_UNUSED = 5
+} fp_save_layout_t;
+
+#define STATE64_FULL 0x10
+typedef enum {
+ UNDEFINED,
+ FP,
+ AVX,
+ AVX512,
+ /*
+ * The following states are never associated with a thread or task.
+ * They are used for array declarations of data used during signal dispatch,
+ * but these values are never assigned to threads' (or tasks') xstate members.
+ */
+ UNDEFINED_FULL = UNDEFINED | STATE64_FULL,
+ FP_FULL = FP | STATE64_FULL,
+ AVX_FULL = AVX | STATE64_FULL,
+ AVX512_FULL = AVX512 | STATE64_FULL,
+} xstate_t;
+
+static inline uint64_t
+xgetbv(uint32_t c)
{
- unsigned short status;
- __asm__ volatile("fnstsw %0" : "=ma" (status));
- return(status);
+ uint32_t mask_hi, mask_lo;
+ __asm__ __volatile__ ("xgetbv" : "=a"(mask_lo), "=d"(mask_hi) : "c" (c));
+ return ((uint64_t) mask_hi << 32) + (uint64_t) mask_lo;
}
-#define fnclex() \
- __asm__ volatile("fnclex")
-
-#define fnsave(state) \
- __asm__ volatile("fnsave %0" : "=m" (*state))
-
-#define frstor(state) \
- __asm__ volatile("frstor %0" : : "m" (state))
-
-#define fwait() \
- __asm__("fwait");
-
-
-#define fpu_load_context(pcb)
-
-/*
- * Save thread`s FPU context.
- * If only one CPU, we just set the task-switched bit,
- * to keep the new thread from using the coprocessor.
- * If multiple CPUs, we save the entire state.
- */
-#if NCPUS > 1
-#define fpu_save_context(thread) \
- { \
- register struct i386_fpsave_state *ifps; \
- ifps = (thread)->top_act->mact.pcb->ims.ifps; \
- if (ifps != 0 && !ifps->fp_valid) { \
- /* registers are in FPU - save to memory */ \
- ifps->fp_valid = TRUE; \
- fnsave(&ifps->fp_save_state); \
- } \
- set_ts(); \
- }
-
-#else /* NCPUS == 1 */
-#define fpu_save_context(thread) \
- { \
- set_ts(); \
- }
-
-#endif /* NCPUS == 1 */
-
-
-extern int fp_kind;
-
-extern void init_fpu(void);
-extern void fpu_module_init(void);
-extern void fp_free(
- struct i386_fpsave_state * fps);
-extern kern_return_t fpu_set_state(
- thread_act_t thr_act,
- struct i386_float_state * st);
-extern kern_return_t fpu_get_state(
- thread_act_t thr_act,
- struct i386_float_state * st);
-extern void fpnoextflt(void);
-extern void fpextovrflt(void);
-extern void fpexterrflt(void);
-extern void fp_state_alloc(void);
-extern void fpintr(void);
-extern void fpflush(thread_act_t);
+static inline void
+xsetbv(uint32_t mask_hi, uint32_t mask_lo)
+{
+ __asm__ __volatile__ ("xsetbv" :: "a"(mask_lo), "d"(mask_hi), "c" (XCR0));
+}
-#endif /* _I386_FPU_H_ */
+extern void init_fpu(void);
+extern void fpu_module_init(void);
+extern void fpu_free(
+ thread_t thr_act,
+ void *fps);
+extern kern_return_t fpu_set_fxstate(
+ thread_t thr_act,
+ thread_state_t state,
+ thread_flavor_t f);
+extern kern_return_t fpu_get_fxstate(
+ thread_t thr_act,
+ thread_state_t state,
+ thread_flavor_t f);
+extern void fpu_dup_fxstate(
+ thread_t parent,
+ thread_t child);
+extern void fpnoextflt(void);
+extern void fpextovrflt(void);
+extern void fpexterrflt(void);
+extern void fpSSEexterrflt(void);
+extern void fpflush(thread_t);
+extern void fp_setvalid(boolean_t);
+
+extern void clear_fpu(void);
+extern void fpu_switch_context(
+ thread_t old,
+ thread_t new);
+extern void fpu_switch_addrmode(
+ thread_t thread,
+ boolean_t is_64bit);
+
+extern xstate_t fpu_default;
+extern xstate_t fpu_capability;
+extern xstate_t current_xstate(void);
+extern void fpUDflt(user_addr_t rip);
+#ifdef MACH_KERNEL_PRIVATE
+extern uint32_t thread_fpsimd_hash(thread_t);
+extern void vzeroall(void);
+extern void xmmzeroall(void);
+extern void avx512_zero(void);
+#endif /* MKP */
+#endif /* _I386_FPU_H_ */