* two processors at once (and the interrupt should serve to force out stores), and the second level
* handler should be synchonized by the work loop it runs on.
*/
* two processors at once (and the interrupt should serve to force out stores), and the second level
* handler should be synchonized by the work loop it runs on.
*/
#define IA_ADD_VALUE(target, value) \
(OSAddAtomic64((value), (target)))
#define IA_ADD_VALUE(target, value) \
(OSAddAtomic64((value), (target)))
/*
* As long as we are based on the simple reporter, all our channels will be 64 bits. Align the data
* to allow for safe atomic updates (we don't want to cross a cache line on any platform, but for some
/*
* As long as we are based on the simple reporter, all our channels will be 64 bits. Align the data
* to allow for safe atomic updates (we don't want to cross a cache line on any platform, but for some