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1 /*
2 * Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
3 *
4 * @APPLE_LICENSE_HEADER_START@
5 *
6 * The contents of this file constitute Original Code as defined in and
7 * are subject to the Apple Public Source License Version 1.1 (the
8 * "License"). You may not use this file except in compliance with the
9 * License. Please obtain a copy of the License at
10 * http://www.apple.com/publicsource and read it before using this file.
11 *
12 * This Original Code and all software distributed under the License are
13 * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
14 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
15 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the
17 * License for the specific language governing rights and limitations
18 * under the License.
19 *
20 * @APPLE_LICENSE_HEADER_END@
21 */
22 /*
23 * @OSF_FREE_COPYRIGHT@
24 */
25 /*
26 * @APPLE_FREE_COPYRIGHT@
27 */
28
29 /*
30 * Author: Bill Angell, Apple
31 * Date: 9/auht-aught
32 *
33 * Random diagnostics
34 */
35
36
37 #include <kern/machine.h>
38 #include <kern/processor.h>
39 #include <mach/machine.h>
40 #include <mach/processor_info.h>
41 #include <mach/mach_types.h>
42 #include <mach/boolean.h>
43 #include <kern/thread.h>
44 #include <kern/task.h>
45 #include <mach/vm_param.h>
46 #include <vm/vm_kern.h>
47 #include <vm/vm_map.h>
48 #include <vm/vm_page.h>
49 #include <vm/pmap.h>
50 #include <ppc/exception.h>
51 #include <ppc/Firmware.h>
52 #include <ppc/low_trace.h>
53 #include <ppc/db_low_trace.h>
54 #include <ppc/mappings.h>
55 #include <ppc/pmap.h>
56 #include <ppc/mem.h>
57 #include <ppc/pmap_internals.h>
58 #include <ppc/savearea.h>
59 #include <ppc/Diagnostics.h>
60 #include <ppc/machine_cpu.h>
61 #include <pexpert/pexpert.h>
62 #include <ppc/POWERMAC/video_console.h>
63 #include <ppc/trap.h>
64
65 extern struct vc_info vinfo;
66
67 kern_return_t testPerfTrap(int trapno, struct savearea *ss,
68 unsigned int dsisr, unsigned int dar);
69
70 int diagCall(struct savearea *save) {
71
72 union {
73 unsigned long long tbase;
74 unsigned int tb[2];
75 } ttt, adj;
76 natural_t tbu, tbu2, tbl;
77 struct per_proc_info *per_proc; /* Area for my per_proc address */
78 int cpu;
79 unsigned int tstrt, tend, temp, temp2;
80
81 if(!(dgWork.dgFlags & enaDiagSCs)) return 0; /* If not enabled, cause an exception */
82
83 switch(save->save_r3) { /* Select the routine */
84
85 /*
86 * Adjust the timebase for drift recovery testing
87 */
88 case dgAdjTB: /* Adjust the timebase */
89
90 adj.tb[0] = 0; /* Clear high part */
91 adj.tb[1] = save->save_r4; /* Set low order */
92 if(adj.tb[1] & 0x80000000) adj.tb[0] = 0xFFFFFFFF; /* Propagate sign bit */
93
94 do { /* Read current time */
95 asm volatile(" mftbu %0" : "=r" (tbu));
96 asm volatile(" mftb %0" : "=r" (tbl));
97 asm volatile(" mftbu %0" : "=r" (tbu2));
98 } while (tbu != tbu2);
99
100 ttt.tb[0] = tbu; /* Set high */
101 ttt.tb[1] = tbl; /* Set low */
102
103 ttt.tbase = ttt.tbase + adj.tbase; /* Increment or decrement the TB */
104
105 tbu = ttt.tb[0]; /* Save in regular variable */
106 tbl = ttt.tb[1]; /* Save in regular variable */
107
108 mttb(0); /* Set low to keep from ticking */
109 mttbu(tbu); /* Set adjusted high */
110 mttb(tbl); /* Set adjusted low */
111
112 return -1; /* Return no AST checking... */
113
114 /*
115 * Return physical address of a page
116 */
117 case dgLRA:
118
119 save->save_r3 = pmap_extract(current_act()->map->pmap, save->save_r4); /* Get read address */
120
121 return -1; /* Return no AST checking... */
122
123 /*
124 * Copy physical to virtual
125 */
126 case dgpcpy:
127
128 #if 0
129 save->save_r3 = copyp2v(save->save_r4, save->save_r5, save->save_r6); /* Copy the physical page */
130 #endif
131 return 1; /* Return and check for ASTs... */
132
133
134 /*
135 * Soft reset processor
136 */
137 case dgreset:
138
139 cpu = save->save_r4; /* Get the requested CPU number */
140
141 if(cpu >= NCPUS) { /* Check for bogus cpu */
142 save->save_r3 = KERN_FAILURE; /* Set failure */
143 return 1;
144 }
145
146 if(!machine_slot[cpu].running) return KERN_FAILURE; /* It is not running */
147
148 per_proc = &per_proc_info[cpu]; /* Point to the processor */
149
150 (void)PE_cpu_start(per_proc->cpu_id,
151 per_proc->start_paddr, (vm_offset_t)per_proc);
152
153 save->save_r3 = KERN_SUCCESS; /* Set scuuess */
154
155 return 1; /* Return and check for ASTs... */
156
157 /*
158 * Force cache flush
159 */
160 case dgFlush:
161
162 #if 1
163 cacheInit(); /* Blow cache */
164 #else
165 asm volatile(" mftb %0" : "=r" (tstrt));
166 tend = tstrt;
167 while((tend - tstrt) < 0x000A2837) {
168 asm volatile(" mftb %0" : "=r" (tend));
169 }
170
171 #endif
172 return 1; /* Return and check for ASTs... */
173
174 /*
175 * various hack tests
176 */
177 case dgtest:
178
179 if(save->save_r4) perfTrapHook = testPerfTrap;
180 else perfTrapHook = 0;
181
182 return 1; /* Return and check for ASTs... */
183
184
185
186 /*
187 * Create a physical block map into the current task
188 * Don't bother to check for any errors.
189 * parms - vaddr, paddr, size, prot, attributes
190 */
191 case dgBMphys:
192
193 pmap_map_block(current_act()->map->pmap, save->save_r4, save->save_r5, save->save_r6, /* Map in the block */
194 save->save_r7, save->save_r8, 0);
195
196 return 1; /* Return and check for ASTs... */
197
198
199 /*
200 * Remove any mapping from the current task
201 * Don't bother to check for any errors.
202 * parms - vaddr
203 */
204 case dgUnMap:
205
206 (void)mapping_remove(current_act()->map->pmap, save->save_r4); /* Remove mapping */
207 return 1; /* Return and check for ASTs... */
208
209
210 /*
211 * Allows direct control of alignment handling.
212 *
213 * The bottom two bits of the parameter are used to set the two control bits:
214 * 0b00 - !trapUnalignbit - !notifyUnalignbit - default - instruction is emulated
215 * 0b01 - !trapUnalignbit - notifyUnalignbit - emulation is done, but traps afterwards
216 * 0b10 - trapUnalignbit - !notifyUnalignbit - no emulation - causes exception
217 * 0b11 - trapUnalignbit - notifyUnalignbit - no emulation - causes exception
218 */
219 case dgAlign:
220
221 temp = current_act()->mact.specFlags; /* Save the old values */
222
223 temp = ((current_act()->mact.specFlags >> (31 - trapUnalignbit - 1)) /* Reformat them to pass back */
224 | (current_act()->mact.specFlags >> (31 - notifyUnalignbit))) & 3;
225
226 temp2 = ((save->save_r4 << (31 - trapUnalignbit - 1)) & trapUnalign) /* Move parms into flag format */
227 | ((save->save_r4 << (31 - notifyUnalignbit)) & notifyUnalign);
228
229 current_act()->mact.specFlags &= ~(trapUnalign | notifyUnalign); /* Clean the old ones */
230 current_act()->mact.specFlags |= temp2; /* Set the new ones */
231
232 per_proc_info[cpu_number()].spcFlags = current_act()->mact.specFlags;
233
234 save->save_r3 = temp;
235
236 return 1; /* Return and check for ASTs... */
237
238 /*
239 * Return info for boot screen
240 */
241 case dgBootScreen:
242
243 #if 0
244 ml_set_interrupts_enabled(1);
245 (void)copyout((char *)&vinfo, (char *)save->save_r4, sizeof(struct vc_info)); /* Copy out the video info */
246 ml_set_interrupts_enabled(0);
247 #endif
248 return 1; /* Return and check for ASTs... */
249
250
251 default: /* Handle invalid ones */
252 return 0; /* Return an exception */
253
254 }
255
256 };
257
258 kern_return_t testPerfTrap(int trapno, struct savearea *ss,
259 unsigned int dsisr, unsigned int dar) {
260
261 if(trapno != T_ALIGNMENT) return KERN_FAILURE;
262
263 kprintf("alignment exception at %08X, srr1 = %08X, dsisr = %08X, dar = %08X\n", ss->save_srr0,
264 ss->save_srr1, dsisr, dar);
265
266 return KERN_SUCCESS;
267
268 }