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36 #include <mach_assert.h>
38 #include <kern/assert.h>
39 #include <kern/kern_types.h>
40 #include <kern/queue.h>
41 #include <kern/processor.h>
43 #include <pexpert/pexpert.h>
44 #include <mach/i386/thread_status.h>
45 #include <mach/i386/vm_param.h>
46 #include <i386/locks.h>
47 #include <i386/rtclock_protos.h>
48 #include <i386/pmCPU.h>
49 #include <i386/cpu_topology.h>
53 #include <i386/vmx/vmx_cpu.h>
57 #include <machine/monotonic.h>
58 #endif /* MONOTONIC */
60 #include <machine/pal_routines.h>
63 * Data structures referenced (anonymously) from per-cpu data:
65 struct cpu_cons_buffer
;
66 struct cpu_desc_table
;
71 * Data structures embedded in per-cpu data:
73 typedef struct rtclock_timer
{
77 boolean_t has_expired
;
81 /* The 'u' suffixed fields store the double-mapped descriptor addresses */
82 struct x86_64_tss
*cdi_ktssu
;
83 struct x86_64_tss
*cdi_ktssb
;
84 x86_64_desc_register_t cdi_gdtu
;
85 x86_64_desc_register_t cdi_gdtb
;
86 x86_64_desc_register_t cdi_idtu
;
87 x86_64_desc_register_t cdi_idtb
;
88 struct fake_descriptor
*cdi_ldtu
;
89 struct fake_descriptor
*cdi_ldtb
;
90 vm_offset_t cdi_sstku
;
91 vm_offset_t cdi_sstkb
;
95 TASK_MAP_32BIT
, /* 32-bit user, compatibility mode */
96 TASK_MAP_64BIT
, /* 64-bit user thread, shared space */
101 * This structure is used on entry into the (uber-)kernel on syscall from
102 * a 64-bit user. It contains the address of the machine state save area
103 * for the current thread and a temporary place to save the user's rsp
104 * before loading this address into rsp.
107 addr64_t cu_isf
; /* thread->pcb->iss.isf */
108 uint64_t cu_tmp
; /* temporary scratch */
109 addr64_t cu_user_gs_base
;
112 typedef uint16_t pcid_t
;
113 typedef uint8_t pcid_ref_t
;
115 #define CPU_RTIME_BINS (12)
116 #define CPU_ITIME_BINS (CPU_RTIME_BINS)
118 #define MAXPLFRAMES (16)
122 uint64_t plbt
[MAXPLFRAMES
];
128 * Each processor has a per-cpu data area which is dereferenced through the
129 * current_cpu_datap() macro. For speed, the %gs segment is based here, and
130 * using this, inlines provides single-instruction access to frequently used
131 * members - such as get_cpu_number()/cpu_number(), and get_active_thread()/
134 * Cpu data owned by another processor can be accessed using the
135 * cpu_datap(cpu_number) macro which uses the cpu_data_ptr[] array of per-cpu
139 pcid_t cpu_pcid_free_hint
;
140 #define PMAP_PCID_MAX_PCID (0x800)
141 pcid_ref_t cpu_pcid_refcounts
[PMAP_PCID_MAX_PCID
];
142 pmap_t cpu_pcid_last_pmap_dispatched
[PMAP_PCID_MAX_PCID
];
145 typedef struct cpu_data
147 struct pal_cpu_data cpu_pal_data
; /* PAL-specific data */
148 #define cpu_pd cpu_pal_data /* convenience alias */
149 struct cpu_data
*cpu_this
; /* pointer to myself */
150 thread_t cpu_active_thread
;
151 thread_t cpu_nthread
;
152 volatile int cpu_preemption_level
;
153 int cpu_number
; /* Logical CPU */
154 void *cpu_int_state
; /* interrupt state */
155 vm_offset_t cpu_active_stack
; /* kernel stack base */
156 vm_offset_t cpu_kernel_stack
; /* kernel stack top */
157 vm_offset_t cpu_int_stack_top
;
158 int cpu_interrupt_level
;
159 volatile int cpu_signals
; /* IPI events */
160 volatile int cpu_prior_signals
; /* Last set of events,
163 ast_t cpu_pending_ast
;
164 volatile int cpu_running
;
166 boolean_t cpu_fixed_pmcs_enabled
;
167 #endif /* !MONOTONIC */
168 rtclock_timer_t rtclock_timer
;
169 uint64_t quantum_timer_deadline
;
170 volatile addr64_t cpu_active_cr3
__attribute((aligned(64)));
172 volatile uint32_t cpu_tlb_invalid
;
174 volatile uint16_t cpu_tlb_invalid_local
;
175 volatile uint16_t cpu_tlb_invalid_global
;
178 volatile task_map_t cpu_task_map
;
179 volatile addr64_t cpu_task_cr3
;
180 addr64_t cpu_kernel_cr3
;
181 volatile addr64_t cpu_ucr3
;
182 boolean_t cpu_pagezero_mapped
;
184 /* Double-mapped per-CPU exception stack address */
186 /* Address of shadowed, partially mirrored CPU data structures located
187 * in the double mapped PML4
190 struct processor
*cpu_processor
;
191 #if NCOPY_WINDOWS > 0
192 struct cpu_pmap
*cpu_pmap
;
194 struct real_descriptor
*cpu_ldtp
;
195 struct cpu_desc_table
*cpu_desc_tablep
;
196 cpu_desc_index_t cpu_desc_index
;
198 #if NCOPY_WINDOWS > 0
199 vm_offset_t cpu_copywindow_base
;
200 uint64_t *cpu_copywindow_pdp
;
202 vm_offset_t cpu_physwindow_base
;
203 uint64_t *cpu_physwindow_ptep
;
206 #define HWINTCNT_SIZE 256
207 uint32_t cpu_hwIntCnt
[HWINTCNT_SIZE
]; /* Interrupt counts */
208 uint64_t cpu_hwIntpexits
[HWINTCNT_SIZE
];
209 uint64_t cpu_dr7
; /* debug control register */
210 uint64_t cpu_int_event_time
; /* intr entry/exit time */
211 pal_rtc_nanotime_t
*cpu_nanotime
; /* Nanotime info */
213 /* double-buffered performance counter data */
214 uint64_t *cpu_kpc_buf
[2];
215 /* PMC shadow and reload value buffers */
216 uint64_t *cpu_kpc_shadow
;
217 uint64_t *cpu_kpc_reload
;
220 struct mt_cpu cpu_monotonic
;
221 #endif /* MONOTONIC */
222 uint32_t cpu_pmap_pcid_enabled
;
223 pcid_t cpu_active_pcid
;
224 pcid_t cpu_last_pcid
;
225 pcid_t cpu_kernel_pcid
;
226 volatile pcid_ref_t
*cpu_pmap_pcid_coherentp
;
227 volatile pcid_ref_t
*cpu_pmap_pcid_coherentp_kernel
;
228 pcid_cdata_t
*cpu_pcid_data
;
230 uint64_t cpu_pmap_pcid_flushes
;
231 uint64_t cpu_pmap_pcid_preserves
;
238 uint64_t cpu_itime_total
;
239 uint64_t cpu_rtime_total
;
241 uint64_t cpu_idle_exits
;
242 uint64_t cpu_rtimes
[CPU_RTIME_BINS
];
243 uint64_t cpu_itimes
[CPU_ITIME_BINS
];
245 uint64_t cpu_cur_insns
;
246 uint64_t cpu_cur_ucc
;
247 uint64_t cpu_cur_urc
;
248 #endif /* !MONOTONIC */
249 uint64_t cpu_gpmcs
[4];
250 uint64_t cpu_max_observed_int_latency
;
251 int cpu_max_observed_int_latency_vector
;
252 volatile boolean_t cpu_NMI_acknowledged
;
253 uint64_t debugger_entry_time
;
254 uint64_t debugger_ipi_time
;
255 /* A separate nested interrupt stack flag, to account
256 * for non-nested interrupts arriving while on the interrupt stack
257 * Currently only occurs when AICPM enables interrupts on the
258 * interrupt stack during processor offlining.
260 uint32_t cpu_nested_istack
;
261 uint32_t cpu_nested_istack_events
;
262 x86_saved_state64_t
*cpu_fatal_trap_state
;
263 x86_saved_state64_t
*cpu_post_fatal_trap_state
;
265 vmx_cpu_t cpu_vmx
; /* wonderful world of virtualization */
268 struct mca_state
*cpu_mca_state
; /* State at MC fault */
270 struct prngContext
*cpu_prng
; /* PRNG's context */
275 boolean_t cpu_boot_complete
;
277 #define MAX_PREEMPTION_RECORDS (8)
278 #if DEVELOPMENT || DEBUG
280 plrecord_t plrecords
[MAX_PREEMPTION_RECORDS
];
282 void *cpu_console_buf
;
283 struct x86_lcpu lcpu
;
284 int cpu_phys_number
; /* Physical CPU */
285 cpu_id_t cpu_id
; /* Platform Expert */
287 uint64_t cpu_entry_cr3
;
288 uint64_t cpu_exit_cr3
;
289 uint64_t cpu_pcid_last_cr3
;
293 extern cpu_data_t
*cpu_data_ptr
[];
295 /* Macro to generate inline bodies to retrieve per-cpu data fields. */
296 #if defined(__clang__)
297 #define GS_RELATIVE volatile __attribute__((address_space(256)))
299 #define offsetof(TYPE,MEMBER) __builtin_offsetof(TYPE,MEMBER)
302 #define CPU_DATA_GET(member,type) \
303 cpu_data_t GS_RELATIVE *cpu_data = \
304 (cpu_data_t GS_RELATIVE *)0UL; \
306 ret = cpu_data->member; \
309 #define CPU_DATA_GET_INDEX(member,index,type) \
310 cpu_data_t GS_RELATIVE *cpu_data = \
311 (cpu_data_t GS_RELATIVE *)0UL; \
313 ret = cpu_data->member[index]; \
316 #define CPU_DATA_SET(member,value) \
317 cpu_data_t GS_RELATIVE *cpu_data = \
318 (cpu_data_t GS_RELATIVE *)0UL; \
319 cpu_data->member = value;
321 #define CPU_DATA_XCHG(member,value,type) \
322 cpu_data_t GS_RELATIVE *cpu_data = \
323 (cpu_data_t GS_RELATIVE *)0UL; \
325 ret = cpu_data->member; \
326 cpu_data->member = value; \
329 #else /* !defined(__clang__) */
332 #define offsetof(TYPE,MEMBER) ((size_t) &((TYPE *)0)->MEMBER)
333 #endif /* offsetof */
334 #define CPU_DATA_GET(member,type) \
336 __asm__ volatile ("mov %%gs:%P1,%0" \
338 : "i" (offsetof(cpu_data_t,member))); \
341 #define CPU_DATA_GET_INDEX(member,index,type) \
343 __asm__ volatile ("mov %%gs:(%1),%0" \
345 : "r" (offsetof(cpu_data_t,member[index]))); \
348 #define CPU_DATA_SET(member,value) \
349 __asm__ volatile ("mov %0,%%gs:%P1" \
351 : "r" (value), "i" (offsetof(cpu_data_t,member)));
353 #define CPU_DATA_XCHG(member,value,type) \
355 __asm__ volatile ("xchg %0,%%gs:%P1" \
357 : "i" (offsetof(cpu_data_t,member)), "0" (value)); \
360 #endif /* !defined(__clang__) */
363 * Everyone within the osfmk part of the kernel can use the fast
364 * inline versions of these routines. Everyone outside, must call
367 static inline thread_t
368 get_active_thread(void)
370 CPU_DATA_GET(cpu_active_thread
,thread_t
)
372 #define current_thread_fast() get_active_thread()
373 #define current_thread() current_thread_fast()
375 #define cpu_mode_is64bit() TRUE
378 get_preemption_level(void)
380 CPU_DATA_GET(cpu_preemption_level
,int)
383 get_interrupt_level(void)
385 CPU_DATA_GET(cpu_interrupt_level
,int)
390 CPU_DATA_GET(cpu_number
,int)
393 get_cpu_phys_number(void)
395 CPU_DATA_GET(cpu_phys_number
,int)
398 static inline cpu_data_t
*
399 current_cpu_datap(void) {
400 CPU_DATA_GET(cpu_this
, cpu_data_t
*);
404 * Facility to diagnose preemption-level imbalances, which are otherwise
405 * challenging to debug. On each operation that enables or disables preemption,
406 * we record a backtrace into a per-CPU ring buffer, along with the current
407 * preemption level and operation type. Thus, if an imbalance is observed,
408 * one can examine these per-CPU records to determine which codepath failed
409 * to re-enable preemption, enabled premption without a corresponding
410 * disablement etc. The backtracer determines which stack is currently active,
411 * and uses that to perform bounds checks on unterminated stacks.
412 * To enable, sysctl -w machdep.pltrace=1 on DEVELOPMENT or DEBUG kernels (DRK '15)
413 * The bounds check currently doesn't account for non-default thread stack sizes.
415 #if DEVELOPMENT || DEBUG
416 static inline void pltrace_bt(uint64_t *rets
, int maxframes
, uint64_t stacklo
, uint64_t stackhi
) {
417 uint64_t *cfp
= (uint64_t *) __builtin_frame_address(0);
420 assert(stacklo
!=0 && stackhi
!=0);
422 for (plbtf
= 0; plbtf
< maxframes
; plbtf
++) {
423 if (((uint64_t)cfp
== 0) || (((uint64_t)cfp
< stacklo
) || ((uint64_t)cfp
> stackhi
))) {
427 rets
[plbtf
] = *(cfp
+ 1);
428 cfp
= (uint64_t *) (*cfp
);
433 extern uint32_t low_intstack
[]; /* bottom */
434 extern uint32_t low_eintstack
[]; /* top */
435 extern char mp_slave_stack
[PAGE_SIZE
];
437 static inline void pltrace_internal(boolean_t enable
) {
438 cpu_data_t
*cdata
= current_cpu_datap();
439 int cpli
= cdata
->cpu_preemption_level
;
440 int cplrecord
= cdata
->cpu_plri
;
441 uint64_t kstackb
, kstackt
, *plbts
;
445 cdata
->plrecords
[cplrecord
].pltype
= enable
;
446 cdata
->plrecords
[cplrecord
].plevel
= cpli
;
448 plbts
= &cdata
->plrecords
[cplrecord
].plbt
[0];
452 if (cplrecord
>= MAX_PREEMPTION_RECORDS
) {
456 cdata
->cpu_plri
= cplrecord
;
457 /* Obtain the 'current' program counter, initial backtrace
458 * element. This will also indicate if we were unable to
459 * trace further up the stack for some reason
461 __asm__
volatile("leaq 1f(%%rip), %%rax; mov %%rax, %0\n1:"
467 thread_t cplthread
= cdata
->cpu_active_thread
;
470 __asm__
__volatile__ ("movq %%rsp, %0": "=r" (csp
):);
471 /* Determine which stack we're on to populate stack bounds.
472 * We don't need to trace across stack boundaries for this
475 kstackb
= cdata
->cpu_active_stack
;
476 kstackt
= kstackb
+ KERNEL_STACK_SIZE
;
477 if (csp
< kstackb
|| csp
> kstackt
) {
478 kstackt
= cdata
->cpu_kernel_stack
;
479 kstackb
= kstackb
- KERNEL_STACK_SIZE
;
480 if (csp
< kstackb
|| csp
> kstackt
) {
481 kstackt
= cdata
->cpu_int_stack_top
;
482 kstackb
= kstackt
- INTSTACK_SIZE
;
483 if (csp
< kstackb
|| csp
> kstackt
) {
484 kstackt
= (uintptr_t)low_eintstack
;
485 kstackb
= (uintptr_t)low_eintstack
- INTSTACK_SIZE
;
486 if (csp
< kstackb
|| csp
> kstackt
) {
487 kstackb
= (uintptr_t) mp_slave_stack
;
488 kstackt
= (uintptr_t) mp_slave_stack
+ PAGE_SIZE
;
495 pltrace_bt(&plbts
[1], MAXPLFRAMES
- 1, kstackb
, kstackt
);
500 extern int plctrace_enabled
;
501 #endif /* DEVELOPMENT || DEBUG */
503 static inline void pltrace(boolean_t plenable
) {
504 #if DEVELOPMENT || DEBUG
505 if (__improbable(plctrace_enabled
!= 0)) {
506 pltrace_internal(plenable
);
514 disable_preemption_internal(void) {
515 assert(get_preemption_level() >= 0);
517 #if defined(__clang__)
518 cpu_data_t GS_RELATIVE
*cpu_data
= (cpu_data_t GS_RELATIVE
*)0UL;
519 cpu_data
->cpu_preemption_level
++;
521 __asm__
volatile ("incl %%gs:%P0"
523 : "i" (offsetof(cpu_data_t
, cpu_preemption_level
)));
529 enable_preemption_internal(void) {
530 assert(get_preemption_level() > 0);
532 #if defined(__clang__)
533 cpu_data_t GS_RELATIVE
*cpu_data
= (cpu_data_t GS_RELATIVE
*)0UL;
534 if (0 == --cpu_data
->cpu_preemption_level
)
535 kernel_preempt_check();
537 __asm__
volatile ("decl %%gs:%P0 \n\t"
539 "call _kernel_preempt_check \n\t"
542 : "i" (offsetof(cpu_data_t
, cpu_preemption_level
))
543 : "eax", "ecx", "edx", "cc", "memory");
548 enable_preemption_no_check(void)
550 assert(get_preemption_level() > 0);
553 #if defined(__clang__)
554 cpu_data_t GS_RELATIVE
*cpu_data
= (cpu_data_t GS_RELATIVE
*)0UL;
555 cpu_data
->cpu_preemption_level
--;
557 __asm__
volatile ("decl %%gs:%P0"
559 : "i" (offsetof(cpu_data_t
, cpu_preemption_level
))
565 _enable_preemption_no_check(void) {
566 enable_preemption_no_check();
570 mp_disable_preemption(void)
572 disable_preemption_internal();
576 _mp_disable_preemption(void)
578 disable_preemption_internal();
582 mp_enable_preemption(void)
584 enable_preemption_internal();
588 _mp_enable_preemption(void) {
589 enable_preemption_internal();
593 mp_enable_preemption_no_check(void) {
594 enable_preemption_no_check();
598 _mp_enable_preemption_no_check(void) {
599 enable_preemption_no_check();
602 #ifdef XNU_KERNEL_PRIVATE
603 #define disable_preemption() disable_preemption_internal()
604 #define enable_preemption() enable_preemption_internal()
605 #define MACHINE_PREEMPTION_MACROS (1)
608 static inline cpu_data_t
*
610 return cpu_data_ptr
[cpu
];
614 cpu_is_running(int cpu
) {
615 return ((cpu_datap(cpu
) != NULL
) && (cpu_datap(cpu
)->cpu_running
));
618 #ifdef MACH_KERNEL_PRIVATE
619 static inline cpu_data_t
*
620 cpu_shadowp(int cpu
) {
621 return cpu_data_ptr
[cpu
]->cd_shadow
;
625 extern cpu_data_t
*cpu_data_alloc(boolean_t is_boot_cpu
);
626 extern void cpu_data_realloc(void);
628 #endif /* I386_CPU_DATA */