pexpert/pexpert/ppc/protos.h

   1 /*
   2  * Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
   3  *
   4  * @APPLE_LICENSE_HEADER_START@
   5  *
   6  * The contents of this file constitute Original Code as defined in and
   7  * are subject to the Apple Public Source License Version 1.1 (the
   8  * "License").  You may not use this file except in compliance with the
   9  * License.  Please obtain a copy of the License at
  10  * http://www.apple.com/publicsource and read it before using this file.
  11  *
  12  * This Original Code and all software distributed under the License are
  13  * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
  14  * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
  15  * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT.  Please see the
  17  * License for the specific language governing rights and limitations
  18  * under the License.
  19  *
  20  * @APPLE_LICENSE_HEADER_END@
  21  */
  22 #ifndef _PEXPERT_PPC_PROTOS_H_
  23 #define _PEXPERT_PPC_PROTOS_H_
  24
  25 #define mtibatu(n, reg) __asm__ volatile("mtibatu " # n ", %0" : : "r" (reg))
  26 #define mtibatl(n, reg) __asm__ volatile("mtibatl " # n ", %0" : : "r" (reg))
  27
  28 #define mtdbatu(n, reg) __asm__ volatile("mtdbatu " # n ", %0" : : "r" (reg))
  29 #define mtdbatl(n, reg) __asm__ volatile("mtdbatl " # n ", %0" : : "r" (reg))
  30
  31 #define mfibatu(reg, n) __asm__ volatile("mfibatu %0, " # n : "=r" (reg))
  32 #define mfibatl(reg, n) __asm__ volatile("mfibatl %0, " # n : "=r" (reg))
  33
  34 #define mfdbatu(reg, n) __asm__ volatile("mfdbatu %0, " # n : "=r" (reg))
  35 #define mfdbatl(reg, n) __asm__ volatile("mfdbatl %0, " # n : "=r" (reg))
  36
  37 #define mtsprg(n, reg)  __asm__ volatile("mtsprg  " # n ", %0" : : "r" (reg))
  38 #define mfsprg(reg, n)  __asm__ volatile("mfsprg  %0, " # n : "=r" (reg))
  39
  40 #define mtspr(spr, val)  __asm__ volatile("mtspr  " # spr ", %0" : : "r" (val))
  41 #define mfspr(reg, spr)  __asm__ volatile("mfspr  %0, " # spr : "=r" (reg))
  42
  43 /*
  44  * Various memory/IO synchronisation instructions
  45  */
  46
  47         /*      Use eieio as a memory barrier to order stores.
  48          *      Useful for device control and PTE maintenance.
  49          */
  50
  51 #define eieio() \
  52         __asm__ volatile("eieio")
  53
  54         /*      Use sync to ensure previous stores have completed.
  55                 This is  required when manipulating locks and/or
  56                 maintaining PTEs or other shared structures on SMP
  57                 machines.
  58         */
  59
  60 #define sync() \
  61         __asm__ volatile("sync")
  62
  63         /*      Use isync to sychronize context; that is, the ensure
  64                 no prefetching of instructions happen before the
  65                 instruction.
  66         */
  67
  68 #define isync() \
  69         __asm__ volatile("isync")
  70
  71
  72 //------------------------------------------------------------------------
  73 // from ppc/endian.h
  74 static __inline__ unsigned int byte_reverse_word(unsigned int word);
  75 static __inline__ unsigned int byte_reverse_word(unsigned int word) {
  76         unsigned int result;
  77         __asm__ volatile("lwbrx %0, 0, %1" : "=r" (result) : "r" (&word));
  78         return result;
  79 }
  80
  81 //------------------------------------------------------------------------
  82 // from ppc/serial_io.h
  83 extern void initialize_serial(void * scc_phys_base);
  84
  85
  86 //------------------------------------------------------------------------
  87 // from ppc/POWERMAC/device_tree.h
  88 extern void ofw_init(void *);
  89
  90 //------------------------------------------------------------------------
  91 // from osfmk/ppc/POWERMAC/video_console.c
  92
  93 extern void initialize_screen(void *, unsigned int);
  94
  95 extern boolean_t vc_progress_initialize( void * desc,
  96                                          const unsigned char * data,
  97                                          const unsigned char * clut );
  98
  99 extern void vc_display_icon( void * desc,
 100                              const unsigned char * data );
 101
 102 // from osfmk/ppc/serial_console.c
 103 extern int  switch_to_serial_console(void);
 104 extern void switch_to_old_console(int old_console);
 105
 106 //------------------------------------------------------------------------
 107 // from ppc/spl.h
 108  /* Note also : if any new SPL's are introduced, please add to debugging list*/
 109 #define SPLOFF          0       /* all interrupts disabled TODO NMGS  */
 110 #define SPLPOWER        1       /* power failure (unused) */
 111 #define SPLHIGH         2       /* TODO NMGS any non-zero, non-INTPRI value */
 112 #define SPLSCHED        SPLHIGH
 113 #define SPLCLOCK        SPLSCHED /* hard clock */
 114 #define SPLVM           4       /* pmap manipulations */
 115 #define SPLBIO          8       /* block I/O */
 116 #define SPLIMP          8       /* network & malloc */
 117 #define SPLTTY          16      /* TTY */
 118 #define SPLNET          24      /* soft net */
 119 #define SPLSCLK         27      /* soft clock */
 120 #define SPLLO           32      /* no interrupts masked */
 121
 122 /* internal - masked in to spl level if ok to lower priority (splx, splon)
 123  * the mask bit is never seen externally
 124  */
 125 #define SPL_LOWER_MASK  0x8000
 126
 127 #define SPL_CMP_GT(a, b)        ((unsigned)(a) >  (unsigned)(b))
 128 #define SPL_CMP_LT(a, b)        ((unsigned)(a) <  (unsigned)(b))
 129 #define SPL_CMP_GE(a, b)        ((unsigned)(a) >= (unsigned)(b))
 130 #define SPL_CMP_LE(a, b)        ((unsigned)(a) <= (unsigned)(b))
 131
 132 typedef unsigned spl_t;
 133
 134 //------------------------------------------------------------------------
 135 // from bsd/dev/ppc/busses.h which clashes with mach/device/device_types.h
 136 typedef int             io_req_t;
 137
 138
 139 //typedef struct ipc_port         *ipc_port_t;
 140
 141 extern void            cninit(void);
 142
 143 /*
 144  *      Temporarily stolen from Firmware.h
 145  */
 146
 147 void dbgDisp(unsigned int port, unsigned int id, unsigned int data);
 148 void dbgDispLL(unsigned int port, unsigned int id, unsigned int data);
 149 void fwSCCinit(unsigned int port);
 150
 151 extern void dbgTrace(unsigned int item1, unsigned int item2, unsigned int item3);
 152 #if 1           /* (TEST/DEBUG) - eliminate inline */
 153 extern __inline__ void dbgTrace(unsigned int item1, unsigned int item2, unsigned int item3) {
 154
 155                 __asm__ volatile("mr   r3,%0" : : "r" (item1) : "r3");
 156                 __asm__ volatile("mr   r4,%0" : : "r" (item2) : "r4");
 157                 __asm__ volatile("mr   r5,%0" : : "r" (item3) : "r5");
 158 #ifdef __ELF__
 159         __asm__ volatile("lis  r0,CutTrace@h" : : : "r0");
 160         __asm__ volatile("ori  r0,r0,CutTrace@l" : : : "r0");
 161 #else
 162         __asm__ volatile("lis  r0,hi16(CutTrace)" : : : "r0");
 163         __asm__ volatile("ori  r0,r0,lo16(CutTrace)" : : : "r0");
 164 #endif
 165         __asm__ volatile("sc");
 166                 return;
 167 }
 168 #endif
 169
 170 extern void DoPreempt(void);
 171 extern __inline__ void DoPreempt(void) {
 172 #ifdef __ELF__
 173         __asm__ volatile("lis  r0,DoPreemptCall@h" : : : "r0");
 174         __asm__ volatile("ori  r0,r0,DoPreemptCall@l" : : : "r0");
 175 #else
 176         __asm__ volatile("lis  r0,hi16(DoPreemptCall)" : : : "r0");
 177         __asm__ volatile("ori  r0,r0,lo16(DoPreemptCall)" : : : "r0");
 178 #endif
 179         __asm__ volatile("sc");
 180                 return;
 181 }
 182
 183 extern void CreateFakeIO(void);
 184 extern __inline__ void CreateFakeIO(void) {
 185 #ifdef __ELF__
 186         __asm__ volatile("lis  r0,CreateFakeIOCall@h" : : : "r0");
 187         __asm__ volatile("ori  r0,r0,CreateFakeIOCall@l" : : : "r0");
 188 #else
 189         __asm__ volatile("lis  r0,hi16(CreateFakeIOCall)" : : : "r0");
 190         __asm__ volatile("ori  r0,r0,lo16(CreateFakeIOCall)" : : : "r0");
 191 #endif
 192          __asm__ volatile("sc");
 193                 return;
 194 }
 195
 196 extern void StoreReal(unsigned int val, unsigned int addr);
 197 extern void ReadReal(unsigned int raddr, unsigned int *vaddr);
 198 extern void ClearReal(unsigned int addr, unsigned int lgn);
 199 extern void LoadDBATs(unsigned int *bat);
 200 extern void LoadIBATs(unsigned int *bat);
 201 extern unsigned int LLTraceSet(unsigned int tflags);
 202 extern void GratefulDebInit(void);
 203 extern void GratefulDebDisp(unsigned int coord, unsigned int data);
 204 extern void checkNMI(void);
 205
 206 /*
 207  *      Temporarily stolen from ppc/cpu_number.h
 208  */
 209 int cpu_number(void);
 210
 211 #endif /* _PEXPERT_PPC_PROTOS_H_ */