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1 /*
2 * Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
3 *
4 * @APPLE_LICENSE_HEADER_START@
5 *
6 * The contents of this file constitute Original Code as defined in and
7 * are subject to the Apple Public Source License Version 1.1 (the
8 * "License"). You may not use this file except in compliance with the
9 * License. Please obtain a copy of the License at
10 * http://www.apple.com/publicsource and read it before using this file.
11 *
12 * This Original Code and all software distributed under the License are
13 * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
14 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
15 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the
17 * License for the specific language governing rights and limitations
18 * under the License.
19 *
20 * @APPLE_LICENSE_HEADER_END@
21 */
22 /*
23 * Copyright 1996 1995 by Open Software Foundation, Inc. 1997 1996 1995 1994 1993 1992 1991
24 * All Rights Reserved
25 *
26 * Permission to use, copy, modify, and distribute this software and
27 * its documentation for any purpose and without fee is hereby granted,
28 * provided that the above copyright notice appears in all copies and
29 * that both the copyright notice and this permission notice appear in
30 * supporting documentation.
31 *
32 * OSF DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE
33 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
34 * FOR A PARTICULAR PURPOSE.
35 *
36 * IN NO EVENT SHALL OSF BE LIABLE FOR ANY SPECIAL, INDIRECT, OR
37 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
38 * LOSS OF USE, DATA OR PROFITS, WHETHER IN ACTION OF CONTRACT,
39 * NEGLIGENCE, OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION
40 * WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
41 *
42 */
43 /*
44 * Copyright 1996 1995 by Apple Computer, Inc. 1997 1996 1995 1994 1993 1992 1991
45 * All Rights Reserved
46 *
47 * Permission to use, copy, modify, and distribute this software and
48 * its documentation for any purpose and without fee is hereby granted,
49 * provided that the above copyright notice appears in all copies and
50 * that both the copyright notice and this permission notice appear in
51 * supporting documentation.
52 *
53 * APPLE COMPUTER DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE
54 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
55 * FOR A PARTICULAR PURPOSE.
56 *
57 * IN NO EVENT SHALL APPLE COMPUTER BE LIABLE FOR ANY SPECIAL, INDIRECT, OR
58 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
59 * LOSS OF USE, DATA OR PROFITS, WHETHER IN ACTION OF CONTRACT,
60 * NEGLIGENCE, OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION
61 * WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
62 */
63 /*
64 * MKLINUX-1.0DR2
65 */
66 /*
67 * PMach Operating System
68 * Copyright (c) 1995 Santa Clara University
69 * All Rights Reserved.
70 */
71 /*
72 * Mach Operating System
73 * Copyright (c) 1991,1990,1989 Carnegie Mellon University
74 * All Rights Reserved.
75 *
76 * Permission to use, copy, modify and distribute this software and its
77 * documentation is hereby granted, provided that both the copyright
78 * notice and this permission notice appear in all copies of the
79 * software, derivative works or modified versions, and any portions
80 * thereof, and that both notices appear in supporting documentation.
81 *
82 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
83 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
84 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
85 *
86 * Carnegie Mellon requests users of this software to return to
87 *
88 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
89 * School of Computer Science
90 * Carnegie Mellon University
91 * Pittsburgh PA 15213-3890
92 *
93 * any improvements or extensions that they make and grant Carnegie Mellon
94 * the rights to redistribute these changes.
95 */
96 /*
97 * File: if_3c501.h
98 * Author: Philippe Bernadat
99 * Date: 1989
100 * Copyright (c) 1989 OSF Research Institute
101 *
102 * 3COM Etherlink 3C501 Mach Ethernet drvier
103 */
104 /*
105 Copyright 1990 by Open Software Foundation,
106 Cambridge, MA.
107
108 All Rights Reserved
109
110 Permission to use, copy, modify, and distribute this software and
111 its documentation for any purpose and without fee is hereby granted,
112 provided that the above copyright notice appears in all copies and
113 that both the copyright notice and this permission notice appear in
114 supporting documentation, and that the name of OSF or Open Software
115 Foundation not be used in advertising or publicity pertaining to
116 distribution of the software without specific, written prior
117 permission.
118
119 OSF DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE
120 INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS,
121 IN NO EVENT SHALL OSF BE LIABLE FOR ANY SPECIAL, INDIRECT, OR
122 CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
123 LOSS OF USE, DATA OR PROFITS, WHETHER IN ACTION OF CONTRACT,
124 NEGLIGENCE, OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION
125 WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
126 */
127
128
129
130 #define ENETPAD(n) char n[15]
131
132 /* 0x50f0a000 */
133 struct mace_board {
134 volatile unsigned char rcvfifo; /* 00 receive fifo */
135 ENETPAD(epad0);
136 volatile unsigned char xmtfifo; /* 01 transmit fifo */
137 ENETPAD(epad1);
138 volatile unsigned char xmtfc; /* 02 transmit frame control */
139 ENETPAD(epad2);
140 volatile unsigned char xmtfs; /* 03 transmit frame status */
141 ENETPAD(epad3);
142 volatile unsigned char xmtrc; /* 04 transmit retry count */
143 ENETPAD(epad4);
144 volatile unsigned char rcvfc; /* 05 receive frame control -- 4 bytes */
145 ENETPAD(epad5);
146 volatile unsigned char rcvfs; /* 06 receive frame status */
147 ENETPAD(epad6);
148 volatile unsigned char fifofc; /* 07 fifo frame count */
149 ENETPAD(epad7);
150 volatile unsigned char ir; /* 08 interrupt */
151 ENETPAD(epad8);
152 volatile unsigned char imr; /* 09 interrupt mask */
153 ENETPAD(epad9);
154 volatile unsigned char pr; /* 10 poll */
155 ENETPAD(epad10);
156 volatile unsigned char biucc; /* 11 bus interface unit configuration control */
157 ENETPAD(epad11);
158 volatile unsigned char fifocc; /* 12 fifo configuration control */
159 ENETPAD(epad12);
160 volatile unsigned char maccc; /* 13 media access control configuration control */
161 ENETPAD(epad13);
162 volatile unsigned char plscc; /* 14 physical layer signalling configuration control */
163 ENETPAD(epad14);
164 volatile unsigned char phycc; /* 15 physical layer configuration control */
165 ENETPAD(epad15);
166 volatile unsigned char chipid1; /* 16 chip identification LSB */
167 ENETPAD(epad16);
168 volatile unsigned char chipid2; /* 17 chip identification MSB */
169 ENETPAD(epad17);
170 volatile unsigned char iac; /* 18 internal address configuration */
171 ENETPAD(epad18);
172 volatile unsigned char res1; /* 19 */
173 ENETPAD(epad19);
174 volatile unsigned char ladrf; /* 20 logical address filter -- 8 bytes */
175 ENETPAD(epad20);
176 volatile unsigned char padr; /* 21 physical address -- 6 bytes */
177 ENETPAD(epad21);
178 volatile unsigned char res2; /* 22 */
179 ENETPAD(epad22);
180 volatile unsigned char res3; /* 23 */
181 ENETPAD(epad23);
182 volatile unsigned char mpc; /* 24 missed packet count */
183 ENETPAD(epad24);
184 volatile unsigned char res4; /* 25 */
185 ENETPAD(epad25);
186 volatile unsigned char rntpc; /* 26 runt packet count */
187 ENETPAD(epad26);
188 volatile unsigned char rcvcc; /* 27 receive collision count */
189 ENETPAD(epad27);
190 volatile unsigned char res5; /* 28 */
191 ENETPAD(epad28);
192 volatile unsigned char utr; /* 29 user test */
193 ENETPAD(epad29);
194 volatile unsigned char res6; /* 30 */
195 ENETPAD(epad30);
196 volatile unsigned char res7; /* 31 */
197 };
198
199 /*
200 * Chip Revisions..
201 */
202
203 #define MACE_REVISION_B0 0x0940
204 #define MACE_REVISION_A2 0x0941
205
206 /* xmtfc */
207 #define XMTFC_DRTRY 0X80
208 #define XMTFC_DXMTFCS 0x08
209 #define XMTFC_APADXNT 0x01
210
211 /* xmtfs */
212 #define XMTFS_XNTSV 0x80
213 #define XMTFS_XMTFS 0x40
214 #define XMTFS_LCOL 0x20
215 #define XMTFS_MORE 0x10
216 #define XMTFS_ONE 0x08
217 #define XMTFS_DEFER 0x04
218 #define XMTFS_LCAR 0x02
219 #define XMTFS_RTRY 0x01
220
221 /* xmtrc */
222 #define XMTRC_EXDEF 0x80
223
224 /* rcvfc */
225 #define RCVFC_LLRCV 0x08
226 #define RCVFC_M_R 0x04
227 #define RCVFC_ASTRPRCV 0x01
228
229 /* rcvfs */
230 #define RCVFS_OFLO 0x80
231 #define RCVFS_CLSN 0x40
232 #define RCVFS_FRAM 0x20
233 #define RCVFS_FCS 0x10
234 #define RCVFS_REVCNT 0x0f
235
236 /* fifofc */
237 #define FIFOCC_XFW_8 0x00
238 #define FIFOCC_XFW_16 0x40
239 #define FIFOCC_XFW_32 0x80
240 #define FIFOCC_XFW_XX 0xc0
241 #define FIFOCC_RFW_16 0x00
242 #define FIFOCC_RFW_32 0x10
243 #define FIFOCC_RFW_64 0x20
244 #define FIFOCC_RFW_XX 0x30
245 #define FIFOCC_XFWU 0x08
246 #define FIFOCC_RFWU 0x04
247 #define FIFOCC_XBRST 0x02
248 #define FIFOCC_RBRST 0x01
249
250
251 /* ir */
252 #define IR_JAB 0x80
253 #define IR_BABL 0x40
254 #define IR_CERR 0x20
255 #define IR_RCVCCO 0x10
256 #define IR_RNTPCO 0x08
257 #define IR_MPCO 0x04
258 #define IR_RCVINT 0x02
259 #define IR_XMTINT 0x01
260
261 /* imr */
262 #define IMR_MJAB 0x80
263 #define IMR_MBABL 0x40
264 #define IMR_MCERR 0x20
265 #define IMR_MRCVCCO 0x10
266 #define IMR_MRNTPCO 0x08
267 #define IMR_MMPCO 0x04
268 #define IMR_MRCVINT 0x02
269 #define IMR_MXMTINT 0x01
270
271 /* pr */
272 #define PR_XMTSV 0x80
273 #define PR_TDTREQ 0x40
274 #define PR_RDTREQ 0x20
275
276 /* biucc */
277 #define BIUCC_BSWP 0x40
278 #define BIUCC_XMTSP04 0x00
279 #define BIUCC_XMTSP16 0x10
280 #define BIUCC_XMTSP64 0x20
281 #define BIUCC_XMTSP112 0x30
282 #define BIUCC_SWRST 0x01
283
284 /* fifocc */
285 #define FIFOCC_XMTFW08W 0x00
286 #define FIFOCC_XMTFW16W 0x40
287 #define FIFOCC_XMTFW32W 0x80
288
289 #define FIFOCC_RCVFW16 0x00
290 #define FIFOCC_RCVFW32 0x10
291 #define FIFOCC_RCVFW64 0x20
292
293 #define FIFOCC_XMTFWU 0x08
294 #define FIFOCC_RCVFWU 0x04
295 #define FIFOCC_XMTBRST 0x02
296 #define FIFOCC_RCVBRST 0x01
297
298 /* maccc */
299 #define MACCC_PROM 0x80
300 #define MACCC_DXMT2PD 0x40
301 #define MACCC_EMBA 0x20
302 #define MACCC_DRCVPA 0x08
303 #define MACCC_DRCVBC 0x04
304 #define MACCC_ENXMT 0x02
305 #define MACCC_ENRCV 0x01
306
307 /* plscc */
308 #define PLSCC_XMTSEL 0x08
309 #define PLSCC_AUI 0x00
310 #define PLSCC_TENBASE 0x02
311 #define PLSCC_DAI 0x04
312 #define PLSCC_GPSI 0x06
313 #define PLSCC_ENPLSIO 0x01
314
315 /* phycc */
316 #define PHYCC_LNKFL 0x80
317 #define PHYCC_DLNKTST 0x40
318 #define PHYCC_REVPOL 0x20
319 #define PHYCC_DAPC 0x10
320 #define PHYCC_LRT 0x08
321 #define PHYCC_ASEL 0x04
322 #define PHYCC_RWAKE 0x02
323 #define PHYCC_AWAKE 0x01
324
325 /* iac */
326 #define IAC_ADDRCHG 0x80
327 #define IAC_PHYADDR 0x04
328 #define IAC_LOGADDR 0x02
329
330 /* utr */
331 #define UTR_RTRE 0x80
332 #define UTR_RTRD 0x40
333 #define UTR_RPA 0x20
334 #define UTR_FCOLL 0x10
335 #define UTR_RCVFCSE 0x08
336
337 #define UTR_NOLOOP 0x00
338 #define UTR_EXTLOOP 0x02
339 #define UTR_INLOOP 0x04
340 #define UTR_INLOOP_M 0x06
341
342 #define ENET_PHYADDR_LEN 6
343 #define ENET_HEADER 14
344
345 #define BFRSIZ 2048
346 #define ETHER_ADD_SIZE 6 /* size of a MAC address */
347 #define DSF_LOCK 1
348 #define DSF_RUNNING 2
349 #define MOD_ENAL 1
350 #define MOD_PROM 2
351
352 /*
353 * MACE Chip revision codes
354 */
355 #define MACERevA2 0x0941
356 #define MACERevB0 0x0940
357
358 /*
359 * Defines and device state
360 * Dieter Siegmund (dieter@next.com) Thu Feb 27 18:25:33 PST 1997
361 */
362
363 #define PG_SIZE 0x1000UL
364 #define PG_MASK (PG_SIZE - 1UL)
365
366 #define ETHERMTU 1500
367 #define ETHER_RX_NUM_DBDMA_BUFS 32
368 #define ETHERNET_BUF_SIZE (ETHERMTU + 36)
369 #define ETHER_MIN_PACKET 64
370 #define TX_NUM_DBDMA 6
371 #define NUM_EN_ADDR_BYTES 6
372
373 #define DBDMA_ETHERNET_EOP 0x40
374
375 typedef struct mace_s {
376 struct mace_board * ereg; /* ethernet register set address */
377 dbdma_regmap_t * tx_dbdma;
378 dbdma_regmap_t * rv_dbdma;
379 unsigned char macaddr[NUM_EN_ADDR_BYTES]; /* mac address */
380 int chip_id;
381 dbdma_command_t *rv_dma;
382 dbdma_command_t *tx_dma;
383 unsigned char *rv_dma_area;
384 unsigned char *tx_dma_area;
385 int rv_tail;
386 int rv_head;
387 } mace_t;
388
389