osfmk/i386/pmap.h

   1 /*
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   8  * Version 2.0 (the 'License'). You may not use this file except in
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  13  * terms of an Apple operating system software license agreement.
  14  *
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  17  *
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  27  */
  28 /*
  29  * @OSF_COPYRIGHT@
  30  */
  31 /*
  32  * Mach Operating System
  33  * Copyright (c) 1991,1990,1989,1988 Carnegie Mellon University
  34  * All Rights Reserved.
  35  *
  36  * Permission to use, copy, modify and distribute this software and its
  37  * documentation is hereby granted, provided that both the copyright
  38  * notice and this permission notice appear in all copies of the
  39  * software, derivative works or modified versions, and any portions
  40  * thereof, and that both notices appear in supporting documentation.
  41  *
  42  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
  43  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
  44  * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
  45  *
  46  * Carnegie Mellon requests users of this software to return to
  47  *
  48  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
  49  *  School of Computer Science
  50  *  Carnegie Mellon University
  51  *  Pittsburgh PA 15213-3890
  52  *
  53  * any improvements or extensions that they make and grant Carnegie Mellon
  54  * the rights to redistribute these changes.
  55  */
  56 /*
  57  */
  58
  59 /*
  60  *      File:   pmap.h
  61  *
  62  *      Authors:  Avadis Tevanian, Jr., Michael Wayne Young
  63  *      Date:   1985
  64  *
  65  *      Machine-dependent structures for the physical map module.
  66  */
  67 #ifdef KERNEL_PRIVATE
  68 #ifndef _PMAP_MACHINE_
  69 #define _PMAP_MACHINE_  1
  70
  71 #ifndef ASSEMBLER
  72
  73
  74 #include <mach/kern_return.h>
  75 #include <mach/machine/vm_types.h>
  76 #include <mach/vm_prot.h>
  77 #include <mach/vm_statistics.h>
  78 #include <mach/machine/vm_param.h>
  79 #include <kern/kern_types.h>
  80 #include <kern/thread.h>
  81 #include <kern/simple_lock.h>
  82 #include <mach/branch_predicates.h>
  83
  84 #include <i386/mp.h>
  85 #include <i386/proc_reg.h>
  86
  87 #include <i386/pal_routines.h>
  88
  89 /*
  90  *      Define the generic in terms of the specific
  91  */
  92
  93 #define INTEL_PGBYTES           I386_PGBYTES
  94 #define INTEL_PGSHIFT           I386_PGSHIFT
  95 #define intel_btop(x)           i386_btop(x)
  96 #define intel_ptob(x)           i386_ptob(x)
  97 #define intel_round_page(x)     i386_round_page(x)
  98 #define intel_trunc_page(x)     i386_trunc_page(x)
  99 #define trunc_intel_to_vm(x)    trunc_i386_to_vm(x)
 100 #define round_intel_to_vm(x)    round_i386_to_vm(x)
 101 #define vm_to_intel(x)          vm_to_i386(x)
 102
 103 /*
 104  *      i386/i486/i860 Page Table Entry
 105  */
 106
 107 #endif  /* ASSEMBLER */
 108
 109 #define NPGPTD          4ULL
 110 #define PDESHIFT        21ULL
 111 #define PTEMASK         0x1ffULL
 112 #define PTEINDX         3ULL
 113
 114 #define PTESHIFT        12ULL
 115
 116
 117 #ifdef __x86_64__
 118 #define LOW_4GB_MASK    ((vm_offset_t)0x00000000FFFFFFFFUL)
 119 #endif
 120
 121 #define PDESIZE         sizeof(pd_entry_t) /* for assembly files */
 122 #define PTESIZE         sizeof(pt_entry_t) /* for assembly files */
 123
 124 #define INTEL_OFFMASK   (I386_PGBYTES - 1)
 125 #define INTEL_LOFFMASK  (I386_LPGBYTES - 1)
 126 #define PG_FRAME        0x000FFFFFFFFFF000ULL
 127 #define NPTEPG          (PAGE_SIZE/(sizeof (pt_entry_t)))
 128 #define NPTDPG          (PAGE_SIZE/(sizeof (pd_entry_t)))
 129
 130 #define NBPTD           (NPGPTD << PAGE_SHIFT)
 131 #define NPDEPTD         (NBPTD / (sizeof (pd_entry_t)))
 132 #define NPDEPG          (PAGE_SIZE/(sizeof (pd_entry_t)))
 133 #define NBPDE           (1ULL << PDESHIFT)
 134 #define PDEMASK         (NBPDE - 1)
 135
 136 #define PTE_PER_PAGE    512 /* number of PTE's per page on any level */
 137
 138  /* cleanly define parameters for all the page table levels */
 139 typedef uint64_t        pml4_entry_t;
 140 #define NPML4PG         (PAGE_SIZE/(sizeof (pml4_entry_t)))
 141 #define PML4SHIFT       39
 142 #define PML4PGSHIFT     9
 143 #define NBPML4          (1ULL << PML4SHIFT)
 144 #define PML4MASK        (NBPML4-1)
 145 #define PML4_ENTRY_NULL ((pml4_entry_t *) 0)
 146
 147 typedef uint64_t        pdpt_entry_t;
 148 #define NPDPTPG         (PAGE_SIZE/(sizeof (pdpt_entry_t)))
 149 #define PDPTSHIFT       30
 150 #define PDPTPGSHIFT     9
 151 #define NBPDPT          (1ULL << PDPTSHIFT)
 152 #define PDPTMASK        (NBPDPT-1)
 153 #define PDPT_ENTRY_NULL ((pdpt_entry_t *) 0)
 154
 155 typedef uint64_t        pd_entry_t;
 156 #define NPDPG           (PAGE_SIZE/(sizeof (pd_entry_t)))
 157 #define PDSHIFT         21
 158 #define PDPGSHIFT       9
 159 #define NBPD            (1ULL << PDSHIFT)
 160 #define PDMASK          (NBPD-1)
 161 #define PD_ENTRY_NULL   ((pd_entry_t *) 0)
 162
 163 typedef uint64_t        pt_entry_t;
 164 #define NPTPG           (PAGE_SIZE/(sizeof (pt_entry_t)))
 165 #define PTSHIFT         12
 166 #define PTPGSHIFT       9
 167 #define NBPT            (1ULL << PTSHIFT)
 168 #define PTMASK          (NBPT-1)
 169 #define PT_ENTRY_NULL   ((pt_entry_t *) 0)
 170
 171 typedef uint64_t  pmap_paddr_t;
 172
 173 #if     DEBUG
 174 #define PMAP_ASSERT 1
 175 #endif
 176 #if PMAP_ASSERT
 177 #define pmap_assert(ex) ((ex) ? (void)0 : Assert(__FILE__, __LINE__, # ex))
 178
 179 #define pmap_assert2(ex, fmt, args...)                                  \
 180         do {                                                            \
 181                 if (!(ex)) {                                            \
 182                         kprintf("Assertion %s failed (%s:%d, caller %p) " fmt , #ex, __FILE__, __LINE__, __builtin_return_address(0),  ##args); \
 183                         panic("Assertion %s failed (%s:%d, caller %p) " fmt , #ex, __FILE__, __LINE__, __builtin_return_address(0),  ##args);           \
 184                 }                                                       \
 185         } while(0)
 186 #else
 187 #define pmap_assert(ex)
 188 #define pmap_assert2(ex, fmt, args...)
 189 #endif
 190
 191 /* superpages */
 192 #ifdef __x86_64__
 193 #define SUPERPAGE_NBASEPAGES 512
 194 #else
 195 #define SUPERPAGE_NBASEPAGES 1  /* we don't support superpages on i386 */
 196 #endif
 197
 198 /*
 199  * Atomic 64-bit store of a page table entry.
 200  */
 201 static inline void
 202 pmap_store_pte(pt_entry_t *entryp, pt_entry_t value)
 203 {
 204         /*
 205          * In the 32-bit kernel a compare-and-exchange loop was
 206          * required to provide atomicity. For K64, life is easier:
 207          */
 208         *entryp = value;
 209 }
 210
 211 /* in 64 bit spaces, the number of each type of page in the page tables */
 212 #define NPML4PGS        (1ULL * (PAGE_SIZE/(sizeof (pml4_entry_t))))
 213 #define NPDPTPGS        (NPML4PGS * (PAGE_SIZE/(sizeof (pdpt_entry_t))))
 214 #define NPDEPGS         (NPDPTPGS * (PAGE_SIZE/(sizeof (pd_entry_t))))
 215 #define NPTEPGS         (NPDEPGS * (PAGE_SIZE/(sizeof (pt_entry_t))))
 216
 217 #define KERNEL_PML4_INDEX               511
 218 #define KERNEL_KEXTS_INDEX      510     /* Home of KEXTs - the basement */
 219 #define KERNEL_PHYSMAP_PML4_INDEX       509     /* virtual to physical map */
 220 #define KERNEL_BASE             (0ULL - NBPML4)
 221 #define KERNEL_BASEMENT         (KERNEL_BASE - NBPML4)
 222
 223 #define VM_WIMG_COPYBACK        VM_MEM_COHERENT
 224 #define VM_WIMG_COPYBACKLW      VM_WIMG_COPYBACK
 225 #define VM_WIMG_DEFAULT         VM_MEM_COHERENT
 226 /* ?? intel ?? */
 227 #define VM_WIMG_IO              (VM_MEM_COHERENT |      \
 228                                 VM_MEM_NOT_CACHEABLE | VM_MEM_GUARDED)
 229 #define VM_WIMG_WTHRU           (VM_MEM_WRITE_THROUGH | VM_MEM_COHERENT | VM_MEM_GUARDED)
 230 /* write combining mode, aka store gather */
 231 #define VM_WIMG_WCOMB           (VM_MEM_NOT_CACHEABLE | VM_MEM_COHERENT)
 232 #define VM_WIMG_INNERWBACK      VM_MEM_COHERENT
 233 /*
 234  * Pte related macros
 235  */
 236 #define KVADDR(pmi, pdpi, pdi, pti)               \
 237          ((vm_offset_t)                   \
 238                 ((uint64_t) -1    << 47)        | \
 239                 ((uint64_t)(pmi)  << PML4SHIFT) | \
 240                 ((uint64_t)(pdpi) << PDPTSHIFT) | \
 241                 ((uint64_t)(pdi)  << PDESHIFT)  | \
 242                 ((uint64_t)(pti)  << PTESHIFT))
 243
 244 /*
 245  * Size of Kernel address space.  This is the number of page table pages
 246  * (4MB each) to use for the kernel.  256 pages == 1 Gigabyte.
 247  * This **MUST** be a multiple of 4 (eg: 252, 256, 260, etc).
 248  */
 249 #ifndef KVA_PAGES
 250 #define KVA_PAGES       1024
 251 #endif
 252
 253 #ifndef NKPT
 254 #define NKPT            500     /* actual number of kernel page tables */
 255 #endif
 256 #ifndef NKPDE
 257 #define NKPDE   (KVA_PAGES - 1) /* addressable number of page tables/pde's */
 258 #endif
 259
 260
 261
 262 /*
 263  *      Convert address offset to page descriptor index
 264  */
 265 #define pdptnum(pmap, a) (((vm_offset_t)(a) >> PDPTSHIFT) & PDPTMASK)
 266 #define pdenum(pmap, a) (((vm_offset_t)(a) >> PDESHIFT) & PDEMASK)
 267 #define PMAP_INVALID_PDPTNUM (~0ULL)
 268
 269 #define pdeidx(pmap, a)    (((a) >> PDSHIFT)   & ((1ULL<<(48 - PDSHIFT)) -1))
 270 #define pdptidx(pmap, a)   (((a) >> PDPTSHIFT) & ((1ULL<<(48 - PDPTSHIFT)) -1))
 271 #define pml4idx(pmap, a)   (((a) >> PML4SHIFT) & ((1ULL<<(48 - PML4SHIFT)) -1))
 272
 273
 274 /*
 275  *      Convert page descriptor index to user virtual address
 276  */
 277 #define pdetova(a)      ((vm_offset_t)(a) << PDESHIFT)
 278
 279 /*
 280  *      Convert address offset to page table index
 281  */
 282 #define ptenum(a)       (((vm_offset_t)(a) >> PTESHIFT) & PTEMASK)
 283
 284 /*
 285  *      Hardware pte bit definitions (to be used directly on the ptes
 286  *      without using the bit fields).
 287  */
 288
 289 #define INTEL_PTE_VALID         0x00000001ULL
 290 #define INTEL_PTE_WRITE         0x00000002ULL
 291 #define INTEL_PTE_RW            0x00000002ULL
 292 #define INTEL_PTE_USER          0x00000004ULL
 293 #define INTEL_PTE_WTHRU         0x00000008ULL
 294 #define INTEL_PTE_NCACHE        0x00000010ULL
 295 #define INTEL_PTE_REF           0x00000020ULL
 296 #define INTEL_PTE_MOD           0x00000040ULL
 297 #define INTEL_PTE_PS            0x00000080ULL
 298 #define INTEL_PTE_PTA           0x00000080ULL
 299 #define INTEL_PTE_GLOBAL        0x00000100ULL
 300 #define INTEL_PTE_WIRED         0x00000200ULL
 301 #define INTEL_PDPTE_NESTED      0x00000400ULL
 302 #define INTEL_PTE_PFN           PG_FRAME
 303
 304 #define INTEL_PTE_NX            (1ULL << 63)
 305
 306 #define INTEL_PTE_INVALID       0
 307 /* This is conservative, but suffices */
 308 #define INTEL_PTE_RSVD          ((1ULL << 10) | (1ULL << 11) | (0x1FFULL << 54))
 309
 310 #define INTEL_PTE_COMPRESSED    INTEL_PTE_REF /* marker, for invalid PTE only */
 311
 312 #define pa_to_pte(a)            ((a) & INTEL_PTE_PFN) /* XXX */
 313 #define pte_to_pa(p)            ((p) & INTEL_PTE_PFN) /* XXX */
 314 #define pte_increment_pa(p)     ((p) += INTEL_OFFMASK+1)
 315
 316 #define pte_kernel_rw(p)          ((pt_entry_t)(pa_to_pte(p) | INTEL_PTE_VALID|INTEL_PTE_RW))
 317 #define pte_kernel_ro(p)          ((pt_entry_t)(pa_to_pte(p) | INTEL_PTE_VALID))
 318 #define pte_user_rw(p)            ((pt_entry)t)(pa_to_pte(p) | INTEL_PTE_VALID|INTEL_PTE_USER|INTEL_PTE_RW))
 319 #define pte_user_ro(p)            ((pt_entry_t)(pa_to_pte(p) | INTEL_PTE_VALID|INTEL_PTE_USER))
 320
 321 #define PMAP_DEFAULT_CACHE      0
 322 #define PMAP_INHIBIT_CACHE      1
 323 #define PMAP_GUARDED_CACHE      2
 324 #define PMAP_ACTIVATE_CACHE     4
 325 #define PMAP_NO_GUARD_CACHE     8
 326
 327
 328 #ifndef ASSEMBLER
 329
 330 #include <sys/queue.h>
 331
 332 /*
 333  * Address of current and alternate address space page table maps
 334  * and directories.
 335  */
 336
 337 extern pt_entry_t       *PTmap;
 338 extern pdpt_entry_t     *IdlePDPT;
 339 extern pml4_entry_t     *IdlePML4;
 340 extern boolean_t        no_shared_cr3;
 341 extern addr64_t         kernel64_cr3;
 342 extern pd_entry_t       *IdlePTD;       /* physical addr of "Idle" state PTD */
 343
 344 extern uint64_t         pmap_pv_hashlist_walks;
 345 extern uint64_t         pmap_pv_hashlist_cnts;
 346 extern uint32_t         pmap_pv_hashlist_max;
 347 extern uint32_t         pmap_kernel_text_ps;
 348
 349
 350
 351 #ifdef __x86_64__
 352 #define ID_MAP_VTOP(x)  ((void *)(((uint64_t)(x)) & LOW_4GB_MASK))
 353
 354 extern  uint64_t physmap_base, physmap_max;
 355
 356 #define NPHYSMAP (MAX(K64_MAXMEM/GB + 4, 4))
 357
 358 static inline boolean_t physmap_enclosed(addr64_t a) {
 359         return (a < (NPHYSMAP * GB));
 360 }
 361
 362 static  inline void * PHYSMAP_PTOV_check(void *paddr) {
 363         uint64_t pvaddr = (uint64_t)paddr + physmap_base;
 364
 365         if (__improbable(pvaddr >= physmap_max))
 366                 panic("PHYSMAP_PTOV bounds exceeded, 0x%qx, 0x%qx, 0x%qx",
 367                       pvaddr, physmap_base, physmap_max);
 368
 369         return (void *)pvaddr;
 370 }
 371
 372 #define PHYSMAP_PTOV(x) (PHYSMAP_PTOV_check((void*) (x)))
 373
 374 /*
 375  * For KASLR, we alias the master processor's IDT and GDT at fixed
 376  * virtual addresses to defeat SIDT/SGDT address leakage.
 377  * And non-boot processor's GDT aliases likewise (skipping LOWGLOBAL_ALIAS)
 378  * The low global vector page is mapped at a fixed alias also.
 379  */
 380 #define MASTER_IDT_ALIAS        (VM_MIN_KERNEL_ADDRESS + 0x0000)
 381 #define MASTER_GDT_ALIAS        (VM_MIN_KERNEL_ADDRESS + 0x1000)
 382 #define LOWGLOBAL_ALIAS         (VM_MIN_KERNEL_ADDRESS + 0x2000)
 383 #define CPU_GDT_ALIAS(_cpu)     (LOWGLOBAL_ALIAS + (0x1000*(_cpu)))
 384
 385 #endif /*__x86_64__ */
 386
 387 #include <vm/vm_page.h>
 388
 389 /*
 390  *      For each vm_page_t, there is a list of all currently
 391  *      valid virtual mappings of that page.  An entry is
 392  *      a pv_entry_t; the list is the pv_table.
 393  */
 394
 395 struct pmap {
 396         decl_simple_lock_data(,lock)    /* lock on map */
 397         pmap_paddr_t    pm_cr3;         /* physical addr */
 398         boolean_t       pm_shared;
 399         pd_entry_t      *dirbase;        /* page directory pointer */
 400         vm_object_t     pm_obj;         /* object to hold pde's */
 401         task_map_t      pm_task_map;
 402         pdpt_entry_t    *pm_pdpt;       /* KVA of 3rd level page */
 403         pml4_entry_t    *pm_pml4;       /* VKA of top level */
 404         vm_object_t     pm_obj_pdpt;    /* holds pdpt pages */
 405         vm_object_t     pm_obj_pml4;    /* holds pml4 pages */
 406 #define PMAP_PCID_MAX_CPUS      (48)    /* Must be a multiple of 8 */
 407         pcid_t          pmap_pcid_cpus[PMAP_PCID_MAX_CPUS];
 408         volatile uint8_t pmap_pcid_coherency_vector[PMAP_PCID_MAX_CPUS];
 409         struct pmap_statistics  stats;  /* map statistics */
 410         int             ref_count;      /* reference count */
 411         int             nx_enabled;
 412         ledger_t        ledger;         /* ledger tracking phys mappings */
 413 };
 414
 415
 416 #if NCOPY_WINDOWS > 0
 417 #define PMAP_PDPT_FIRST_WINDOW 0
 418 #define PMAP_PDPT_NWINDOWS 4
 419 #define PMAP_PDE_FIRST_WINDOW (PMAP_PDPT_NWINDOWS)
 420 #define PMAP_PDE_NWINDOWS 4
 421 #define PMAP_PTE_FIRST_WINDOW (PMAP_PDE_FIRST_WINDOW + PMAP_PDE_NWINDOWS)
 422 #define PMAP_PTE_NWINDOWS 4
 423
 424 #define PMAP_NWINDOWS_FIRSTFREE (PMAP_PTE_FIRST_WINDOW + PMAP_PTE_NWINDOWS)
 425 #define PMAP_WINDOW_SIZE 8
 426 #define PMAP_NWINDOWS (PMAP_NWINDOWS_FIRSTFREE + PMAP_WINDOW_SIZE)
 427
 428 typedef struct {
 429         pt_entry_t      *prv_CMAP;
 430         caddr_t         prv_CADDR;
 431 } mapwindow_t;
 432
 433 typedef struct cpu_pmap {
 434         int                     pdpt_window_index;
 435         int                     pde_window_index;
 436         int                     pte_window_index;
 437         mapwindow_t             mapwindow[PMAP_NWINDOWS];
 438 } cpu_pmap_t;
 439
 440
 441 extern mapwindow_t *pmap_get_mapwindow(pt_entry_t pentry);
 442 extern void         pmap_put_mapwindow(mapwindow_t *map);
 443 #endif
 444
 445 typedef struct pmap_memory_regions {
 446         ppnum_t base;           /* first page of this region */
 447         ppnum_t alloc_up;       /* pages below this one have been "stolen" */
 448         ppnum_t alloc_down;     /* pages above this one have been "stolen" */
 449         ppnum_t end;            /* last page of this region */
 450         uint32_t type;
 451         uint64_t attribute;
 452 } pmap_memory_region_t;
 453
 454 extern unsigned pmap_memory_region_count;
 455 extern unsigned pmap_memory_region_current;
 456
 457 #define PMAP_MEMORY_REGIONS_SIZE 128
 458
 459 extern pmap_memory_region_t pmap_memory_regions[];
 460 #include <i386/pmap_pcid.h>
 461
 462 static inline void
 463 set_dirbase(pmap_t tpmap, __unused thread_t thread, int my_cpu) {
 464         int ccpu = my_cpu;
 465         cpu_datap(ccpu)->cpu_task_cr3 = tpmap->pm_cr3;
 466         cpu_datap(ccpu)->cpu_task_map = tpmap->pm_task_map;
 467         /*
 468          * Switch cr3 if necessary
 469          * - unless running with no_shared_cr3 debugging mode
 470          *   and we're not on the kernel's cr3 (after pre-empted copyio)
 471          */
 472         if (__probable(!no_shared_cr3)) {
 473                 if (get_cr3_base() != tpmap->pm_cr3) {
 474                         if (pmap_pcid_ncpus) {
 475                                 pmap_pcid_activate(tpmap, ccpu);
 476                         }
 477                         else
 478                                 set_cr3_raw(tpmap->pm_cr3);
 479                 }
 480         } else {
 481                 if (get_cr3_base() != cpu_datap(ccpu)->cpu_kernel_cr3)
 482                         set_cr3_raw(cpu_datap(ccpu)->cpu_kernel_cr3);
 483         }
 484 }
 485
 486 /*
 487  *      External declarations for PMAP_ACTIVATE.
 488  */
 489
 490 extern void             process_pmap_updates(void);
 491 extern void             pmap_update_interrupt(void);
 492
 493 /*
 494  *      Machine dependent routines that are used only for i386/i486/i860.
 495  */
 496
 497 extern addr64_t         (kvtophys)(
 498                                 vm_offset_t     addr);
 499
 500 extern kern_return_t    pmap_expand(
 501                                 pmap_t          pmap,
 502                                 vm_map_offset_t addr,
 503                                 unsigned int options);
 504 #if     !defined(__x86_64__)
 505 extern pt_entry_t       *pmap_pte(
 506                                 struct pmap     *pmap,
 507                                 vm_map_offset_t addr);
 508
 509 extern pd_entry_t       *pmap_pde(
 510                                 struct pmap     *pmap,
 511                                 vm_map_offset_t addr);
 512
 513 extern pd_entry_t       *pmap64_pde(
 514                                 struct pmap     *pmap,
 515                                 vm_map_offset_t addr);
 516
 517 extern pdpt_entry_t     *pmap64_pdpt(
 518                                 struct pmap     *pmap,
 519                                 vm_map_offset_t addr);
 520 #endif
 521 extern vm_offset_t      pmap_map(
 522                                 vm_offset_t     virt,
 523                                 vm_map_offset_t start,
 524                                 vm_map_offset_t end,
 525                                 vm_prot_t       prot,
 526                                 unsigned int    flags);
 527
 528 extern vm_offset_t      pmap_map_bd(
 529                                 vm_offset_t     virt,
 530                                 vm_map_offset_t start,
 531                                 vm_map_offset_t end,
 532                                 vm_prot_t       prot,
 533                                 unsigned int    flags);
 534
 535 extern void             pmap_bootstrap(
 536                                 vm_offset_t     load_start,
 537                                 boolean_t       IA32e);
 538
 539 extern boolean_t        pmap_valid_page(
 540                                 ppnum_t pn);
 541
 542 extern int              pmap_list_resident_pages(
 543                                 struct pmap     *pmap,
 544                                 vm_offset_t     *listp,
 545                                 int             space);
 546 extern void             x86_filter_TLB_coherency_interrupts(boolean_t);
 547 /*
 548  * Get cache attributes (as pagetable bits) for the specified phys page
 549  */
 550 extern  unsigned        pmap_get_cache_attributes(ppnum_t);
 551 #if NCOPY_WINDOWS > 0
 552 extern struct cpu_pmap  *pmap_cpu_alloc(
 553                                 boolean_t       is_boot_cpu);
 554 extern void             pmap_cpu_free(
 555                                 struct cpu_pmap *cp);
 556 #endif
 557
 558 extern void             pmap_map_block(
 559                                 pmap_t pmap,
 560                                 addr64_t va,
 561                                 ppnum_t pa,
 562                                 uint32_t size,
 563                                 vm_prot_t prot,
 564                                 int attr,
 565                                 unsigned int flags);
 566
 567 extern void invalidate_icache(vm_offset_t addr, unsigned cnt, int phys);
 568 extern void flush_dcache(vm_offset_t addr, unsigned count, int phys);
 569 extern ppnum_t          pmap_find_phys(pmap_t map, addr64_t va);
 570
 571 extern void pmap_cpu_init(void);
 572 extern void pmap_disable_NX(pmap_t pmap);
 573
 574 extern void pt_fake_zone_init(int);
 575 extern void pt_fake_zone_info(int *, vm_size_t *, vm_size_t *, vm_size_t *, vm_size_t *,
 576                               uint64_t *, int *, int *, int *);
 577 extern void pmap_pagetable_corruption_msg_log(int (*)(const char * fmt, ...)__printflike(1,2));
 578
 579 /*
 580  *      Macros for speed.
 581  */
 582
 583
 584 #include <kern/spl.h>
 585
 586
 587 #define PMAP_ACTIVATE_MAP(map, thread, my_cpu)  {                               \
 588         register pmap_t         tpmap;                                  \
 589                                                                         \
 590         tpmap = vm_map_pmap(map);                                       \
 591         set_dirbase(tpmap, thread, my_cpu);                                     \
 592 }
 593
 594 #if   defined(__x86_64__)
 595 #define PMAP_DEACTIVATE_MAP(map, thread, ccpu)                          \
 596         pmap_assert(pmap_pcid_ncpus ? (pcid_for_pmap_cpu_tuple(map->pmap, ccpu) == (get_cr3_raw() & 0xFFF)) : TRUE);
 597 #else
 598 #define PMAP_DEACTIVATE_MAP(map, thread)
 599 #endif
 600
 601 #define PMAP_SWITCH_CONTEXT(old_th, new_th, my_cpu) {                   \
 602                                                                         \
 603         pmap_assert(ml_get_interrupts_enabled() == FALSE);              \
 604         if (old_th->map != new_th->map) {                               \
 605                 PMAP_DEACTIVATE_MAP(old_th->map, old_th, my_cpu);               \
 606                 PMAP_ACTIVATE_MAP(new_th->map, new_th, my_cpu);         \
 607         }                                                               \
 608 }
 609
 610 #if NCOPY_WINDOWS > 0
 611 #define PMAP_SWITCH_USER(th, new_map, my_cpu) {                         \
 612         spl_t           spl;                                            \
 613                                                                         \
 614         spl = splhigh();                                                \
 615         PMAP_DEACTIVATE_MAP(th->map, th);                               \
 616         th->map = new_map;                                              \
 617         PMAP_ACTIVATE_MAP(th->map, th);                                 \
 618         splx(spl);                                                      \
 619         inval_copy_windows(th);                                         \
 620 }
 621 #else
 622 #define PMAP_SWITCH_USER(th, new_map, my_cpu) {                         \
 623         spl_t           spl;                                            \
 624                                                                         \
 625         spl = splhigh();                                                \
 626         PMAP_DEACTIVATE_MAP(th->map, th, my_cpu);                               \
 627         th->map = new_map;                                              \
 628         PMAP_ACTIVATE_MAP(th->map, th, my_cpu);                         \
 629         splx(spl);                                                      \
 630 }
 631 #endif
 632
 633 /*
 634  * Marking the current cpu's cr3 inactive is achieved by setting its lsb.
 635  * Marking the current cpu's cr3 active once more involves clearng this bit.
 636  * Note that valid page tables are page-aligned and so the bottom 12 bits
 637  * are normally zero, modulo PCID.
 638  * We can only mark the current cpu active/inactive but we can test any cpu.
 639  */
 640 #define CPU_CR3_MARK_INACTIVE()                                         \
 641         current_cpu_datap()->cpu_active_cr3 |= 1
 642
 643 #define CPU_CR3_MARK_ACTIVE()                                           \
 644         current_cpu_datap()->cpu_active_cr3 &= ~1
 645
 646 #define CPU_CR3_IS_ACTIVE(cpu)                                          \
 647         ((cpu_datap(cpu)->cpu_active_cr3 & 1) == 0)
 648
 649 #define CPU_GET_ACTIVE_CR3(cpu)                                         \
 650         (cpu_datap(cpu)->cpu_active_cr3 & ~1)
 651
 652 #define CPU_GET_TASK_CR3(cpu)                                           \
 653         (cpu_datap(cpu)->cpu_task_cr3)
 654
 655 /*
 656  *      Mark this cpu idle, and remove it from the active set,
 657  *      since it is not actively using any pmap.  Signal_cpus
 658  *      will notice that it is idle, and avoid signaling it,
 659  *      but will queue the update request for when the cpu
 660  *      becomes active.
 661  */
 662 #define MARK_CPU_IDLE(my_cpu)   {                                       \
 663         assert(ml_get_interrupts_enabled() == FALSE);                   \
 664         CPU_CR3_MARK_INACTIVE();                                        \
 665         mfence();                                                                       \
 666 }
 667
 668 #define MARK_CPU_ACTIVE(my_cpu) {                                       \
 669         assert(ml_get_interrupts_enabled() == FALSE);                   \
 670         /*                                                              \
 671          *      If a kernel_pmap update was requested while this cpu    \
 672          *      was idle, process it as if we got the interrupt.        \
 673          *      Before doing so, remove this cpu from the idle set.     \
 674          *      Since we do not grab any pmap locks while we flush      \
 675          *      our TLB, another cpu may start an update operation      \
 676          *      before we finish.  Removing this cpu from the idle      \
 677          *      set assures that we will receive another update         \
 678          *      interrupt if this happens.                              \
 679          */                                                             \
 680         CPU_CR3_MARK_ACTIVE();                                          \
 681         mfence();                                                                       \
 682                                                                         \
 683         if (current_cpu_datap()->cpu_tlb_invalid)                       \
 684             process_pmap_updates();                                     \
 685 }
 686
 687 #define PMAP_CONTEXT(pmap, thread)
 688
 689 #define pmap_kernel_va(VA)      \
 690         ((((vm_offset_t) (VA)) >= vm_min_kernel_address) &&     \
 691          (((vm_offset_t) (VA)) <= vm_max_kernel_address))
 692
 693
 694 #define pmap_compressed(pmap)           ((pmap)->stats.compressed)
 695 #define pmap_resident_count(pmap)       ((pmap)->stats.resident_count)
 696 #define pmap_resident_max(pmap)         ((pmap)->stats.resident_max)
 697 #define pmap_copy(dst_pmap,src_pmap,dst_addr,len,src_addr)
 698 #define pmap_attribute(pmap,addr,size,attr,value) \
 699                                         (KERN_INVALID_ADDRESS)
 700 #define pmap_attribute_cache_sync(addr,size,attr,value) \
 701                                         (KERN_INVALID_ADDRESS)
 702
 703 #define MACHINE_PMAP_IS_EMPTY   1
 704 extern boolean_t pmap_is_empty(pmap_t           pmap,
 705                                vm_map_offset_t  start,
 706                                vm_map_offset_t  end);
 707
 708 #define MACHINE_BOOTSTRAPPTD    1       /* Static bootstrap page-tables */
 709
 710 kern_return_t
 711 pmap_permissions_verify(pmap_t, vm_map_t, vm_offset_t, vm_offset_t);
 712
 713 #endif  /* ASSEMBLER */
 714
 715
 716 #endif  /* _PMAP_MACHINE_ */
 717
 718
 719 #endif  /* KERNEL_PRIVATE */