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34 #include <mach_ldebug.h>
37 #include <mach/mach_types.h>
38 #include <mach/kern_return.h>
40 #include <kern/kern_types.h>
41 #include <kern/startup.h>
42 #include <kern/timer_queue.h>
43 #include <kern/processor.h>
44 #include <kern/cpu_number.h>
45 #include <kern/cpu_data.h>
46 #include <kern/assert.h>
47 #include <kern/machine.h>
49 #include <kern/misc_protos.h>
50 #include <kern/timer_call.h>
51 #include <kern/kalloc.h>
52 #include <kern/queue.h>
54 #include <vm/vm_map.h>
55 #include <vm/vm_kern.h>
57 #include <profiling/profile-mk.h>
59 #include <i386/proc_reg.h>
60 #include <i386/cpu_threads.h>
61 #include <i386/mp_desc.h>
62 #include <i386/misc_protos.h>
63 #include <i386/trap.h>
64 #include <i386/postcode.h>
65 #include <i386/machine_routines.h>
67 #include <i386/mp_events.h>
68 #include <i386/lapic.h>
69 #include <i386/cpuid.h>
71 #include <i386/machine_cpu.h>
72 #include <i386/pmCPU.h>
74 #include <i386/machine_check.h>
76 #include <i386/acpi.h>
78 #include <chud/chud_xnu.h>
79 #include <chud/chud_xnu_private.h>
81 #include <sys/kdebug.h>
83 #include <console/serial_protos.h>
86 #define PAUSE delay(1000000)
87 #define DBG(x...) kprintf(x)
93 /* Debugging/test trace events: */
94 #define TRACE_MP_TLB_FLUSH MACHDBG_CODE(DBG_MACH_MP, 0)
95 #define TRACE_MP_CPUS_CALL MACHDBG_CODE(DBG_MACH_MP, 1)
96 #define TRACE_MP_CPUS_CALL_LOCAL MACHDBG_CODE(DBG_MACH_MP, 2)
97 #define TRACE_MP_CPUS_CALL_ACTION MACHDBG_CODE(DBG_MACH_MP, 3)
98 #define TRACE_MP_CPUS_CALL_NOBUF MACHDBG_CODE(DBG_MACH_MP, 4)
99 #define TRACE_MP_CPU_FAST_START MACHDBG_CODE(DBG_MACH_MP, 5)
100 #define TRACE_MP_CPU_START MACHDBG_CODE(DBG_MACH_MP, 6)
101 #define TRACE_MP_CPU_DEACTIVATE MACHDBG_CODE(DBG_MACH_MP, 7)
103 #define ABS(v) (((v) > 0)?(v):-(v))
105 void slave_boot_init(void);
106 void i386_cpu_IPI(int cpu
);
109 static void mp_kdp_wait(boolean_t flush
, boolean_t isNMI
);
110 #endif /* MACH_KDP */
111 static void mp_rendezvous_action(void);
112 static void mp_broadcast_action(void);
115 static boolean_t
cpu_signal_pending(int cpu
, mp_event_t event
);
116 #endif /* MACH_KDP */
117 static int NMIInterruptHandler(x86_saved_state_t
*regs
);
119 boolean_t smp_initialized
= FALSE
;
120 uint32_t TSC_sync_margin
= 0xFFF;
121 volatile boolean_t force_immediate_debugger_NMI
= FALSE
;
122 volatile boolean_t pmap_tlb_flush_timeout
= FALSE
;
123 decl_simple_lock_data(,mp_kdp_lock
);
125 decl_lck_mtx_data(static, mp_cpu_boot_lock
);
126 lck_mtx_ext_t mp_cpu_boot_lock_ext
;
128 /* Variables needed for MP rendezvous. */
129 decl_simple_lock_data(,mp_rv_lock
);
130 static void (*mp_rv_setup_func
)(void *arg
);
131 static void (*mp_rv_action_func
)(void *arg
);
132 static void (*mp_rv_teardown_func
)(void *arg
);
133 static void *mp_rv_func_arg
;
134 static volatile int mp_rv_ncpus
;
135 /* Cache-aligned barriers: */
136 static volatile long mp_rv_entry
__attribute__((aligned(64)));
137 static volatile long mp_rv_exit
__attribute__((aligned(64)));
138 static volatile long mp_rv_complete
__attribute__((aligned(64)));
140 volatile uint64_t debugger_entry_time
;
141 volatile uint64_t debugger_exit_time
;
144 extern int kdp_snapshot
;
145 static struct _kdp_xcpu_call_func
{
146 kdp_x86_xcpu_func_t func
;
149 volatile uint16_t cpu
;
150 } kdp_xcpu_call_func
= {
156 /* Variables needed for MP broadcast. */
157 static void (*mp_bc_action_func
)(void *arg
);
158 static void *mp_bc_func_arg
;
159 static int mp_bc_ncpus
;
160 static volatile long mp_bc_count
;
161 decl_lck_mtx_data(static, mp_bc_lock
);
162 lck_mtx_ext_t mp_bc_lock_ext
;
163 static volatile int debugger_cpu
= -1;
164 volatile long NMIPI_acks
= 0;
165 volatile long NMI_count
= 0;
167 extern void NMI_cpus(void);
169 static void mp_cpus_call_init(void);
170 static void mp_cpus_call_cpu_init(void);
171 static void mp_cpus_call_action(void);
172 static void mp_call_PM(void);
174 char mp_slave_stack
[PAGE_SIZE
] __attribute__((aligned(PAGE_SIZE
))); // Temp stack for slave init
176 /* PAL-related routines */
177 boolean_t
i386_smp_init(int nmi_vector
, i386_intr_func_t nmi_handler
,
178 int ipi_vector
, i386_intr_func_t ipi_handler
);
179 void i386_start_cpu(int lapic_id
, int cpu_num
);
180 void i386_send_NMI(int cpu
);
184 * Initialize dummy structs for profiling. These aren't used but
185 * allows hertz_tick() to be built with GPROF defined.
187 struct profile_vars _profile_vars
;
188 struct profile_vars
*_profile_vars_cpus
[MAX_CPUS
] = { &_profile_vars
};
189 #define GPROF_INIT() \
193 /* Hack to initialize pointers to unused profiling structs */ \
194 for (i = 1; i < MAX_CPUS; i++) \
195 _profile_vars_cpus[i] = &_profile_vars; \
201 static lck_grp_t smp_lck_grp
;
202 static lck_grp_attr_t smp_lck_grp_attr
;
204 #define NUM_CPU_WARM_CALLS 20
205 struct timer_call cpu_warm_call_arr
[NUM_CPU_WARM_CALLS
];
206 queue_head_t cpu_warm_call_list
;
207 decl_simple_lock_data(static, cpu_warm_lock
);
209 typedef struct cpu_warm_data
{
210 timer_call_t cwd_call
;
211 uint64_t cwd_deadline
;
215 static void cpu_prewarm_init(void);
216 static void cpu_warm_timer_call_func(call_entry_param_t p0
, call_entry_param_t p1
);
217 static void _cpu_warm_setup(void *arg
);
218 static timer_call_t
grab_warm_timer_call(void);
219 static void free_warm_timer_call(timer_call_t call
);
224 simple_lock_init(&mp_kdp_lock
, 0);
225 simple_lock_init(&mp_rv_lock
, 0);
226 lck_grp_attr_setdefault(&smp_lck_grp_attr
);
227 lck_grp_init(&smp_lck_grp
, "i386_smp", &smp_lck_grp_attr
);
228 lck_mtx_init_ext(&mp_cpu_boot_lock
, &mp_cpu_boot_lock_ext
, &smp_lck_grp
, LCK_ATTR_NULL
);
229 lck_mtx_init_ext(&mp_bc_lock
, &mp_bc_lock_ext
, &smp_lck_grp
, LCK_ATTR_NULL
);
232 if(!i386_smp_init(LAPIC_NMI_INTERRUPT
, NMIInterruptHandler
,
233 LAPIC_VECTOR(INTERPROCESSOR
), cpu_signal_handler
))
239 DBGLOG_CPU_INIT(master_cpu
);
242 mp_cpus_call_cpu_init();
244 if (PE_parse_boot_argn("TSC_sync_margin",
245 &TSC_sync_margin
, sizeof(TSC_sync_margin
))) {
246 kprintf("TSC sync Margin 0x%x\n", TSC_sync_margin
);
247 } else if (cpuid_vmm_present()) {
248 kprintf("TSC sync margin disabled\n");
251 smp_initialized
= TRUE
;
262 } processor_start_info_t
;
263 static processor_start_info_t start_info
__attribute__((aligned(64)));
266 * Cache-alignment is to avoid cross-cpu false-sharing interference.
268 static volatile long tsc_entry_barrier
__attribute__((aligned(64)));
269 static volatile long tsc_exit_barrier
__attribute__((aligned(64)));
270 static volatile uint64_t tsc_target
__attribute__((aligned(64)));
273 * Poll a CPU to see when it has marked itself as running.
276 mp_wait_for_cpu_up(int slot_num
, unsigned int iters
, unsigned int usecdelay
)
278 while (iters
-- > 0) {
279 if (cpu_datap(slot_num
)->cpu_running
)
286 * Quickly bring a CPU back online which has been halted.
289 intel_startCPU_fast(int slot_num
)
294 * Try to perform a fast restart
296 rc
= pmCPUExitHalt(slot_num
);
297 if (rc
!= KERN_SUCCESS
)
299 * The CPU was not eligible for a fast restart.
303 KERNEL_DEBUG_CONSTANT(
304 TRACE_MP_CPU_FAST_START
| DBG_FUNC_START
,
305 slot_num
, 0, 0, 0, 0);
308 * Wait until the CPU is back online.
310 mp_disable_preemption();
313 * We use short pauses (1us) for low latency. 30,000 iterations is
314 * longer than a full restart would require so it should be more
318 mp_wait_for_cpu_up(slot_num
, 30000, 1);
319 mp_enable_preemption();
321 KERNEL_DEBUG_CONSTANT(
322 TRACE_MP_CPU_FAST_START
| DBG_FUNC_END
,
323 slot_num
, cpu_datap(slot_num
)->cpu_running
, 0, 0, 0);
326 * Check to make sure that the CPU is really running. If not,
327 * go through the slow path.
329 if (cpu_datap(slot_num
)->cpu_running
)
330 return(KERN_SUCCESS
);
332 return(KERN_FAILURE
);
338 /* Here on the started cpu with cpu_running set TRUE */
340 if (TSC_sync_margin
&&
341 start_info
.target_cpu
== cpu_number()) {
343 * I've just started-up, synchronize again with the starter cpu
344 * and then snap my TSC.
347 atomic_decl(&tsc_entry_barrier
, 1);
348 while (tsc_entry_barrier
!= 0)
349 ; /* spin for starter and target at barrier */
350 tsc_target
= rdtsc64();
351 atomic_decl(&tsc_exit_barrier
, 1);
359 processor_start_info_t
*psip
= (processor_start_info_t
*) arg
;
361 /* Ignore this if the current processor is not the starter */
362 if (cpu_number() != psip
->starter_cpu
)
365 DBG("start_cpu(%p) about to start cpu %d, lapic %d\n",
366 arg
, psip
->target_cpu
, psip
->target_lapic
);
368 KERNEL_DEBUG_CONSTANT(
369 TRACE_MP_CPU_START
| DBG_FUNC_START
,
371 psip
->target_lapic
, 0, 0, 0);
373 i386_start_cpu(psip
->target_lapic
, psip
->target_cpu
);
375 #ifdef POSTCODE_DELAY
376 /* Wait much longer if postcodes are displayed for a delay period. */
379 DBG("start_cpu(%p) about to wait for cpu %d\n",
380 arg
, psip
->target_cpu
);
382 mp_wait_for_cpu_up(psip
->target_cpu
, i
*100, 100);
384 KERNEL_DEBUG_CONSTANT(
385 TRACE_MP_CPU_START
| DBG_FUNC_END
,
387 cpu_datap(psip
->target_cpu
)->cpu_running
, 0, 0, 0);
389 if (TSC_sync_margin
&&
390 cpu_datap(psip
->target_cpu
)->cpu_running
) {
392 * Compare the TSC from the started processor with ours.
393 * Report and log/panic if it diverges by more than
394 * TSC_sync_margin (TSC_SYNC_MARGIN) ticks. This margin
395 * can be overriden by boot-arg (with 0 meaning no checking).
397 uint64_t tsc_starter
;
399 atomic_decl(&tsc_entry_barrier
, 1);
400 while (tsc_entry_barrier
!= 0)
401 ; /* spin for both processors at barrier */
402 tsc_starter
= rdtsc64();
403 atomic_decl(&tsc_exit_barrier
, 1);
404 while (tsc_exit_barrier
!= 0)
405 ; /* spin for target to store its TSC */
406 tsc_delta
= tsc_target
- tsc_starter
;
407 kprintf("TSC sync for cpu %d: 0x%016llx delta 0x%llx (%lld)\n",
408 psip
->target_cpu
, tsc_target
, tsc_delta
, tsc_delta
);
409 if (ABS(tsc_delta
) > (int64_t) TSC_sync_margin
) {
415 "Unsynchronized TSC for cpu %d: "
416 "0x%016llx, delta 0x%llx\n",
417 psip
->target_cpu
, tsc_target
, tsc_delta
);
426 int lapic
= cpu_to_lapic
[slot_num
];
431 DBGLOG_CPU_INIT(slot_num
);
433 DBG("intel_startCPU(%d) lapic_id=%d\n", slot_num
, lapic
);
434 DBG("IdlePTD(%p): 0x%x\n", &IdlePTD
, (int) (uintptr_t)IdlePTD
);
437 * Initialize (or re-initialize) the descriptor tables for this cpu.
438 * Propagate processor mode to slave.
440 cpu_desc_init64(cpu_datap(slot_num
));
442 /* Serialize use of the slave boot stack, etc. */
443 lck_mtx_lock(&mp_cpu_boot_lock
);
445 istate
= ml_set_interrupts_enabled(FALSE
);
446 if (slot_num
== get_cpu_number()) {
447 ml_set_interrupts_enabled(istate
);
448 lck_mtx_unlock(&mp_cpu_boot_lock
);
452 start_info
.starter_cpu
= cpu_number();
453 start_info
.target_cpu
= slot_num
;
454 start_info
.target_lapic
= lapic
;
455 tsc_entry_barrier
= 2;
456 tsc_exit_barrier
= 2;
459 * Perform the processor startup sequence with all running
460 * processors rendezvous'ed. This is required during periods when
461 * the cache-disable bit is set for MTRR/PAT initialization.
463 mp_rendezvous_no_intrs(start_cpu
, (void *) &start_info
);
465 start_info
.target_cpu
= 0;
467 ml_set_interrupts_enabled(istate
);
468 lck_mtx_unlock(&mp_cpu_boot_lock
);
470 if (!cpu_datap(slot_num
)->cpu_running
) {
471 kprintf("Failed to start CPU %02d\n", slot_num
);
472 printf("Failed to start CPU %02d, rebooting...\n", slot_num
);
477 kprintf("Started cpu %d (lapic id %08x)\n", slot_num
, lapic
);
483 cpu_signal_event_log_t
*cpu_signal
[MAX_CPUS
];
484 cpu_signal_event_log_t
*cpu_handle
[MAX_CPUS
];
486 MP_EVENT_NAME_DECL();
488 #endif /* MP_DEBUG */
491 cpu_signal_handler(x86_saved_state_t
*regs
)
494 #pragma unused (regs)
495 #endif /* !MACH_KDP */
497 volatile int *my_word
;
499 SCHED_STATS_IPI(current_processor());
501 my_cpu
= cpu_number();
502 my_word
= &cpu_data_ptr
[my_cpu
]->cpu_signals
;
503 /* Store the initial set of signals for diagnostics. New
504 * signals could arrive while these are being processed
505 * so it's no more than a hint.
508 cpu_data_ptr
[my_cpu
]->cpu_prior_signals
= *my_word
;
512 if (i_bit(MP_KDP
, my_word
) && regs
!= NULL
) {
513 DBGLOG(cpu_handle
,my_cpu
,MP_KDP
);
514 i_bit_clear(MP_KDP
, my_word
);
515 /* Ensure that the i386_kernel_state at the base of the
516 * current thread's stack (if any) is synchronized with the
517 * context at the moment of the interrupt, to facilitate
518 * access through the debugger.
520 sync_iss_to_iks(regs
);
521 if (pmsafe_debug
&& !kdp_snapshot
)
522 pmSafeMode(¤t_cpu_datap()->lcpu
, PM_SAFE_FL_SAFE
);
523 mp_kdp_wait(TRUE
, FALSE
);
524 if (pmsafe_debug
&& !kdp_snapshot
)
525 pmSafeMode(¤t_cpu_datap()->lcpu
, PM_SAFE_FL_NORMAL
);
527 #endif /* MACH_KDP */
528 if (i_bit(MP_TLB_FLUSH
, my_word
)) {
529 DBGLOG(cpu_handle
,my_cpu
,MP_TLB_FLUSH
);
530 i_bit_clear(MP_TLB_FLUSH
, my_word
);
531 pmap_update_interrupt();
532 } else if (i_bit(MP_AST
, my_word
)) {
533 DBGLOG(cpu_handle
,my_cpu
,MP_AST
);
534 i_bit_clear(MP_AST
, my_word
);
535 ast_check(cpu_to_processor(my_cpu
));
536 } else if (i_bit(MP_RENDEZVOUS
, my_word
)) {
537 DBGLOG(cpu_handle
,my_cpu
,MP_RENDEZVOUS
);
538 i_bit_clear(MP_RENDEZVOUS
, my_word
);
539 mp_rendezvous_action();
540 } else if (i_bit(MP_BROADCAST
, my_word
)) {
541 DBGLOG(cpu_handle
,my_cpu
,MP_BROADCAST
);
542 i_bit_clear(MP_BROADCAST
, my_word
);
543 mp_broadcast_action();
544 } else if (i_bit(MP_CHUD
, my_word
)) {
545 DBGLOG(cpu_handle
,my_cpu
,MP_CHUD
);
546 i_bit_clear(MP_CHUD
, my_word
);
547 chudxnu_cpu_signal_handler();
548 } else if (i_bit(MP_CALL
, my_word
)) {
549 DBGLOG(cpu_handle
,my_cpu
,MP_CALL
);
550 i_bit_clear(MP_CALL
, my_word
);
551 mp_cpus_call_action();
552 } else if (i_bit(MP_CALL_PM
, my_word
)) {
553 DBGLOG(cpu_handle
,my_cpu
,MP_CALL_PM
);
554 i_bit_clear(MP_CALL_PM
, my_word
);
563 NMIInterruptHandler(x86_saved_state_t
*regs
)
567 if (panic_active() && !panicDebugging
) {
569 pmSafeMode(¤t_cpu_datap()->lcpu
, PM_SAFE_FL_SAFE
);
574 atomic_incl(&NMIPI_acks
, 1);
575 atomic_incl(&NMI_count
, 1);
576 sync_iss_to_iks_unconditionally(regs
);
577 __asm__
volatile("movq %%rbp, %0" : "=m" (stackptr
));
579 if (cpu_number() == debugger_cpu
)
582 if (spinlock_timed_out
) {
584 snprintf(&pstr
[0], sizeof(pstr
), "Panic(CPU %d): NMIPI for spinlock acquisition timeout, spinlock: %p, spinlock owner: %p, current_thread: %p, spinlock_owner_cpu: 0x%x\n", cpu_number(), spinlock_timed_out
, (void *) spinlock_timed_out
->interlock
.lock_data
, current_thread(), spinlock_owner_cpu
);
585 panic_i386_backtrace(stackptr
, 64, &pstr
[0], TRUE
, regs
);
586 } else if (pmap_tlb_flush_timeout
== TRUE
) {
588 snprintf(&pstr
[0], sizeof(pstr
), "Panic(CPU %d): Unresponsive processor (this CPU did not acknowledge interrupts) TLB state:0x%x\n", cpu_number(), current_cpu_datap()->cpu_tlb_invalid
);
589 panic_i386_backtrace(stackptr
, 48, &pstr
[0], TRUE
, regs
);
593 if (pmsafe_debug
&& !kdp_snapshot
)
594 pmSafeMode(¤t_cpu_datap()->lcpu
, PM_SAFE_FL_SAFE
);
595 current_cpu_datap()->cpu_NMI_acknowledged
= TRUE
;
596 mp_kdp_wait(FALSE
, pmap_tlb_flush_timeout
|| spinlock_timed_out
|| panic_active());
597 if (pmsafe_debug
&& !kdp_snapshot
)
598 pmSafeMode(¤t_cpu_datap()->lcpu
, PM_SAFE_FL_NORMAL
);
606 * cpu_interrupt is really just to be used by the scheduler to
607 * get a CPU's attention it may not always issue an IPI. If an
608 * IPI is always needed then use i386_cpu_IPI.
611 cpu_interrupt(int cpu
)
613 boolean_t did_IPI
= FALSE
;
616 && pmCPUExitIdle(cpu_datap(cpu
))) {
621 KERNEL_DEBUG_CONSTANT(MACHDBG_CODE(DBG_MACH_SCHED
, MACH_REMOTE_AST
), cpu
, did_IPI
, 0, 0, 0);
625 * Send a true NMI via the local APIC to the specified CPU.
628 cpu_NMI_interrupt(int cpu
)
630 if (smp_initialized
) {
639 boolean_t intrs_enabled
;
640 uint64_t tsc_timeout
;
642 intrs_enabled
= ml_set_interrupts_enabled(FALSE
);
644 for (cpu
= 0; cpu
< real_ncpus
; cpu
++) {
645 if (!cpu_datap(cpu
)->cpu_running
)
647 cpu_datap(cpu
)->cpu_NMI_acknowledged
= FALSE
;
648 cpu_NMI_interrupt(cpu
);
649 tsc_timeout
= !machine_timeout_suspended() ?
650 rdtsc64() + (1000 * 1000 * 1000 * 10ULL) :
652 while (!cpu_datap(cpu
)->cpu_NMI_acknowledged
) {
653 handle_pending_TLB_flushes();
655 if (rdtsc64() > tsc_timeout
)
656 panic("NMI_cpus() timeout cpu %d", cpu
);
658 cpu_datap(cpu
)->cpu_NMI_acknowledged
= FALSE
;
661 ml_set_interrupts_enabled(intrs_enabled
);
664 static void (* volatile mp_PM_func
)(void) = NULL
;
669 assert(!ml_get_interrupts_enabled());
671 if (mp_PM_func
!= NULL
)
676 cpu_PM_interrupt(int cpu
)
678 assert(!ml_get_interrupts_enabled());
680 if (mp_PM_func
!= NULL
) {
681 if (cpu
== cpu_number())
684 i386_signal_cpu(cpu
, MP_CALL_PM
, ASYNC
);
689 PM_interrupt_register(void (*fn
)(void))
695 i386_signal_cpu(int cpu
, mp_event_t event
, mp_sync_t mode
)
697 volatile int *signals
= &cpu_datap(cpu
)->cpu_signals
;
698 uint64_t tsc_timeout
;
701 if (!cpu_datap(cpu
)->cpu_running
)
704 if (event
== MP_TLB_FLUSH
)
705 KERNEL_DEBUG(TRACE_MP_TLB_FLUSH
| DBG_FUNC_START
, cpu
, 0, 0, 0, 0);
707 DBGLOG(cpu_signal
, cpu
, event
);
709 i_bit_set(event
, signals
);
713 tsc_timeout
= !machine_timeout_suspended() ?
714 rdtsc64() + (1000*1000*1000) :
716 while (i_bit(event
, signals
) && rdtsc64() < tsc_timeout
) {
719 if (i_bit(event
, signals
)) {
720 DBG("i386_signal_cpu(%d, 0x%x, SYNC) timed out\n",
725 if (event
== MP_TLB_FLUSH
)
726 KERNEL_DEBUG(TRACE_MP_TLB_FLUSH
| DBG_FUNC_END
, cpu
, 0, 0, 0, 0);
730 * Send event to all running cpus.
731 * Called with the topology locked.
734 i386_signal_cpus(mp_event_t event
, mp_sync_t mode
)
737 unsigned int my_cpu
= cpu_number();
739 assert(hw_lock_held((hw_lock_t
)&x86_topo_lock
));
741 for (cpu
= 0; cpu
< real_ncpus
; cpu
++) {
742 if (cpu
== my_cpu
|| !cpu_datap(cpu
)->cpu_running
)
744 i386_signal_cpu(cpu
, event
, mode
);
749 * Return the number of running cpus.
750 * Called with the topology locked.
753 i386_active_cpus(void)
756 unsigned int ncpus
= 0;
758 assert(hw_lock_held((hw_lock_t
)&x86_topo_lock
));
760 for (cpu
= 0; cpu
< real_ncpus
; cpu
++) {
761 if (cpu_datap(cpu
)->cpu_running
)
768 * Helper function called when busy-waiting: panic if too long
769 * a TSC-based time has elapsed since the start of the spin.
772 mp_spin_timeout_check(uint64_t tsc_start
, const char *msg
)
774 uint64_t tsc_timeout
;
777 if (machine_timeout_suspended())
781 * The timeout is 4 * the spinlock timeout period
782 * unless we have serial console printing (kprintf) enabled
783 * in which case we allow an even greater margin.
785 tsc_timeout
= disable_serial_output
? (uint64_t) LockTimeOutTSC
<< 2
786 : (uint64_t) LockTimeOutTSC
<< 4;
787 if (rdtsc64() > tsc_start
+ tsc_timeout
)
788 panic("%s: spin timeout", msg
);
792 * All-CPU rendezvous:
793 * - CPUs are signalled,
794 * - all execute the setup function (if specified),
795 * - rendezvous (i.e. all cpus reach a barrier),
796 * - all execute the action function (if specified),
797 * - rendezvous again,
798 * - execute the teardown function (if specified), and then
801 * Note that the supplied external functions _must_ be reentrant and aware
802 * that they are running in parallel and in an unknown lock context.
806 mp_rendezvous_action(void)
808 boolean_t intrs_enabled
;
809 uint64_t tsc_spin_start
;
812 if (mp_rv_setup_func
!= NULL
)
813 mp_rv_setup_func(mp_rv_func_arg
);
815 intrs_enabled
= ml_get_interrupts_enabled();
817 /* spin on entry rendezvous */
818 atomic_incl(&mp_rv_entry
, 1);
819 tsc_spin_start
= rdtsc64();
820 while (mp_rv_entry
< mp_rv_ncpus
) {
821 /* poll for pesky tlb flushes if interrupts disabled */
823 handle_pending_TLB_flushes();
824 mp_spin_timeout_check(tsc_spin_start
,
825 "mp_rendezvous_action() entry");
828 /* action function */
829 if (mp_rv_action_func
!= NULL
)
830 mp_rv_action_func(mp_rv_func_arg
);
832 /* spin on exit rendezvous */
833 atomic_incl(&mp_rv_exit
, 1);
834 tsc_spin_start
= rdtsc64();
835 while (mp_rv_exit
< mp_rv_ncpus
) {
837 handle_pending_TLB_flushes();
838 mp_spin_timeout_check(tsc_spin_start
,
839 "mp_rendezvous_action() exit");
842 /* teardown function */
843 if (mp_rv_teardown_func
!= NULL
)
844 mp_rv_teardown_func(mp_rv_func_arg
);
846 /* Bump completion count */
847 atomic_incl(&mp_rv_complete
, 1);
851 mp_rendezvous(void (*setup_func
)(void *),
852 void (*action_func
)(void *),
853 void (*teardown_func
)(void *),
856 uint64_t tsc_spin_start
;
858 if (!smp_initialized
) {
859 if (setup_func
!= NULL
)
861 if (action_func
!= NULL
)
863 if (teardown_func
!= NULL
)
868 /* obtain rendezvous lock */
869 simple_lock(&mp_rv_lock
);
871 /* set static function pointers */
872 mp_rv_setup_func
= setup_func
;
873 mp_rv_action_func
= action_func
;
874 mp_rv_teardown_func
= teardown_func
;
875 mp_rv_func_arg
= arg
;
882 * signal other processors, which will call mp_rendezvous_action()
883 * with interrupts disabled
885 simple_lock(&x86_topo_lock
);
886 mp_rv_ncpus
= i386_active_cpus();
887 i386_signal_cpus(MP_RENDEZVOUS
, ASYNC
);
888 simple_unlock(&x86_topo_lock
);
890 /* call executor function on this cpu */
891 mp_rendezvous_action();
894 * Spin for everyone to complete.
895 * This is necessary to ensure that all processors have proceeded
896 * from the exit barrier before we release the rendezvous structure.
898 tsc_spin_start
= rdtsc64();
899 while (mp_rv_complete
< mp_rv_ncpus
) {
900 mp_spin_timeout_check(tsc_spin_start
, "mp_rendezvous()");
904 mp_rv_setup_func
= NULL
;
905 mp_rv_action_func
= NULL
;
906 mp_rv_teardown_func
= NULL
;
907 mp_rv_func_arg
= NULL
;
910 simple_unlock(&mp_rv_lock
);
914 mp_rendezvous_break_lock(void)
916 simple_lock_init(&mp_rv_lock
, 0);
920 setup_disable_intrs(__unused
void * param_not_used
)
922 /* disable interrupts before the first barrier */
923 boolean_t intr
= ml_set_interrupts_enabled(FALSE
);
925 current_cpu_datap()->cpu_iflag
= intr
;
926 DBG("CPU%d: %s\n", get_cpu_number(), __FUNCTION__
);
930 teardown_restore_intrs(__unused
void * param_not_used
)
932 /* restore interrupt flag following MTRR changes */
933 ml_set_interrupts_enabled(current_cpu_datap()->cpu_iflag
);
934 DBG("CPU%d: %s\n", get_cpu_number(), __FUNCTION__
);
938 * A wrapper to mp_rendezvous() to call action_func() with interrupts disabled.
939 * This is exported for use by kexts.
942 mp_rendezvous_no_intrs(
943 void (*action_func
)(void *),
946 mp_rendezvous(setup_disable_intrs
,
948 teardown_restore_intrs
,
954 queue_chain_t link
; /* queue linkage */
955 void (*func
)(void *,void *); /* routine to call */
956 void *arg0
; /* routine's 1st arg */
957 void *arg1
; /* routine's 2nd arg */
958 volatile long *countp
; /* completion counter */
964 decl_simple_lock_data(, lock
);
966 #define MP_CPUS_CALL_BUFS_PER_CPU MAX_CPUS
967 static mp_call_queue_t mp_cpus_call_freelist
;
968 static mp_call_queue_t mp_cpus_call_head
[MAX_CPUS
];
970 static inline boolean_t
971 mp_call_head_lock(mp_call_queue_t
*cqp
)
973 boolean_t intrs_enabled
;
975 intrs_enabled
= ml_set_interrupts_enabled(FALSE
);
976 simple_lock(&cqp
->lock
);
978 return intrs_enabled
;
981 static inline boolean_t
982 mp_call_head_is_locked(mp_call_queue_t
*cqp
)
984 return !ml_get_interrupts_enabled() &&
985 hw_lock_held((hw_lock_t
)&cqp
->lock
);
989 mp_call_head_unlock(mp_call_queue_t
*cqp
, boolean_t intrs_enabled
)
991 simple_unlock(&cqp
->lock
);
992 ml_set_interrupts_enabled(intrs_enabled
);
995 static inline mp_call_t
*
998 mp_call_t
*callp
= NULL
;
999 boolean_t intrs_enabled
;
1000 mp_call_queue_t
*cqp
= &mp_cpus_call_freelist
;
1002 intrs_enabled
= mp_call_head_lock(cqp
);
1003 if (!queue_empty(&cqp
->queue
))
1004 queue_remove_first(&cqp
->queue
, callp
, typeof(callp
), link
);
1005 mp_call_head_unlock(cqp
, intrs_enabled
);
1011 mp_call_free(mp_call_t
*callp
)
1013 boolean_t intrs_enabled
;
1014 mp_call_queue_t
*cqp
= &mp_cpus_call_freelist
;
1016 intrs_enabled
= mp_call_head_lock(cqp
);
1017 queue_enter_first(&cqp
->queue
, callp
, typeof(callp
), link
);
1018 mp_call_head_unlock(cqp
, intrs_enabled
);
1021 static inline mp_call_t
*
1022 mp_call_dequeue_locked(mp_call_queue_t
*cqp
)
1024 mp_call_t
*callp
= NULL
;
1026 assert(mp_call_head_is_locked(cqp
));
1027 if (!queue_empty(&cqp
->queue
))
1028 queue_remove_first(&cqp
->queue
, callp
, typeof(callp
), link
);
1033 mp_call_enqueue_locked(
1034 mp_call_queue_t
*cqp
,
1037 queue_enter(&cqp
->queue
, callp
, typeof(callp
), link
);
1040 /* Called on the boot processor to initialize global structures */
1042 mp_cpus_call_init(void)
1044 mp_call_queue_t
*cqp
= &mp_cpus_call_freelist
;
1046 DBG("mp_cpus_call_init()\n");
1047 simple_lock_init(&cqp
->lock
, 0);
1048 queue_init(&cqp
->queue
);
1052 * Called by each processor to add call buffers to the free list
1053 * and to initialize the per-cpu call queue.
1054 * Also called but ignored on slave processors on re-start/wake.
1057 mp_cpus_call_cpu_init(void)
1060 mp_call_queue_t
*cqp
= &mp_cpus_call_head
[cpu_number()];
1063 if (cqp
->queue
.next
!= NULL
)
1064 return; /* restart/wake case: called already */
1066 simple_lock_init(&cqp
->lock
, 0);
1067 queue_init(&cqp
->queue
);
1068 for (i
= 0; i
< MP_CPUS_CALL_BUFS_PER_CPU
; i
++) {
1069 callp
= (mp_call_t
*) kalloc(sizeof(mp_call_t
));
1070 mp_call_free(callp
);
1073 DBG("mp_cpus_call_init() done on cpu %d\n", cpu_number());
1077 * This is called from cpu_signal_handler() to process an MP_CALL signal.
1078 * And also from i386_deactivate_cpu() when a cpu is being taken offline.
1081 mp_cpus_call_action(void)
1083 mp_call_queue_t
*cqp
;
1084 boolean_t intrs_enabled
;
1088 assert(!ml_get_interrupts_enabled());
1089 cqp
= &mp_cpus_call_head
[cpu_number()];
1090 intrs_enabled
= mp_call_head_lock(cqp
);
1091 while ((callp
= mp_call_dequeue_locked(cqp
)) != NULL
) {
1092 /* Copy call request to the stack to free buffer */
1094 mp_call_free(callp
);
1095 if (call
.func
!= NULL
) {
1096 mp_call_head_unlock(cqp
, intrs_enabled
);
1097 KERNEL_DEBUG_CONSTANT(
1098 TRACE_MP_CPUS_CALL_ACTION
,
1099 call
.func
, call
.arg0
, call
.arg1
, call
.countp
, 0);
1100 call
.func(call
.arg0
, call
.arg1
);
1101 (void) mp_call_head_lock(cqp
);
1103 if (call
.countp
!= NULL
)
1104 atomic_incl(call
.countp
, 1);
1106 mp_call_head_unlock(cqp
, intrs_enabled
);
1110 * mp_cpus_call() runs a given function on cpus specified in a given cpu mask.
1111 * Possible modes are:
1112 * SYNC: function is called serially on target cpus in logical cpu order
1113 * waiting for each call to be acknowledged before proceeding
1114 * ASYNC: function call is queued to the specified cpus
1115 * waiting for all calls to complete in parallel before returning
1116 * NOSYNC: function calls are queued
1117 * but we return before confirmation of calls completing.
1118 * The action function may be NULL.
1119 * The cpu mask may include the local cpu. Offline cpus are ignored.
1120 * The return value is the number of cpus on which the call was made or queued.
1126 void (*action_func
)(void *),
1129 return mp_cpus_call1(
1132 (void (*)(void *,void *))action_func
,
1140 mp_cpus_call_wait(boolean_t intrs_enabled
,
1141 long mp_cpus_signals
,
1142 volatile long *mp_cpus_calls
)
1144 mp_call_queue_t
*cqp
;
1145 uint64_t tsc_spin_start
;
1147 cqp
= &mp_cpus_call_head
[cpu_number()];
1149 tsc_spin_start
= rdtsc64();
1150 while (*mp_cpus_calls
< mp_cpus_signals
) {
1151 if (!intrs_enabled
) {
1152 /* Sniffing w/o locking */
1153 if (!queue_empty(&cqp
->queue
))
1154 mp_cpus_call_action();
1155 handle_pending_TLB_flushes();
1157 mp_spin_timeout_check(tsc_spin_start
, "mp_cpus_call_wait()");
1165 void (*action_func
)(void *, void *),
1168 cpumask_t
*cpus_calledp
,
1169 cpumask_t
*cpus_notcalledp
)
1172 boolean_t intrs_enabled
= FALSE
;
1173 boolean_t call_self
= FALSE
;
1174 cpumask_t cpus_called
= 0;
1175 cpumask_t cpus_notcalled
= 0;
1176 long mp_cpus_signals
= 0;
1177 volatile long mp_cpus_calls
= 0;
1178 uint64_t tsc_spin_start
;
1180 KERNEL_DEBUG_CONSTANT(
1181 TRACE_MP_CPUS_CALL
| DBG_FUNC_START
,
1182 cpus
, mode
, VM_KERNEL_UNSLIDE(action_func
), arg0
, arg1
);
1184 if (!smp_initialized
) {
1185 if ((cpus
& CPUMASK_SELF
) == 0)
1187 if (action_func
!= NULL
) {
1188 intrs_enabled
= ml_set_interrupts_enabled(FALSE
);
1189 action_func(arg0
, arg1
);
1190 ml_set_interrupts_enabled(intrs_enabled
);
1197 * Queue the call for each non-local requested cpu.
1198 * The topo lock is not taken. Instead we sniff the cpu_running state
1199 * and then re-check it after taking the call lock. A cpu being taken
1200 * offline runs the action function after clearing the cpu_running.
1202 mp_disable_preemption(); /* interrupts may be enabled */
1203 tsc_spin_start
= rdtsc64();
1204 for (cpu
= 0; cpu
< (cpu_t
) real_ncpus
; cpu
++) {
1205 if (((cpu_to_cpumask(cpu
) & cpus
) == 0) ||
1206 !cpu_datap(cpu
)->cpu_running
)
1208 if (cpu
== (cpu_t
) cpu_number()) {
1210 * We don't IPI ourself and if calling asynchronously,
1211 * we defer our call until we have signalled all others.
1214 cpus_called
|= cpu_to_cpumask(cpu
);
1215 if (mode
== SYNC
&& action_func
!= NULL
) {
1216 KERNEL_DEBUG_CONSTANT(
1217 TRACE_MP_CPUS_CALL_LOCAL
,
1218 VM_KERNEL_UNSLIDE(action_func
),
1220 action_func(arg0
, arg1
);
1224 * Here to queue a call to cpu and IPI.
1225 * Spinning for request buffer unless NOSYNC.
1227 mp_call_t
*callp
= NULL
;
1228 mp_call_queue_t
*cqp
= &mp_cpus_call_head
[cpu
];
1232 callp
= mp_call_alloc();
1233 intrs_enabled
= mp_call_head_lock(cqp
);
1234 if (!cpu_datap(cpu
)->cpu_running
) {
1235 mp_call_head_unlock(cqp
, intrs_enabled
);
1238 if (mode
== NOSYNC
) {
1239 if (callp
== NULL
) {
1240 cpus_notcalled
|= cpu_to_cpumask(cpu
);
1241 mp_call_head_unlock(cqp
, intrs_enabled
);
1242 KERNEL_DEBUG_CONSTANT(
1243 TRACE_MP_CPUS_CALL_NOBUF
,
1247 callp
->countp
= NULL
;
1249 if (callp
== NULL
) {
1250 mp_call_head_unlock(cqp
, intrs_enabled
);
1251 KERNEL_DEBUG_CONSTANT(
1252 TRACE_MP_CPUS_CALL_NOBUF
,
1254 if (!intrs_enabled
) {
1255 /* Sniffing w/o locking */
1256 if (!queue_empty(&cqp
->queue
))
1257 mp_cpus_call_action();
1258 handle_pending_TLB_flushes();
1260 mp_spin_timeout_check(
1265 callp
->countp
= &mp_cpus_calls
;
1267 callp
->func
= action_func
;
1270 mp_call_enqueue_locked(cqp
, callp
);
1272 cpus_called
|= cpu_to_cpumask(cpu
);
1273 i386_signal_cpu(cpu
, MP_CALL
, ASYNC
);
1274 mp_call_head_unlock(cqp
, intrs_enabled
);
1276 mp_cpus_call_wait(intrs_enabled
, mp_cpus_signals
, &mp_cpus_calls
);
1281 /* Call locally if mode not SYNC */
1282 if (mode
!= SYNC
&& call_self
) {
1283 KERNEL_DEBUG_CONSTANT(
1284 TRACE_MP_CPUS_CALL_LOCAL
,
1285 VM_KERNEL_UNSLIDE(action_func
), arg0
, arg1
, 0, 0);
1286 if (action_func
!= NULL
) {
1287 ml_set_interrupts_enabled(FALSE
);
1288 action_func(arg0
, arg1
);
1289 ml_set_interrupts_enabled(intrs_enabled
);
1293 /* Safe to allow pre-emption now */
1294 mp_enable_preemption();
1296 /* For ASYNC, now wait for all signaled cpus to complete their calls */
1297 if (mode
== ASYNC
) {
1298 mp_cpus_call_wait(intrs_enabled
, mp_cpus_signals
, &mp_cpus_calls
);
1302 cpu
= (cpu_t
) mp_cpus_signals
+ (call_self
? 1 : 0);
1305 *cpus_calledp
= cpus_called
;
1306 if (cpus_notcalledp
)
1307 *cpus_notcalledp
= cpus_notcalled
;
1309 KERNEL_DEBUG_CONSTANT(
1310 TRACE_MP_CPUS_CALL
| DBG_FUNC_END
,
1311 cpu
, cpus_called
, cpus_notcalled
, 0, 0);
1318 mp_broadcast_action(void)
1320 /* call action function */
1321 if (mp_bc_action_func
!= NULL
)
1322 mp_bc_action_func(mp_bc_func_arg
);
1324 /* if we're the last one through, wake up the instigator */
1325 if (atomic_decl_and_test(&mp_bc_count
, 1))
1326 thread_wakeup(((event_t
)(uintptr_t) &mp_bc_count
));
1330 * mp_broadcast() runs a given function on all active cpus.
1331 * The caller blocks until the functions has run on all cpus.
1332 * The caller will also block if there is another pending braodcast.
1336 void (*action_func
)(void *),
1339 if (!smp_initialized
) {
1340 if (action_func
!= NULL
)
1345 /* obtain broadcast lock */
1346 lck_mtx_lock(&mp_bc_lock
);
1348 /* set static function pointers */
1349 mp_bc_action_func
= action_func
;
1350 mp_bc_func_arg
= arg
;
1352 assert_wait((event_t
)(uintptr_t)&mp_bc_count
, THREAD_UNINT
);
1355 * signal other processors, which will call mp_broadcast_action()
1357 simple_lock(&x86_topo_lock
);
1358 mp_bc_ncpus
= i386_active_cpus(); /* total including this cpu */
1359 mp_bc_count
= mp_bc_ncpus
;
1360 i386_signal_cpus(MP_BROADCAST
, ASYNC
);
1362 /* call executor function on this cpu */
1363 mp_broadcast_action();
1364 simple_unlock(&x86_topo_lock
);
1366 /* block for all cpus to have run action_func */
1367 if (mp_bc_ncpus
> 1)
1368 thread_block(THREAD_CONTINUE_NULL
);
1370 clear_wait(current_thread(), THREAD_AWAKENED
);
1373 lck_mtx_unlock(&mp_bc_lock
);
1377 i386_activate_cpu(void)
1379 cpu_data_t
*cdp
= current_cpu_datap();
1381 assert(!ml_get_interrupts_enabled());
1383 if (!smp_initialized
) {
1384 cdp
->cpu_running
= TRUE
;
1388 simple_lock(&x86_topo_lock
);
1389 cdp
->cpu_running
= TRUE
;
1391 simple_unlock(&x86_topo_lock
);
1396 i386_deactivate_cpu(void)
1398 cpu_data_t
*cdp
= current_cpu_datap();
1400 assert(!ml_get_interrupts_enabled());
1402 KERNEL_DEBUG_CONSTANT(
1403 TRACE_MP_CPU_DEACTIVATE
| DBG_FUNC_START
,
1406 simple_lock(&x86_topo_lock
);
1407 cdp
->cpu_running
= FALSE
;
1408 simple_unlock(&x86_topo_lock
);
1411 * Move all of this cpu's timers to the master/boot cpu,
1412 * and poke it in case there's a sooner deadline for it to schedule.
1414 timer_queue_shutdown(&cdp
->rtclock_timer
.queue
);
1415 mp_cpus_call(cpu_to_cpumask(master_cpu
), ASYNC
, timer_queue_expire_local
, NULL
);
1418 * Open an interrupt window
1419 * and ensure any pending IPI or timer is serviced
1421 mp_disable_preemption();
1422 ml_set_interrupts_enabled(TRUE
);
1424 while (cdp
->cpu_signals
&& x86_lcpu()->rtcDeadline
!= EndOfAllTime
)
1427 * Ensure there's no remaining timer deadline set
1428 * - AICPM may have left one active.
1432 ml_set_interrupts_enabled(FALSE
);
1433 mp_enable_preemption();
1435 KERNEL_DEBUG_CONSTANT(
1436 TRACE_MP_CPU_DEACTIVATE
| DBG_FUNC_END
,
1440 int pmsafe_debug
= 1;
1443 volatile boolean_t mp_kdp_trap
= FALSE
;
1444 volatile unsigned long mp_kdp_ncpus
;
1445 boolean_t mp_kdp_state
;
1452 unsigned int ncpus
= 0;
1453 unsigned int my_cpu
;
1454 uint64_t tsc_timeout
;
1456 DBG("mp_kdp_enter()\n");
1459 if (!smp_initialized
)
1460 simple_lock_init(&mp_kdp_lock
, 0);
1464 * Here to enter the debugger.
1465 * In case of races, only one cpu is allowed to enter kdp after
1468 mp_kdp_state
= ml_set_interrupts_enabled(FALSE
);
1469 my_cpu
= cpu_number();
1471 if (my_cpu
== (unsigned) debugger_cpu
) {
1472 kprintf("\n\nRECURSIVE DEBUGGER ENTRY DETECTED\n\n");
1477 cpu_datap(my_cpu
)->debugger_entry_time
= mach_absolute_time();
1478 simple_lock(&mp_kdp_lock
);
1480 if (pmsafe_debug
&& !kdp_snapshot
)
1481 pmSafeMode(¤t_cpu_datap()->lcpu
, PM_SAFE_FL_SAFE
);
1483 while (mp_kdp_trap
) {
1484 simple_unlock(&mp_kdp_lock
);
1485 DBG("mp_kdp_enter() race lost\n");
1487 mp_kdp_wait(TRUE
, FALSE
);
1489 simple_lock(&mp_kdp_lock
);
1491 debugger_cpu
= my_cpu
;
1493 mp_kdp_ncpus
= 1; /* self */
1495 debugger_entry_time
= cpu_datap(my_cpu
)->debugger_entry_time
;
1496 simple_unlock(&mp_kdp_lock
);
1499 * Deliver a nudge to other cpus, counting how many
1501 DBG("mp_kdp_enter() signaling other processors\n");
1502 if (force_immediate_debugger_NMI
== FALSE
) {
1503 for (cpu
= 0; cpu
< real_ncpus
; cpu
++) {
1504 if (cpu
== my_cpu
|| !cpu_datap(cpu
)->cpu_running
)
1507 i386_signal_cpu(cpu
, MP_KDP
, ASYNC
);
1510 * Wait other processors to synchronize
1512 DBG("mp_kdp_enter() waiting for (%d) processors to suspend\n", ncpus
);
1515 * This timeout is rather arbitrary; we don't want to NMI
1516 * processors that are executing at potentially
1517 * "unsafe-to-interrupt" points such as the trampolines,
1518 * but neither do we want to lose state by waiting too long.
1520 tsc_timeout
= rdtsc64() + (ncpus
* 1000 * 1000 * 10ULL);
1523 tsc_timeout
= ~0ULL;
1525 while (mp_kdp_ncpus
!= ncpus
&& rdtsc64() < tsc_timeout
) {
1527 * A TLB shootdown request may be pending--this would
1528 * result in the requesting processor waiting in
1529 * PMAP_UPDATE_TLBS() until this processor deals with it.
1530 * Process it, so it can now enter mp_kdp_wait()
1532 handle_pending_TLB_flushes();
1535 /* If we've timed out, and some processor(s) are still unresponsive,
1536 * interrupt them with an NMI via the local APIC.
1538 if (mp_kdp_ncpus
!= ncpus
) {
1539 for (cpu
= 0; cpu
< real_ncpus
; cpu
++) {
1540 if (cpu
== my_cpu
|| !cpu_datap(cpu
)->cpu_running
)
1542 if (cpu_signal_pending(cpu
, MP_KDP
))
1543 cpu_NMI_interrupt(cpu
);
1548 for (cpu
= 0; cpu
< real_ncpus
; cpu
++) {
1549 if (cpu
== my_cpu
|| !cpu_datap(cpu
)->cpu_running
)
1551 cpu_NMI_interrupt(cpu
);
1554 DBG("mp_kdp_enter() %d processors done %s\n",
1555 (int)mp_kdp_ncpus
, (mp_kdp_ncpus
== ncpus
) ? "OK" : "timed out");
1557 postcode(MP_KDP_ENTER
);
1561 cpu_signal_pending(int cpu
, mp_event_t event
)
1563 volatile int *signals
= &cpu_datap(cpu
)->cpu_signals
;
1564 boolean_t retval
= FALSE
;
1566 if (i_bit(event
, signals
))
1571 long kdp_x86_xcpu_invoke(const uint16_t lcpu
, kdp_x86_xcpu_func_t func
,
1572 void *arg0
, void *arg1
)
1574 if (lcpu
> (real_ncpus
- 1))
1580 kdp_xcpu_call_func
.func
= func
;
1581 kdp_xcpu_call_func
.ret
= -1;
1582 kdp_xcpu_call_func
.arg0
= arg0
;
1583 kdp_xcpu_call_func
.arg1
= arg1
;
1584 kdp_xcpu_call_func
.cpu
= lcpu
;
1585 DBG("Invoking function %p on CPU %d\n", func
, (int32_t)lcpu
);
1586 while (kdp_xcpu_call_func
.cpu
!= KDP_XCPU_NONE
)
1588 return kdp_xcpu_call_func
.ret
;
1592 kdp_x86_xcpu_poll(void)
1594 if ((uint16_t)cpu_number() == kdp_xcpu_call_func
.cpu
) {
1595 kdp_xcpu_call_func
.ret
=
1596 kdp_xcpu_call_func
.func(kdp_xcpu_call_func
.arg0
,
1597 kdp_xcpu_call_func
.arg1
,
1599 kdp_xcpu_call_func
.cpu
= KDP_XCPU_NONE
;
1604 mp_kdp_wait(boolean_t flush
, boolean_t isNMI
)
1606 DBG("mp_kdp_wait()\n");
1607 /* If an I/O port has been specified as a debugging aid, issue a read */
1608 panic_io_port_read();
1609 current_cpu_datap()->debugger_ipi_time
= mach_absolute_time();
1611 /* If we've trapped due to a machine-check, save MCA registers */
1615 atomic_incl((volatile long *)&mp_kdp_ncpus
, 1);
1616 while (mp_kdp_trap
|| (isNMI
== TRUE
)) {
1618 * A TLB shootdown request may be pending--this would result
1619 * in the requesting processor waiting in PMAP_UPDATE_TLBS()
1620 * until this processor handles it.
1621 * Process it, so it can now enter mp_kdp_wait()
1624 handle_pending_TLB_flushes();
1626 kdp_x86_xcpu_poll();
1630 atomic_decl((volatile long *)&mp_kdp_ncpus
, 1);
1631 DBG("mp_kdp_wait() done\n");
1637 DBG("mp_kdp_exit()\n");
1639 atomic_decl((volatile long *)&mp_kdp_ncpus
, 1);
1641 debugger_exit_time
= mach_absolute_time();
1643 mp_kdp_trap
= FALSE
;
1646 /* Wait other processors to stop spinning. XXX needs timeout */
1647 DBG("mp_kdp_exit() waiting for processors to resume\n");
1648 while (mp_kdp_ncpus
> 0) {
1650 * a TLB shootdown request may be pending... this would result in the requesting
1651 * processor waiting in PMAP_UPDATE_TLBS() until this processor deals with it.
1652 * Process it, so it can now enter mp_kdp_wait()
1654 handle_pending_TLB_flushes();
1659 if (pmsafe_debug
&& !kdp_snapshot
)
1660 pmSafeMode(¤t_cpu_datap()->lcpu
, PM_SAFE_FL_NORMAL
);
1662 debugger_exit_time
= mach_absolute_time();
1664 DBG("mp_kdp_exit() done\n");
1665 (void) ml_set_interrupts_enabled(mp_kdp_state
);
1668 #endif /* MACH_KDP */
1671 mp_recent_debugger_activity() {
1672 uint64_t abstime
= mach_absolute_time();
1673 return (((abstime
- debugger_entry_time
) < LastDebuggerEntryAllowance
) ||
1674 ((abstime
- debugger_exit_time
) < LastDebuggerEntryAllowance
));
1680 __unused processor_t processor
)
1686 processor_t processor
)
1688 int cpu
= processor
->cpu_id
;
1690 if (cpu
!= cpu_number()) {
1691 i386_signal_cpu(cpu
, MP_AST
, ASYNC
);
1692 KERNEL_DEBUG_CONSTANT(MACHDBG_CODE(DBG_MACH_SCHED
, MACH_REMOTE_AST
), cpu
, 1, 0, 0, 0);
1697 slave_machine_init(void *param
)
1700 * Here in process context, but with interrupts disabled.
1702 DBG("slave_machine_init() CPU%d\n", get_cpu_number());
1704 if (param
== FULL_SLAVE_INIT
) {
1709 cpu_machine_init(); /* Interrupts enabled hereafter */
1710 mp_cpus_call_cpu_init();
1712 cpu_machine_init(); /* Interrupts enabled hereafter */
1717 int cpu_number(void)
1719 return get_cpu_number();
1727 simple_lock_init(&cpu_warm_lock
, 0);
1728 queue_init(&cpu_warm_call_list
);
1729 for (i
= 0; i
< NUM_CPU_WARM_CALLS
; i
++) {
1730 enqueue_head(&cpu_warm_call_list
, (queue_entry_t
)&cpu_warm_call_arr
[i
]);
1735 grab_warm_timer_call()
1738 timer_call_t call
= NULL
;
1741 simple_lock(&cpu_warm_lock
);
1742 if (!queue_empty(&cpu_warm_call_list
)) {
1743 call
= (timer_call_t
) dequeue_head(&cpu_warm_call_list
);
1745 simple_unlock(&cpu_warm_lock
);
1752 free_warm_timer_call(timer_call_t call
)
1757 simple_lock(&cpu_warm_lock
);
1758 enqueue_head(&cpu_warm_call_list
, (queue_entry_t
)call
);
1759 simple_unlock(&cpu_warm_lock
);
1764 * Runs in timer call context (interrupts disabled).
1767 cpu_warm_timer_call_func(
1768 call_entry_param_t p0
,
1769 __unused call_entry_param_t p1
)
1771 free_warm_timer_call((timer_call_t
)p0
);
1776 * Runs with interrupts disabled on the CPU we wish to warm (i.e. CPU 0).
1782 cpu_warm_data_t cwdp
= (cpu_warm_data_t
)arg
;
1784 timer_call_enter(cwdp
->cwd_call
, cwdp
->cwd_deadline
, TIMER_CALL_SYS_CRITICAL
| TIMER_CALL_LOCAL
);
1785 cwdp
->cwd_result
= 0;
1791 * Not safe to call with interrupts disabled.
1794 ml_interrupt_prewarm(
1797 struct cpu_warm_data cwd
;
1801 if (ml_get_interrupts_enabled() == FALSE
) {
1802 panic("%s: Interrupts disabled?\n", __FUNCTION__
);
1806 * If the platform doesn't need our help, say that we succeeded.
1808 if (!ml_get_interrupt_prewake_applicable()) {
1809 return KERN_SUCCESS
;
1813 * Grab a timer call to use.
1815 call
= grab_warm_timer_call();
1817 return KERN_RESOURCE_SHORTAGE
;
1820 timer_call_setup(call
, cpu_warm_timer_call_func
, call
);
1821 cwd
.cwd_call
= call
;
1822 cwd
.cwd_deadline
= deadline
;
1826 * For now, non-local interrupts happen on the master processor.
1828 ct
= mp_cpus_call(cpu_to_cpumask(master_cpu
), SYNC
, _cpu_warm_setup
, &cwd
);
1830 free_warm_timer_call(call
);
1831 return KERN_FAILURE
;
1833 return cwd
.cwd_result
;