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[apple/xnu.git] / iokit / Drivers / network / drvPPCUniN / UniNEnetHW.cpp
1 /*
2 * Copyright (c) 1998-2000 Apple Computer, Inc. All rights reserved.
3 *
4 * @APPLE_LICENSE_HEADER_START@
5 *
6 * The contents of this file constitute Original Code as defined in and
7 * are subject to the Apple Public Source License Version 1.1 (the
8 * "License"). You may not use this file except in compliance with the
9 * License. Please obtain a copy of the License at
10 * http://www.apple.com/publicsource and read it before using this file.
11 *
12 * This Original Code and all software distributed under the License are
13 * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
14 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
15 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the
17 * License for the specific language governing rights and limitations
18 * under the License.
19 *
20 * @APPLE_LICENSE_HEADER_END@
21 */
22 /*
23 * Copyright (c) 1998-1999 Apple Software, Inc.
24 *
25 * Miscellaneous definitions for the Sun GEM Ethernet controller.
26 *
27 * HISTORY
28 *
29 */
30
31 #include "UniNEnetPrivate.h"
32
33
34 void xWriteUniNRegister( IOPPCAddress ioBaseEnet, u_int32_t reg_offset, u_int32_t data )
35 {
36 switch ( reg_offset >> 16 )
37 {
38 case 1:
39 ((u_int8_t *) ioBaseEnet)[reg_offset & 0xffff] = data;
40 break;
41 case 2:
42 ((u_int16_t *)ioBaseEnet)[(reg_offset & 0xFFFF) >> 1] = OSSwapInt16( data );
43 break;
44 case 4:
45 ((u_int32_t *)ioBaseEnet)[(reg_offset & 0xFFFF) >> 2] = OSSwapInt32( data );
46 break;
47 }
48 eieio();
49 }
50
51
52 volatile u_int32_t xReadUniNRegister( IOPPCAddress ioBaseEnet, u_int32_t reg_offset )
53 {
54 switch ( reg_offset >> 16 )
55 {
56 case 1:
57 return ((u_int8_t *) ioBaseEnet)[reg_offset & 0xffff];
58
59 case 2:
60 return OSSwapInt16( ((u_int16_t *)ioBaseEnet)[(reg_offset & 0xFFFF) >> 1] );
61
62 case 4:
63 return OSSwapInt32( ((u_int32_t *)ioBaseEnet)[(reg_offset & 0xFFFF) >> 2] );
64 }
65
66 return 0;
67 }
68
69
70 /*
71 * Procedure for reading EEPROM
72 */