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1 /*
2 * Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
3 *
4 * @APPLE_LICENSE_HEADER_START@
5 *
6 * The contents of this file constitute Original Code as defined in and
7 * are subject to the Apple Public Source License Version 1.1 (the
8 * "License"). You may not use this file except in compliance with the
9 * License. Please obtain a copy of the License at
10 * http://www.apple.com/publicsource and read it before using this file.
11 *
12 * This Original Code and all software distributed under the License are
13 * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
14 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
15 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the
17 * License for the specific language governing rights and limitations
18 * under the License.
19 *
20 * @APPLE_LICENSE_HEADER_END@
21 */
22 /*
23 * Copyright 1996 1995 by Open Software Foundation, Inc. 1997 1996 1995 1994 1993 1992 1991
24 * All Rights Reserved
25 *
26 * Permission to use, copy, modify, and distribute this software and
27 * its documentation for any purpose and without fee is hereby granted,
28 * provided that the above copyright notice appears in all copies and
29 * that both the copyright notice and this permission notice appear in
30 * supporting documentation.
31 *
32 * OSF DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE
33 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
34 * FOR A PARTICULAR PURPOSE.
35 *
36 * IN NO EVENT SHALL OSF BE LIABLE FOR ANY SPECIAL, INDIRECT, OR
37 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
38 * LOSS OF USE, DATA OR PROFITS, WHETHER IN ACTION OF CONTRACT,
39 * NEGLIGENCE, OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION
40 * WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
41 *
42 */
43 /*
44 * Copyright 1996 1995 by Apple Computer, Inc. 1997 1996 1995 1994 1993 1992 1991
45 * All Rights Reserved
46 *
47 * Permission to use, copy, modify, and distribute this software and
48 * its documentation for any purpose and without fee is hereby granted,
49 * provided that the above copyright notice appears in all copies and
50 * that both the copyright notice and this permission notice appear in
51 * supporting documentation.
52 *
53 * APPLE COMPUTER DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE
54 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
55 * FOR A PARTICULAR PURPOSE.
56 *
57 * IN NO EVENT SHALL APPLE COMPUTER BE LIABLE FOR ANY SPECIAL, INDIRECT, OR
58 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
59 * LOSS OF USE, DATA OR PROFITS, WHETHER IN ACTION OF CONTRACT,
60 * NEGLIGENCE, OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION
61 * WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
62 */
63 /*
64 * MKLINUX-1.0DR2
65 */
66 /*
67 * PMach Operating System
68 * Copyright (c) 1995 Santa Clara University
69 * All Rights Reserved.
70 */
71 /*
72 * Mach Operating System
73 * Copyright (c) 1991,1990,1989 Carnegie Mellon University
74 * All Rights Reserved.
75 *
76 * Permission to use, copy, modify and distribute this software and its
77 * documentation is hereby granted, provided that both the copyright
78 * notice and this permission notice appear in all copies of the
79 * software, derivative works or modified versions, and any portions
80 * thereof, and that both notices appear in supporting documentation.
81 *
82 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
83 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
84 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
85 *
86 * Carnegie Mellon requests users of this software to return to
87 *
88 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
89 * School of Computer Science
90 * Carnegie Mellon University
91 * Pittsburgh PA 15213-3890
92 *
93 * any improvements or extensions that they make and grant Carnegie Mellon
94 * the rights to redistribute these changes.
95 */
96 /*
97 * File: if_3c501.h
98 * Author: Philippe Bernadat
99 * Date: 1989
100 * Copyright (c) 1989 OSF Research Institute
101 *
102 * 3COM Etherlink 3C501 Mach Ethernet drvier
103 */
104 /*
105 Copyright 1990 by Open Software Foundation,
106 Cambridge, MA.
107
108 All Rights Reserved
109
110 Permission to use, copy, modify, and distribute this software and
111 its documentation for any purpose and without fee is hereby granted,
112 provided that the above copyright notice appears in all copies and
113 that both the copyright notice and this permission notice appear in
114 supporting documentation, and that the name of OSF or Open Software
115 Foundation not be used in advertising or publicity pertaining to
116 distribution of the software without specific, written prior
117 permission.
118
119 OSF DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE
120 INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS,
121 IN NO EVENT SHALL OSF BE LIABLE FOR ANY SPECIAL, INDIRECT, OR
122 CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
123 LOSS OF USE, DATA OR PROFITS, WHETHER IN ACTION OF CONTRACT,
124 NEGLIGENCE, OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION
125 WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
126 */
127
128 #ifdef KERNEL
129 #include <sys/cdefs.h>
130 #endif
131
132
133 #define ENETPAD(n) char n[15]
134
135 /* 0x50f0a000 */
136 struct mace_board {
137 volatile unsigned char rcvfifo; /* 00 receive fifo */
138 ENETPAD(epad0);
139 volatile unsigned char xmtfifo; /* 01 transmit fifo */
140 ENETPAD(epad1);
141 volatile unsigned char xmtfc; /* 02 transmit frame control */
142 ENETPAD(epad2);
143 volatile unsigned char xmtfs; /* 03 transmit frame status */
144 ENETPAD(epad3);
145 volatile unsigned char xmtrc; /* 04 transmit retry count */
146 ENETPAD(epad4);
147 volatile unsigned char rcvfc; /* 05 receive frame control -- 4 bytes */
148 ENETPAD(epad5);
149 volatile unsigned char rcvfs; /* 06 receive frame status */
150 ENETPAD(epad6);
151 volatile unsigned char fifofc; /* 07 fifo frame count */
152 ENETPAD(epad7);
153 volatile unsigned char ir; /* 08 interrupt */
154 ENETPAD(epad8);
155 volatile unsigned char imr; /* 09 interrupt mask */
156 ENETPAD(epad9);
157 volatile unsigned char pr; /* 10 poll */
158 ENETPAD(epad10);
159 volatile unsigned char biucc; /* 11 bus interface unit configuration control */
160 ENETPAD(epad11);
161 volatile unsigned char fifocc; /* 12 fifo configuration control */
162 ENETPAD(epad12);
163 volatile unsigned char maccc; /* 13 media access control configuration control */
164 ENETPAD(epad13);
165 volatile unsigned char plscc; /* 14 physical layer signalling configuration control */
166 ENETPAD(epad14);
167 volatile unsigned char phycc; /* 15 physical layer configuration control */
168 ENETPAD(epad15);
169 volatile unsigned char chipid1; /* 16 chip identification LSB */
170 ENETPAD(epad16);
171 volatile unsigned char chipid2; /* 17 chip identification MSB */
172 ENETPAD(epad17);
173 volatile unsigned char iac; /* 18 internal address configuration */
174 ENETPAD(epad18);
175 volatile unsigned char res1; /* 19 */
176 ENETPAD(epad19);
177 volatile unsigned char ladrf; /* 20 logical address filter -- 8 bytes */
178 ENETPAD(epad20);
179 volatile unsigned char padr; /* 21 physical address -- 6 bytes */
180 ENETPAD(epad21);
181 volatile unsigned char res2; /* 22 */
182 ENETPAD(epad22);
183 volatile unsigned char res3; /* 23 */
184 ENETPAD(epad23);
185 volatile unsigned char mpc; /* 24 missed packet count */
186 ENETPAD(epad24);
187 volatile unsigned char res4; /* 25 */
188 ENETPAD(epad25);
189 volatile unsigned char rntpc; /* 26 runt packet count */
190 ENETPAD(epad26);
191 volatile unsigned char rcvcc; /* 27 receive collision count */
192 ENETPAD(epad27);
193 volatile unsigned char res5; /* 28 */
194 ENETPAD(epad28);
195 volatile unsigned char utr; /* 29 user test */
196 ENETPAD(epad29);
197 volatile unsigned char res6; /* 30 */
198 ENETPAD(epad30);
199 volatile unsigned char res7; /* 31 */
200 };
201
202 /*
203 * Chip Revisions..
204 */
205
206 #define MACE_REVISION_B0 0x0940
207 #define MACE_REVISION_A2 0x0941
208
209 /* xmtfc */
210 #define XMTFC_DRTRY 0X80
211 #define XMTFC_DXMTFCS 0x08
212 #define XMTFC_APADXNT 0x01
213
214 /* xmtfs */
215 #define XMTFS_XNTSV 0x80
216 #define XMTFS_XMTFS 0x40
217 #define XMTFS_LCOL 0x20
218 #define XMTFS_MORE 0x10
219 #define XMTFS_ONE 0x08
220 #define XMTFS_DEFER 0x04
221 #define XMTFS_LCAR 0x02
222 #define XMTFS_RTRY 0x01
223
224 /* xmtrc */
225 #define XMTRC_EXDEF 0x80
226
227 /* rcvfc */
228 #define RCVFC_LLRCV 0x08
229 #define RCVFC_M_R 0x04
230 #define RCVFC_ASTRPRCV 0x01
231
232 /* rcvfs */
233 #define RCVFS_OFLO 0x80
234 #define RCVFS_CLSN 0x40
235 #define RCVFS_FRAM 0x20
236 #define RCVFS_FCS 0x10
237 #define RCVFS_REVCNT 0x0f
238
239 /* fifofc */
240 #define FIFOCC_XFW_8 0x00
241 #define FIFOCC_XFW_16 0x40
242 #define FIFOCC_XFW_32 0x80
243 #define FIFOCC_XFW_XX 0xc0
244 #define FIFOCC_RFW_16 0x00
245 #define FIFOCC_RFW_32 0x10
246 #define FIFOCC_RFW_64 0x20
247 #define FIFOCC_RFW_XX 0x30
248 #define FIFOCC_XFWU 0x08
249 #define FIFOCC_RFWU 0x04
250 #define FIFOCC_XBRST 0x02
251 #define FIFOCC_RBRST 0x01
252
253
254 /* ir */
255 #define IR_JAB 0x80
256 #define IR_BABL 0x40
257 #define IR_CERR 0x20
258 #define IR_RCVCCO 0x10
259 #define IR_RNTPCO 0x08
260 #define IR_MPCO 0x04
261 #define IR_RCVINT 0x02
262 #define IR_XMTINT 0x01
263
264 /* imr */
265 #define IMR_MJAB 0x80
266 #define IMR_MBABL 0x40
267 #define IMR_MCERR 0x20
268 #define IMR_MRCVCCO 0x10
269 #define IMR_MRNTPCO 0x08
270 #define IMR_MMPCO 0x04
271 #define IMR_MRCVINT 0x02
272 #define IMR_MXMTINT 0x01
273
274 /* pr */
275 #define PR_XMTSV 0x80
276 #define PR_TDTREQ 0x40
277 #define PR_RDTREQ 0x20
278
279 /* biucc */
280 #define BIUCC_BSWP 0x40
281 #define BIUCC_XMTSP04 0x00
282 #define BIUCC_XMTSP16 0x10
283 #define BIUCC_XMTSP64 0x20
284 #define BIUCC_XMTSP112 0x30
285 #define BIUCC_SWRST 0x01
286
287 /* fifocc */
288 #define FIFOCC_XMTFW08W 0x00
289 #define FIFOCC_XMTFW16W 0x40
290 #define FIFOCC_XMTFW32W 0x80
291
292 #define FIFOCC_RCVFW16 0x00
293 #define FIFOCC_RCVFW32 0x10
294 #define FIFOCC_RCVFW64 0x20
295
296 #define FIFOCC_XMTFWU 0x08
297 #define FIFOCC_RCVFWU 0x04
298 #define FIFOCC_XMTBRST 0x02
299 #define FIFOCC_RCVBRST 0x01
300
301 /* maccc */
302 #define MACCC_PROM 0x80
303 #define MACCC_DXMT2PD 0x40
304 #define MACCC_EMBA 0x20
305 #define MACCC_DRCVPA 0x08
306 #define MACCC_DRCVBC 0x04
307 #define MACCC_ENXMT 0x02
308 #define MACCC_ENRCV 0x01
309
310 /* plscc */
311 #define PLSCC_XMTSEL 0x08
312 #define PLSCC_AUI 0x00
313 #define PLSCC_TENBASE 0x02
314 #define PLSCC_DAI 0x04
315 #define PLSCC_GPSI 0x06
316 #define PLSCC_ENPLSIO 0x01
317
318 /* phycc */
319 #define PHYCC_LNKFL 0x80
320 #define PHYCC_DLNKTST 0x40
321 #define PHYCC_REVPOL 0x20
322 #define PHYCC_DAPC 0x10
323 #define PHYCC_LRT 0x08
324 #define PHYCC_ASEL 0x04
325 #define PHYCC_RWAKE 0x02
326 #define PHYCC_AWAKE 0x01
327
328 /* iac */
329 #define IAC_ADDRCHG 0x80
330 #define IAC_PHYADDR 0x04
331 #define IAC_LOGADDR 0x02
332
333 /* utr */
334 #define UTR_RTRE 0x80
335 #define UTR_RTRD 0x40
336 #define UTR_RPA 0x20
337 #define UTR_FCOLL 0x10
338 #define UTR_RCVFCSE 0x08
339
340 #define UTR_NOLOOP 0x00
341 #define UTR_EXTLOOP 0x02
342 #define UTR_INLOOP 0x04
343 #define UTR_INLOOP_M 0x06
344
345 #define ENET_PHYADDR_LEN 6
346 #define ENET_HEADER 14
347
348 #define BFRSIZ 2048
349 #define ETHER_ADD_SIZE 6 /* size of a MAC address */
350 #define DSF_LOCK 1
351 #define DSF_RUNNING 2
352 #define MOD_ENAL 1
353 #define MOD_PROM 2
354
355 /*
356 * MACE Chip revision codes
357 */
358 #define MACERevA2 0x0941
359 #define MACERevB0 0x0940
360
361 #ifdef KERNEL
362 int mace_delmulti __P((register struct ifreq *, register struct arpcom *,
363 struct ether_addr *));
364 int mace_addmulti __P((register struct ifreq *, register struct arpcom *));
365 void mace_sync_mcast __P((register struct ifnet *));
366 void mace_sync_promisc __P((register struct ifnet *));
367 #endif /* KERNEL */
368