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1 /*
2 * Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
3 *
4 * @APPLE_LICENSE_HEADER_START@
5 *
6 * The contents of this file constitute Original Code as defined in and
7 * are subject to the Apple Public Source License Version 1.1 (the
8 * "License"). You may not use this file except in compliance with the
9 * License. Please obtain a copy of the License at
10 * http://www.apple.com/publicsource and read it before using this file.
11 *
12 * This Original Code and all software distributed under the License are
13 * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
14 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
15 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the
17 * License for the specific language governing rights and limitations
18 * under the License.
19 *
20 * @APPLE_LICENSE_HEADER_END@
21 */
22 /*
23 * @OSF_COPYRIGHT@
24 */
25
26 /*
27 * Mach Operating System
28 * Copyright (c) 1991,1990 Carnegie Mellon University
29 * All Rights Reserved.
30 *
31 * Permission to use, copy, modify and distribute this software and its
32 * documentation is hereby granted, provided that both the copyright
33 * notice and this permission notice appear in all copies of the
34 * software, derivative works or modified versions, and any portions
35 * thereof, and that both notices appear in supporting documentation.
36 *
37 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
38 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
39 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
40 *
41 * Carnegie Mellon requests users of this software to return to
42 *
43 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
44 * School of Computer Science
45 * Carnegie Mellon University
46 * Pittsburgh PA 15213-3890
47 *
48 * any improvements or extensions that they make and grant Carnegie Mellon
49 * the rights to redistribute these changes.
50 */
51
52 #include <i386/asm.h>
53 #include <i386/mp_slave_boot.h>
54 #include <i386/postcode.h>
55
56 #define CR0_PE_ON 0x1
57 #define CR0_PE_OFF 0xfffffffe
58
59 .file "slave_boot.s"
60
61 .text
62 .align 12 // Page align for single bcopy_phys()
63
64 #define operand_size_prefix .byte 0x66
65 #define address_size_prefix .byte 0x67
66
67 #define LJMP(segment,address) \
68 operand_size_prefix ;\
69 .byte 0xea ;\
70 .long address-EXT(slave_boot_base) ;\
71 .word segment
72
73 #define LGDT(address) \
74 address_size_prefix ;\
75 operand_size_prefix ;\
76 .word 0x010f ;\
77 .byte 0x15 ;\
78 .long address-EXT(slave_boot_base)
79
80 Entry(slave_boot_base)
81 /* code is loaded at 0x0:0x1000 */
82 /* ljmp to the next instruction to set up %cs */
83 LJMP(MP_BOOTSEG, EXT(slave_rstart))
84
85 Entry(slave_rstart)
86 /* set up %ds */
87 mov %cs, %ax
88 mov %ax, %ds
89
90 POSTCODE(SLAVE_RSTART_ENTRY);
91
92 /* set up %ss and %esp */
93 mov %cs, %ax
94 mov %ax, %ss
95 mov $(MP_BOOTSTACK), %esp
96
97 /*set up %es */
98 mov %ax, %es
99
100 /* change to protected mode */
101 operand_size_prefix
102 call EXT(slave_real_to_prot)
103
104 push MP_MACH_START
105 call EXT(slave_startprog)
106
107 /*
108 slave_real_to_prot()
109 transfer from real mode to protected mode.
110 */
111
112 Entry(slave_real_to_prot)
113 /* guarantee that interrupt is disabled when in prot mode */
114 cli
115
116 POSTCODE(SLAVE_REAL_TO_PROT_ENTRY);
117
118 /* load the gdtr */
119 LGDT(EXT(gdtr))
120
121 /* load the gdtr */
122 /* set the PE bit of CR0 */
123 mov %cr0, %eax
124 or $(CR0_PE_ON), %eax
125 mov %eax, %cr0
126
127 /* make intrasegment jump to flush the processor pipeline and */
128 /* reload CS register */
129 LJMP(0x08, xprot)
130 xprot:
131
132 /* we are in USE32 mode now */
133 /* set up the protective mode segment registers : DS, SS, ES */
134 mov $0x10, %eax
135 movw %ax, %ds
136 movw %ax, %ss
137 movw %ax, %es
138
139 POSTCODE(SLAVE_REAL_TO_PROT_EXIT);
140
141 ret
142
143 /*
144 slave_startprog(phyaddr)
145 start the program on protected mode where phyaddr is the entry point
146 */
147
148 Entry(slave_startprog)
149 push %ebp
150 movl %esp, %ebp
151
152 POSTCODE(SLAVE_STARTPROG_ENTRY);
153
154 movl 0x8(%ebp), %ecx /* entry offset */
155 movl $0x28, %ebx /* segment */
156 push %ebx
157 push %ecx
158
159 /* set up %ds and %es */
160 movl $0x20, %ebx
161 movw %bx, %ds
162 movw %bx, %es
163
164 POSTCODE(SLAVE_STARTPROG_EXIT);
165
166 lret
167
168
169 . = MP_BOOTGDT-MP_BOOT /* GDT location */
170 Entry(Gdt)
171
172 /* Segment Descriptor
173 *
174 * 31 24 19 16 7 0
175 * ------------------------------------------------------------
176 * | | |B| |A| | | |1|0|E|W|A| |
177 * | BASE 31..24 |G|/|0|V| LIMIT |P|DPL| TYPE | BASE 23:16 |
178 * | | |D| |L| 19..16| | |1|1|C|R|A| |
179 * ------------------------------------------------------------
180 * | | |
181 * | BASE 15..0 | LIMIT 15..0 |
182 * | | |
183 * ------------------------------------------------------------
184 */
185 .word 0,0 /* 0x0 : null */
186 .byte 0,0,0,0
187
188 .word 0xffff,MP_BOOT /* 0x8 : boot code */
189 .byte 0,0x9e,0xcf,0
190
191 .word 0xffff,MP_BOOT /* 0x10 : boot data */
192 .byte 0,0x92,0xcf,0
193
194 .word 0xffff,MP_BOOT /* 0x18 : boot code, 16 bits */
195 .byte 0,0x9e,0x0,0
196
197 .word 0xffff,0 /* 0x20 : init data */
198 .byte 0,0x9f,0xcf,0
199
200 .word 0xffff,0 /* 0x28 : init code */
201 .byte 0,0x9f,0xcf,0
202
203 Entry(gdtr)
204 .short 48 /* limit (8*6 segs) */
205 .short MP_BOOTGDT /* base low */
206 .short 0 /* base high */
207
208 Entry(slave_boot_end)
209
210
211
212
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