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30 * Obtains cache physical layout information required for way/set
31 * data cache maintenance operations.
33 * $0: Data cache level, starting from 0
34 * $1: Output register for set increment
35 * $2: Output register for last valid set
36 * $3: Output register for way increment
38 .macro GET_CACHE_CONFIG
40 mcr p15, 2, $0, c0, c0, 0 // Select appropriate cache
41 isb // Synchronize context
43 mrc p15, 1, $0, c0, c0, 0
44 ubfx $1, $0, #3, #10 // extract number of ways - 1
46 add $1, $1, #1 // calculate number of ways
55 mov $1, #32 // calculate way increment
60 mrc p15, 1, $0, c0, c0, 0
61 ubfx $1, $0, #0, #3 // extract log2(line size) - 4
62 add $1, $1, #4 // calculate log2(line size)
64 lsl $1, $2, $1 // calculate set increment
66 ubfx $2, $0, #13, #15 // extract number of sets - 1
67 add $2, $2, #1 // calculate number of sets
68 mul $2, $1, $2 // calculate last valid set
72 * Detects the presence of an L2 cache and returns 1 if implemented,
78 mrc p15, 1, $0, c0, c0, 1
79 ubfx $0, $0, #3, #3 // extract L2 cache Ctype