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1 /*
2 * Copyright (c) 2019 Apple Inc. All rights reserved.
3 *
4 * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
5 *
6 * This file contains Original Code and/or Modifications of Original Code
7 * as defined in and that are subject to the Apple Public Source License
8 * Version 2.0 (the 'License'). You may not use this file except in
9 * compliance with the License. The rights granted to you under the License
10 * may not be used to create, or enable the creation or redistribution of,
11 * unlawful or unlicensed copies of an Apple operating system, or to
12 * circumvent, violate, or enable the circumvention or violation of, any
13 * terms of an Apple operating system software license agreement.
14 *
15 * Please obtain a copy of the License at
16 * http://www.opensource.apple.com/apsl/ and read it before using this file.
17 *
18 * The Original Code and all software distributed under the License are
19 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
20 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
21 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
22 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
23 * Please see the License for the specific language governing rights and
24 * limitations under the License.
25 *
26 * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
27 */
28
29 /*
30 * Obtains cache physical layout information required for way/set
31 * data cache maintenance operations.
32 *
33 * $0: Data cache level, starting from 0
34 * $1: Output register for set increment
35 * $2: Output register for last valid set
36 * $3: Output register for way increment
37 */
38 .macro GET_CACHE_CONFIG
39 lsl $0, $0, #1
40 mcr p15, 2, $0, c0, c0, 0 // Select appropriate cache
41 isb // Synchronize context
42
43 mrc p15, 1, $0, c0, c0, 0
44 ubfx $1, $0, #3, #10 // extract number of ways - 1
45 mov $2, $1
46 add $1, $1, #1 // calculate number of ways
47
48 mov $0, #31
49 and $2, $2, $1
50 cmp $2, #0
51 addne $0, $0, #1
52 clz $1, $1
53 sub $0, $0, $1
54
55 mov $1, #32 // calculate way increment
56 sub $3, $1, $0
57 mov $1, #1
58 lsl $3, $1, $3
59
60 mrc p15, 1, $0, c0, c0, 0
61 ubfx $1, $0, #0, #3 // extract log2(line size) - 4
62 add $1, $1, #4 // calculate log2(line size)
63 mov $2, #1
64 lsl $1, $2, $1 // calculate set increment
65
66 ubfx $2, $0, #13, #15 // extract number of sets - 1
67 add $2, $2, #1 // calculate number of sets
68 mul $2, $1, $2 // calculate last valid set
69 .endmacro
70
71 /*
72 * Detects the presence of an L2 cache and returns 1 if implemented,
73 * zero otherwise.
74 *
75 * $0: Output register
76 */
77 .macro HAS_L2_CACHE
78 mrc p15, 1, $0, c0, c0, 1
79 ubfx $0, $0, #3, #3 // extract L2 cache Ctype
80 cmp $0, #0x1
81 movls $0, #0
82 movhi $0, #1
83 .endmacro