osfmk/i386/machine_routines.h

   1 /*
   2  * Copyright (c) 2000-2019 Apple Inc. All rights reserved.
   3  *
   4  * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
   5  *
   6  * This file contains Original Code and/or Modifications of Original Code
   7  * as defined in and that are subject to the Apple Public Source License
   8  * Version 2.0 (the 'License'). You may not use this file except in
   9  * compliance with the License. The rights granted to you under the License
  10  * may not be used to create, or enable the creation or redistribution of,
  11  * unlawful or unlicensed copies of an Apple operating system, or to
  12  * circumvent, violate, or enable the circumvention or violation of, any
  13  * terms of an Apple operating system software license agreement.
  14  *
  15  * Please obtain a copy of the License at
  16  * http://www.opensource.apple.com/apsl/ and read it before using this file.
  17  *
  18  * The Original Code and all software distributed under the License are
  19  * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
  20  * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
  21  * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
  22  * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
  23  * Please see the License for the specific language governing rights and
  24  * limitations under the License.
  25  *
  26  * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
  27  */
  28 /*
  29  * @OSF_COPYRIGHT@
  30  */
  31
  32 #ifndef _I386_MACHINE_ROUTINES_H_
  33 #define _I386_MACHINE_ROUTINES_H_
  34
  35 #include <mach/mach_types.h>
  36 #include <mach/boolean.h>
  37 #include <kern/kern_types.h>
  38 #include <pexpert/pexpert.h>
  39
  40 #include <sys/cdefs.h>
  41 #include <sys/appleapiopts.h>
  42
  43 #include <stdarg.h>
  44
  45 __BEGIN_DECLS
  46
  47 #ifdef XNU_KERNEL_PRIVATE
  48
  49 /* are we a 64 bit platform ? */
  50
  51 boolean_t ml_is64bit(void);
  52
  53 /* is this a 64bit thread? */
  54
  55 boolean_t ml_thread_is64bit(thread_t);
  56
  57 /* is this a 64bit thread? */
  58
  59 boolean_t ml_state_is64bit(void *);
  60
  61 /* set state of fpu save area for signal handling */
  62
  63 void    ml_fp_setvalid(boolean_t);
  64
  65 void    ml_cpu_set_ldt(int);
  66
  67 /* Interrupt handling */
  68
  69 /* Initialize Interrupts */
  70 void    ml_init_interrupt(void);
  71
  72 /* Generate a fake interrupt */
  73 void ml_cause_interrupt(void);
  74
  75 /* Initialize Interrupts */
  76 void ml_install_interrupt_handler(
  77         void *nub,
  78         int source,
  79         void *target,
  80         IOInterruptHandler handler,
  81         void *refCon);
  82
  83 void ml_entropy_collect(void);
  84
  85 uint64_t ml_get_timebase(void);
  86 void ml_init_lock_timeout(void);
  87 void ml_init_delay_spin_threshold(int);
  88
  89 boolean_t ml_delay_should_spin(uint64_t interval);
  90
  91 extern void ml_delay_on_yield(void);
  92
  93 vm_offset_t
  94     ml_static_ptovirt(
  95         vm_offset_t);
  96
  97 void ml_static_mfree(
  98         vm_offset_t,
  99         vm_size_t);
 100
 101 /* boot memory allocation */
 102 vm_offset_t ml_static_malloc(
 103         vm_size_t size);
 104
 105 vm_offset_t ml_static_slide(
 106         vm_offset_t vaddr);
 107
 108 vm_offset_t ml_static_unslide(
 109         vm_offset_t vaddr);
 110
 111 /* virtual to physical on wired pages */
 112 vm_offset_t ml_vtophys(
 113         vm_offset_t vaddr);
 114
 115 vm_size_t ml_nofault_copy(
 116         vm_offset_t virtsrc, vm_offset_t virtdst, vm_size_t size);
 117
 118 boolean_t ml_validate_nofault(
 119         vm_offset_t virtsrc, vm_size_t size);
 120
 121 /* Machine topology info */
 122 uint64_t ml_cpu_cache_size(unsigned int level);
 123 uint64_t ml_cpu_cache_sharing(unsigned int level);
 124
 125 /* Initialize the maximum number of CPUs */
 126 void ml_init_max_cpus(
 127         unsigned long max_cpus);
 128
 129 extern void     ml_cpu_up(void);
 130 extern void     ml_cpu_down(void);
 131
 132 void bzero_phys_nc(
 133         addr64_t phys_address,
 134         uint32_t length);
 135 extern uint32_t interrupt_timer_coalescing_enabled;
 136 extern uint32_t idle_entry_timer_processing_hdeadline_threshold;
 137
 138 #if TCOAL_INSTRUMENT
 139 #define TCOAL_DEBUG KERNEL_DEBUG_CONSTANT
 140 #else
 141 #define TCOAL_DEBUG(x, a, b, c, d, e) do { } while(0)
 142 #endif /* TCOAL_INSTRUMENT */
 143
 144 #if     defined(PEXPERT_KERNEL_PRIVATE) || defined(MACH_KERNEL_PRIVATE)
 145 /* IO memory map services */
 146
 147 /* Map memory map IO space */
 148 vm_offset_t ml_io_map(
 149         vm_offset_t phys_addr,
 150         vm_size_t size);
 151
 152
 153 void    ml_get_bouncepool_info(
 154         vm_offset_t *phys_addr,
 155         vm_size_t   *size);
 156 /* Indicates if spinlock, IPI and other timeouts should be suspended */
 157 boolean_t machine_timeout_suspended(void);
 158 void plctrace_disable(void);
 159 #endif /* PEXPERT_KERNEL_PRIVATE || MACH_KERNEL_PRIVATE  */
 160
 161 /* Warm up a CPU to receive an interrupt */
 162 kern_return_t ml_interrupt_prewarm(uint64_t deadline);
 163
 164 /* Check if the machine layer wants to intercept a panic call */
 165 boolean_t ml_wants_panic_trap_to_debugger(void);
 166
 167 /* Machine layer routine for intercepting panics */
 168 void ml_panic_trap_to_debugger(const char *panic_format_str,
 169     va_list *panic_args,
 170     unsigned int reason,
 171     void *ctx,
 172     uint64_t panic_options_mask,
 173     unsigned long panic_caller);
 174 #endif /* XNU_KERNEL_PRIVATE */
 175
 176 #ifdef KERNEL_PRIVATE
 177
 178 /* Type for the Time Base Enable function */
 179 typedef void (*time_base_enable_t)(cpu_id_t cpu_id, boolean_t enable);
 180
 181 /* Type for the IPI Hander */
 182 typedef void (*ipi_handler_t)(void);
 183
 184 /* Struct for ml_processor_register */
 185 struct ml_processor_info {
 186         cpu_id_t                        cpu_id;
 187         boolean_t                       boot_cpu;
 188         vm_offset_t                     start_paddr;
 189         boolean_t                       supports_nap;
 190         unsigned long           l2cr_value;
 191         time_base_enable_t      time_base_enable;
 192 };
 193
 194 typedef struct ml_processor_info ml_processor_info_t;
 195
 196
 197 /* Register a processor */
 198 kern_return_t
 199 ml_processor_register(
 200         cpu_id_t        cpu_id,
 201         uint32_t        lapic_id,
 202         processor_t     *processor_out,
 203         boolean_t       boot_cpu,
 204         boolean_t       start );
 205
 206 /* PCI config cycle probing */
 207 boolean_t ml_probe_read(
 208         vm_offset_t paddr,
 209         unsigned int *val);
 210 boolean_t ml_probe_read_64(
 211         addr64_t paddr,
 212         unsigned int *val);
 213
 214 /* Read physical address byte */
 215 unsigned int ml_phys_read_byte(
 216         vm_offset_t paddr);
 217 unsigned int ml_phys_read_byte_64(
 218         addr64_t paddr);
 219
 220 /* Read physical address half word */
 221 unsigned int ml_phys_read_half(
 222         vm_offset_t paddr);
 223 unsigned int ml_phys_read_half_64(
 224         addr64_t paddr);
 225
 226 /* Read physical address word*/
 227 unsigned int ml_phys_read(
 228         vm_offset_t paddr);
 229 unsigned int ml_phys_read_64(
 230         addr64_t paddr);
 231 unsigned int ml_phys_read_word(
 232         vm_offset_t paddr);
 233 unsigned int ml_phys_read_word_64(
 234         addr64_t paddr);
 235
 236 /* Read physical address double word */
 237 unsigned long long ml_phys_read_double(
 238         vm_offset_t paddr);
 239 unsigned long long ml_phys_read_double_64(
 240         addr64_t paddr);
 241
 242 unsigned long long ml_io_read(uintptr_t iovaddr, int iovsz);
 243 unsigned int ml_io_read8(uintptr_t iovaddr);
 244 unsigned int ml_io_read16(uintptr_t iovaddr);
 245 unsigned int ml_io_read32(uintptr_t iovaddr);
 246 unsigned long long ml_io_read64(uintptr_t iovaddr);
 247
 248 extern void ml_io_write(uintptr_t vaddr, uint64_t val, int size);
 249 extern void ml_io_write8(uintptr_t vaddr, uint8_t val);
 250 extern void ml_io_write16(uintptr_t vaddr, uint16_t val);
 251 extern void ml_io_write32(uintptr_t vaddr, uint32_t val);
 252 extern void ml_io_write64(uintptr_t vaddr, uint64_t val);
 253
 254 extern uint32_t ml_port_io_read(uint16_t ioport, int size);
 255 extern uint8_t ml_port_io_read8(uint16_t ioport);
 256 extern uint16_t ml_port_io_read16(uint16_t ioport);
 257 extern uint32_t ml_port_io_read32(uint16_t ioport);
 258 extern void ml_port_io_write(uint16_t ioport, uint32_t val, int size);
 259 extern void ml_port_io_write8(uint16_t ioport, uint8_t val);
 260 extern void ml_port_io_write16(uint16_t ioport, uint16_t val);
 261 extern void ml_port_io_write32(uint16_t ioport, uint32_t val);
 262
 263 /* Write physical address byte */
 264 void ml_phys_write_byte(
 265         vm_offset_t paddr, unsigned int data);
 266 void ml_phys_write_byte_64(
 267         addr64_t paddr, unsigned int data);
 268
 269 /* Write physical address half word */
 270 void ml_phys_write_half(
 271         vm_offset_t paddr, unsigned int data);
 272 void ml_phys_write_half_64(
 273         addr64_t paddr, unsigned int data);
 274
 275 /* Write physical address word */
 276 void ml_phys_write(
 277         vm_offset_t paddr, unsigned int data);
 278 void ml_phys_write_64(
 279         addr64_t paddr, unsigned int data);
 280 void ml_phys_write_word(
 281         vm_offset_t paddr, unsigned int data);
 282 void ml_phys_write_word_64(
 283         addr64_t paddr, unsigned int data);
 284
 285 /* Write physical address double word */
 286 void ml_phys_write_double(
 287         vm_offset_t paddr, unsigned long long data);
 288 void ml_phys_write_double_64(
 289         addr64_t paddr, unsigned long long data);
 290
 291 /* Struct for ml_cpu_get_info */
 292 struct ml_cpu_info {
 293         uint32_t        vector_unit;
 294         uint32_t        cache_line_size;
 295         uint32_t        l1_icache_size;
 296         uint32_t        l1_dcache_size;
 297         uint32_t        l2_settings;
 298         uint32_t        l2_cache_size;
 299         uint32_t        l3_settings;
 300         uint32_t        l3_cache_size;
 301 };
 302
 303 typedef struct ml_cpu_info ml_cpu_info_t;
 304
 305 /* Get processor info */
 306 void ml_cpu_get_info(ml_cpu_info_t *ml_cpu_info);
 307
 308 void ml_thread_policy(
 309         thread_t thread,
 310         unsigned policy_id,
 311         unsigned policy_info);
 312
 313 #define MACHINE_GROUP                                   0x00000001
 314 #define MACHINE_NETWORK_GROUP                   0x10000000
 315 #define MACHINE_NETWORK_WORKLOOP                0x00000001
 316 #define MACHINE_NETWORK_NETISR                  0x00000002
 317
 318 /* Return the maximum number of CPUs set by ml_init_max_cpus() */
 319 int ml_get_max_cpus(
 320         void);
 321
 322 /*
 323  * The following are in pmCPU.c not machine_routines.c.
 324  */
 325 extern void ml_set_maxsnoop(uint32_t maxdelay);
 326 extern unsigned ml_get_maxsnoop(void);
 327 extern void ml_set_maxbusdelay(uint32_t mdelay);
 328 extern uint32_t ml_get_maxbusdelay(void);
 329 extern void ml_set_maxintdelay(uint64_t mdelay);
 330 extern uint64_t ml_get_maxintdelay(void);
 331 extern boolean_t ml_get_interrupt_prewake_applicable(void);
 332
 333
 334 extern uint64_t tmrCvt(uint64_t time, uint64_t conversion);
 335
 336 extern uint64_t ml_cpu_int_event_time(void);
 337
 338 #endif /* KERNEL_PRIVATE */
 339
 340 /* Get Interrupts Enabled */
 341 boolean_t ml_get_interrupts_enabled(void);
 342
 343 /* Set Interrupts Enabled */
 344 boolean_t ml_set_interrupts_enabled(boolean_t enable);
 345 boolean_t ml_early_set_interrupts_enabled(boolean_t enable);
 346
 347 /* Check if running at interrupt context */
 348 boolean_t ml_at_interrupt_context(void);
 349
 350 #ifdef XNU_KERNEL_PRIVATE
 351 extern boolean_t ml_is_quiescing(void);
 352 extern void ml_set_is_quiescing(boolean_t);
 353 extern uint64_t ml_get_booter_memory_size(void);
 354 #endif
 355
 356 /* Zero bytes starting at a physical address */
 357 void bzero_phys(
 358         addr64_t phys_address,
 359         uint32_t length);
 360
 361 /* Bytes available on current stack */
 362 vm_offset_t ml_stack_remaining(void);
 363
 364 __END_DECLS
 365 #if defined(MACH_KERNEL_PRIVATE)
 366 __private_extern__ uint64_t ml_phys_read_data(uint64_t paddr, int psz);
 367 __private_extern__ void ml_phys_write_data(uint64_t paddr,
 368     unsigned long long data, int size);
 369 __private_extern__ uintptr_t
 370 pmap_verify_noncacheable(uintptr_t vaddr);
 371 #endif /* MACH_KERNEL_PRIVATE */
 372 #ifdef  XNU_KERNEL_PRIVATE
 373
 374 boolean_t ml_fpu_avx_enabled(void);
 375 #if !defined(RC_HIDE_XNU_J137)
 376 boolean_t ml_fpu_avx512_enabled(void);
 377 #endif
 378
 379 void interrupt_latency_tracker_setup(void);
 380 void interrupt_reset_latency_stats(void);
 381 void interrupt_populate_latency_stats(char *, unsigned);
 382 void ml_get_power_state(boolean_t *, boolean_t *);
 383
 384 void timer_queue_expire_rescan(void*);
 385 void ml_timer_evaluate(void);
 386 boolean_t ml_timer_forced_evaluation(void);
 387
 388 uint64_t ml_energy_stat(thread_t);
 389 void ml_gpu_stat_update(uint64_t);
 390 uint64_t ml_gpu_stat(thread_t);
 391 boolean_t ml_recent_wake(void);
 392
 393 #define ALL_CORES_RECOMMENDED   (~(uint64_t)0)
 394
 395 extern void sched_usercontrol_update_recommended_cores(uint64_t recommended_cores);
 396
 397
 398 extern uint64_t reportphyreaddelayabs;
 399 extern uint64_t reportphywritedelayabs;
 400 extern uint32_t reportphyreadosbt;
 401 extern uint32_t reportphywriteosbt;
 402 extern uint32_t phyreadpanic;
 403 extern uint32_t phywritepanic;
 404 extern uint64_t tracephyreaddelayabs;
 405 extern uint64_t tracephywritedelayabs;
 406
 407 #endif /* XNU_KERNEL_PRIVATE */
 408 #endif /* _I386_MACHINE_ROUTINES_H_ */