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34 #include <mach_ldebug.h>
37 #include <mach/mach_types.h>
38 #include <mach/kern_return.h>
40 #include <kern/kern_types.h>
41 #include <kern/startup.h>
42 #include <kern/timer_queue.h>
43 #include <kern/processor.h>
44 #include <kern/cpu_number.h>
45 #include <kern/cpu_data.h>
46 #include <kern/assert.h>
47 #include <kern/machine.h>
49 #include <kern/misc_protos.h>
50 #include <kern/timer_call.h>
51 #include <kern/kalloc.h>
52 #include <kern/queue.h>
53 #include <prng/random.h>
55 #include <vm/vm_map.h>
56 #include <vm/vm_kern.h>
58 #include <profiling/profile-mk.h>
60 #include <i386/bit_routines.h>
61 #include <i386/proc_reg.h>
62 #include <i386/cpu_threads.h>
63 #include <i386/mp_desc.h>
64 #include <i386/misc_protos.h>
65 #include <i386/trap.h>
66 #include <i386/postcode.h>
67 #include <i386/machine_routines.h>
69 #include <i386/mp_events.h>
70 #include <i386/lapic.h>
71 #include <i386/cpuid.h>
73 #include <i386/machine_cpu.h>
74 #include <i386/pmCPU.h>
76 #include <i386/machine_check.h>
78 #include <i386/acpi.h>
80 #include <chud/chud_xnu.h>
81 #include <chud/chud_xnu_private.h>
83 #include <sys/kdebug.h>
85 #include <console/serial_protos.h>
88 #define PAUSE delay(1000000)
89 #define DBG(x...) kprintf(x)
95 /* Debugging/test trace events: */
96 #define TRACE_MP_TLB_FLUSH MACHDBG_CODE(DBG_MACH_MP, 0)
97 #define TRACE_MP_CPUS_CALL MACHDBG_CODE(DBG_MACH_MP, 1)
98 #define TRACE_MP_CPUS_CALL_LOCAL MACHDBG_CODE(DBG_MACH_MP, 2)
99 #define TRACE_MP_CPUS_CALL_ACTION MACHDBG_CODE(DBG_MACH_MP, 3)
100 #define TRACE_MP_CPUS_CALL_NOBUF MACHDBG_CODE(DBG_MACH_MP, 4)
101 #define TRACE_MP_CPU_FAST_START MACHDBG_CODE(DBG_MACH_MP, 5)
102 #define TRACE_MP_CPU_START MACHDBG_CODE(DBG_MACH_MP, 6)
103 #define TRACE_MP_CPU_DEACTIVATE MACHDBG_CODE(DBG_MACH_MP, 7)
105 #define ABS(v) (((v) > 0)?(v):-(v))
107 void slave_boot_init(void);
108 void i386_cpu_IPI(int cpu
);
111 static void mp_kdp_wait(boolean_t flush
, boolean_t isNMI
);
112 #endif /* MACH_KDP */
113 static void mp_rendezvous_action(void);
114 static void mp_broadcast_action(void);
117 static boolean_t
cpu_signal_pending(int cpu
, mp_event_t event
);
118 #endif /* MACH_KDP */
119 static int NMIInterruptHandler(x86_saved_state_t
*regs
);
121 boolean_t smp_initialized
= FALSE
;
122 uint32_t TSC_sync_margin
= 0xFFF;
123 volatile boolean_t force_immediate_debugger_NMI
= FALSE
;
124 volatile boolean_t pmap_tlb_flush_timeout
= FALSE
;
125 decl_simple_lock_data(,mp_kdp_lock
);
127 decl_lck_mtx_data(static, mp_cpu_boot_lock
);
128 lck_mtx_ext_t mp_cpu_boot_lock_ext
;
130 /* Variables needed for MP rendezvous. */
131 decl_simple_lock_data(,mp_rv_lock
);
132 static void (*mp_rv_setup_func
)(void *arg
);
133 static void (*mp_rv_action_func
)(void *arg
);
134 static void (*mp_rv_teardown_func
)(void *arg
);
135 static void *mp_rv_func_arg
;
136 static volatile int mp_rv_ncpus
;
137 /* Cache-aligned barriers: */
138 static volatile long mp_rv_entry
__attribute__((aligned(64)));
139 static volatile long mp_rv_exit
__attribute__((aligned(64)));
140 static volatile long mp_rv_complete
__attribute__((aligned(64)));
142 volatile uint64_t debugger_entry_time
;
143 volatile uint64_t debugger_exit_time
;
146 extern int kdp_snapshot
;
147 static struct _kdp_xcpu_call_func
{
148 kdp_x86_xcpu_func_t func
;
151 volatile uint16_t cpu
;
152 } kdp_xcpu_call_func
= {
158 /* Variables needed for MP broadcast. */
159 static void (*mp_bc_action_func
)(void *arg
);
160 static void *mp_bc_func_arg
;
161 static int mp_bc_ncpus
;
162 static volatile long mp_bc_count
;
163 decl_lck_mtx_data(static, mp_bc_lock
);
164 lck_mtx_ext_t mp_bc_lock_ext
;
165 static volatile int debugger_cpu
= -1;
166 volatile long NMIPI_acks
= 0;
167 volatile long NMI_count
= 0;
169 extern void NMI_cpus(void);
171 static void mp_cpus_call_init(void);
172 static void mp_cpus_call_action(void);
173 static void mp_call_PM(void);
175 static boolean_t mp_cpus_call_wait_timeout
= FALSE
;
177 char mp_slave_stack
[PAGE_SIZE
] __attribute__((aligned(PAGE_SIZE
))); // Temp stack for slave init
179 /* PAL-related routines */
180 boolean_t
i386_smp_init(int nmi_vector
, i386_intr_func_t nmi_handler
,
181 int ipi_vector
, i386_intr_func_t ipi_handler
);
182 void i386_start_cpu(int lapic_id
, int cpu_num
);
183 void i386_send_NMI(int cpu
);
187 * Initialize dummy structs for profiling. These aren't used but
188 * allows hertz_tick() to be built with GPROF defined.
190 struct profile_vars _profile_vars
;
191 struct profile_vars
*_profile_vars_cpus
[MAX_CPUS
] = { &_profile_vars
};
192 #define GPROF_INIT() \
196 /* Hack to initialize pointers to unused profiling structs */ \
197 for (i = 1; i < MAX_CPUS; i++) \
198 _profile_vars_cpus[i] = &_profile_vars; \
204 static lck_grp_t smp_lck_grp
;
205 static lck_grp_attr_t smp_lck_grp_attr
;
207 #define NUM_CPU_WARM_CALLS 20
208 struct timer_call cpu_warm_call_arr
[NUM_CPU_WARM_CALLS
];
209 queue_head_t cpu_warm_call_list
;
210 decl_simple_lock_data(static, cpu_warm_lock
);
212 typedef struct cpu_warm_data
{
213 timer_call_t cwd_call
;
214 uint64_t cwd_deadline
;
218 static void cpu_prewarm_init(void);
219 static void cpu_warm_timer_call_func(call_entry_param_t p0
, call_entry_param_t p1
);
220 static void _cpu_warm_setup(void *arg
);
221 static timer_call_t
grab_warm_timer_call(void);
222 static void free_warm_timer_call(timer_call_t call
);
227 simple_lock_init(&mp_kdp_lock
, 0);
228 simple_lock_init(&mp_rv_lock
, 0);
229 lck_grp_attr_setdefault(&smp_lck_grp_attr
);
230 lck_grp_init(&smp_lck_grp
, "i386_smp", &smp_lck_grp_attr
);
231 lck_mtx_init_ext(&mp_cpu_boot_lock
, &mp_cpu_boot_lock_ext
, &smp_lck_grp
, LCK_ATTR_NULL
);
232 lck_mtx_init_ext(&mp_bc_lock
, &mp_bc_lock_ext
, &smp_lck_grp
, LCK_ATTR_NULL
);
235 if(!i386_smp_init(LAPIC_NMI_INTERRUPT
, NMIInterruptHandler
,
236 LAPIC_VECTOR(INTERPROCESSOR
), cpu_signal_handler
))
242 DBGLOG_CPU_INIT(master_cpu
);
245 mp_cpus_call_cpu_init(master_cpu
);
247 if (PE_parse_boot_argn("TSC_sync_margin",
248 &TSC_sync_margin
, sizeof(TSC_sync_margin
))) {
249 kprintf("TSC sync Margin 0x%x\n", TSC_sync_margin
);
250 } else if (cpuid_vmm_present()) {
251 kprintf("TSC sync margin disabled\n");
254 smp_initialized
= TRUE
;
265 } processor_start_info_t
;
266 static processor_start_info_t start_info
__attribute__((aligned(64)));
269 * Cache-alignment is to avoid cross-cpu false-sharing interference.
271 static volatile long tsc_entry_barrier
__attribute__((aligned(64)));
272 static volatile long tsc_exit_barrier
__attribute__((aligned(64)));
273 static volatile uint64_t tsc_target
__attribute__((aligned(64)));
276 * Poll a CPU to see when it has marked itself as running.
279 mp_wait_for_cpu_up(int slot_num
, unsigned int iters
, unsigned int usecdelay
)
281 while (iters
-- > 0) {
282 if (cpu_datap(slot_num
)->cpu_running
)
289 * Quickly bring a CPU back online which has been halted.
292 intel_startCPU_fast(int slot_num
)
297 * Try to perform a fast restart
299 rc
= pmCPUExitHalt(slot_num
);
300 if (rc
!= KERN_SUCCESS
)
302 * The CPU was not eligible for a fast restart.
306 KERNEL_DEBUG_CONSTANT(
307 TRACE_MP_CPU_FAST_START
| DBG_FUNC_START
,
308 slot_num
, 0, 0, 0, 0);
311 * Wait until the CPU is back online.
313 mp_disable_preemption();
316 * We use short pauses (1us) for low latency. 30,000 iterations is
317 * longer than a full restart would require so it should be more
321 mp_wait_for_cpu_up(slot_num
, 30000, 1);
322 mp_enable_preemption();
324 KERNEL_DEBUG_CONSTANT(
325 TRACE_MP_CPU_FAST_START
| DBG_FUNC_END
,
326 slot_num
, cpu_datap(slot_num
)->cpu_running
, 0, 0, 0);
329 * Check to make sure that the CPU is really running. If not,
330 * go through the slow path.
332 if (cpu_datap(slot_num
)->cpu_running
)
333 return(KERN_SUCCESS
);
335 return(KERN_FAILURE
);
341 /* Here on the started cpu with cpu_running set TRUE */
343 if (TSC_sync_margin
&&
344 start_info
.target_cpu
== cpu_number()) {
346 * I've just started-up, synchronize again with the starter cpu
347 * and then snap my TSC.
350 atomic_decl(&tsc_entry_barrier
, 1);
351 while (tsc_entry_barrier
!= 0)
352 ; /* spin for starter and target at barrier */
353 tsc_target
= rdtsc64();
354 atomic_decl(&tsc_exit_barrier
, 1);
362 processor_start_info_t
*psip
= (processor_start_info_t
*) arg
;
364 /* Ignore this if the current processor is not the starter */
365 if (cpu_number() != psip
->starter_cpu
)
368 DBG("start_cpu(%p) about to start cpu %d, lapic %d\n",
369 arg
, psip
->target_cpu
, psip
->target_lapic
);
371 KERNEL_DEBUG_CONSTANT(
372 TRACE_MP_CPU_START
| DBG_FUNC_START
,
374 psip
->target_lapic
, 0, 0, 0);
376 i386_start_cpu(psip
->target_lapic
, psip
->target_cpu
);
378 #ifdef POSTCODE_DELAY
379 /* Wait much longer if postcodes are displayed for a delay period. */
382 DBG("start_cpu(%p) about to wait for cpu %d\n",
383 arg
, psip
->target_cpu
);
385 mp_wait_for_cpu_up(psip
->target_cpu
, i
*100, 100);
387 KERNEL_DEBUG_CONSTANT(
388 TRACE_MP_CPU_START
| DBG_FUNC_END
,
390 cpu_datap(psip
->target_cpu
)->cpu_running
, 0, 0, 0);
392 if (TSC_sync_margin
&&
393 cpu_datap(psip
->target_cpu
)->cpu_running
) {
395 * Compare the TSC from the started processor with ours.
396 * Report and log/panic if it diverges by more than
397 * TSC_sync_margin (TSC_SYNC_MARGIN) ticks. This margin
398 * can be overriden by boot-arg (with 0 meaning no checking).
400 uint64_t tsc_starter
;
402 atomic_decl(&tsc_entry_barrier
, 1);
403 while (tsc_entry_barrier
!= 0)
404 ; /* spin for both processors at barrier */
405 tsc_starter
= rdtsc64();
406 atomic_decl(&tsc_exit_barrier
, 1);
407 while (tsc_exit_barrier
!= 0)
408 ; /* spin for target to store its TSC */
409 tsc_delta
= tsc_target
- tsc_starter
;
410 kprintf("TSC sync for cpu %d: 0x%016llx delta 0x%llx (%lld)\n",
411 psip
->target_cpu
, tsc_target
, tsc_delta
, tsc_delta
);
412 if (ABS(tsc_delta
) > (int64_t) TSC_sync_margin
) {
418 "Unsynchronized TSC for cpu %d: "
419 "0x%016llx, delta 0x%llx\n",
420 psip
->target_cpu
, tsc_target
, tsc_delta
);
429 int lapic
= cpu_to_lapic
[slot_num
];
434 DBGLOG_CPU_INIT(slot_num
);
436 DBG("intel_startCPU(%d) lapic_id=%d\n", slot_num
, lapic
);
437 DBG("IdlePTD(%p): 0x%x\n", &IdlePTD
, (int) (uintptr_t)IdlePTD
);
440 * Initialize (or re-initialize) the descriptor tables for this cpu.
441 * Propagate processor mode to slave.
443 cpu_desc_init64(cpu_datap(slot_num
));
445 /* Serialize use of the slave boot stack, etc. */
446 lck_mtx_lock(&mp_cpu_boot_lock
);
448 istate
= ml_set_interrupts_enabled(FALSE
);
449 if (slot_num
== get_cpu_number()) {
450 ml_set_interrupts_enabled(istate
);
451 lck_mtx_unlock(&mp_cpu_boot_lock
);
455 start_info
.starter_cpu
= cpu_number();
456 start_info
.target_cpu
= slot_num
;
457 start_info
.target_lapic
= lapic
;
458 tsc_entry_barrier
= 2;
459 tsc_exit_barrier
= 2;
462 * Perform the processor startup sequence with all running
463 * processors rendezvous'ed. This is required during periods when
464 * the cache-disable bit is set for MTRR/PAT initialization.
466 mp_rendezvous_no_intrs(start_cpu
, (void *) &start_info
);
468 start_info
.target_cpu
= 0;
470 ml_set_interrupts_enabled(istate
);
471 lck_mtx_unlock(&mp_cpu_boot_lock
);
473 if (!cpu_datap(slot_num
)->cpu_running
) {
474 kprintf("Failed to start CPU %02d\n", slot_num
);
475 printf("Failed to start CPU %02d, rebooting...\n", slot_num
);
480 kprintf("Started cpu %d (lapic id %08x)\n", slot_num
, lapic
);
486 cpu_signal_event_log_t
*cpu_signal
[MAX_CPUS
];
487 cpu_signal_event_log_t
*cpu_handle
[MAX_CPUS
];
489 MP_EVENT_NAME_DECL();
491 #endif /* MP_DEBUG */
494 * Note: called with NULL state when polling for TLB flush and cross-calls.
497 cpu_signal_handler(x86_saved_state_t
*regs
)
500 #pragma unused (regs)
501 #endif /* !MACH_KDP */
503 volatile int *my_word
;
505 SCHED_STATS_IPI(current_processor());
507 my_cpu
= cpu_number();
508 my_word
= &cpu_data_ptr
[my_cpu
]->cpu_signals
;
509 /* Store the initial set of signals for diagnostics. New
510 * signals could arrive while these are being processed
511 * so it's no more than a hint.
514 cpu_data_ptr
[my_cpu
]->cpu_prior_signals
= *my_word
;
518 if (i_bit(MP_KDP
, my_word
)) {
519 DBGLOG(cpu_handle
,my_cpu
,MP_KDP
);
520 i_bit_clear(MP_KDP
, my_word
);
521 /* Ensure that the i386_kernel_state at the base of the
522 * current thread's stack (if any) is synchronized with the
523 * context at the moment of the interrupt, to facilitate
524 * access through the debugger.
526 sync_iss_to_iks(regs
);
527 if (pmsafe_debug
&& !kdp_snapshot
)
528 pmSafeMode(¤t_cpu_datap()->lcpu
, PM_SAFE_FL_SAFE
);
529 mp_kdp_wait(TRUE
, FALSE
);
530 if (pmsafe_debug
&& !kdp_snapshot
)
531 pmSafeMode(¤t_cpu_datap()->lcpu
, PM_SAFE_FL_NORMAL
);
533 #endif /* MACH_KDP */
534 if (i_bit(MP_TLB_FLUSH
, my_word
)) {
535 DBGLOG(cpu_handle
,my_cpu
,MP_TLB_FLUSH
);
536 i_bit_clear(MP_TLB_FLUSH
, my_word
);
537 pmap_update_interrupt();
538 } else if (i_bit(MP_RENDEZVOUS
, my_word
)) {
539 DBGLOG(cpu_handle
,my_cpu
,MP_RENDEZVOUS
);
540 i_bit_clear(MP_RENDEZVOUS
, my_word
);
541 mp_rendezvous_action();
542 } else if (i_bit(MP_BROADCAST
, my_word
)) {
543 DBGLOG(cpu_handle
,my_cpu
,MP_BROADCAST
);
544 i_bit_clear(MP_BROADCAST
, my_word
);
545 mp_broadcast_action();
546 } else if (i_bit(MP_CHUD
, my_word
)) {
547 DBGLOG(cpu_handle
,my_cpu
,MP_CHUD
);
548 i_bit_clear(MP_CHUD
, my_word
);
549 chudxnu_cpu_signal_handler();
550 } else if (i_bit(MP_CALL
, my_word
)) {
551 DBGLOG(cpu_handle
,my_cpu
,MP_CALL
);
552 i_bit_clear(MP_CALL
, my_word
);
553 mp_cpus_call_action();
554 } else if (i_bit(MP_CALL_PM
, my_word
)) {
555 DBGLOG(cpu_handle
,my_cpu
,MP_CALL_PM
);
556 i_bit_clear(MP_CALL_PM
, my_word
);
560 /* Called to poll only for cross-calls and TLB flush */
562 } else if (i_bit(MP_AST
, my_word
)) {
563 DBGLOG(cpu_handle
,my_cpu
,MP_AST
);
564 i_bit_clear(MP_AST
, my_word
);
565 ast_check(cpu_to_processor(my_cpu
));
572 extern void kprintf_break_lock(void);
574 NMIInterruptHandler(x86_saved_state_t
*regs
)
578 if (panic_active() && !panicDebugging
) {
580 pmSafeMode(¤t_cpu_datap()->lcpu
, PM_SAFE_FL_SAFE
);
585 atomic_incl(&NMIPI_acks
, 1);
586 atomic_incl(&NMI_count
, 1);
587 sync_iss_to_iks_unconditionally(regs
);
588 __asm__
volatile("movq %%rbp, %0" : "=m" (stackptr
));
590 if (cpu_number() == debugger_cpu
)
593 if (spinlock_timed_out
) {
595 snprintf(&pstr
[0], sizeof(pstr
), "Panic(CPU %d): NMIPI for spinlock acquisition timeout, spinlock: %p, spinlock owner: %p, current_thread: %p, spinlock_owner_cpu: 0x%x\n", cpu_number(), spinlock_timed_out
, (void *) spinlock_timed_out
->interlock
.lock_data
, current_thread(), spinlock_owner_cpu
);
596 panic_i386_backtrace(stackptr
, 64, &pstr
[0], TRUE
, regs
);
597 } else if (mp_cpus_call_wait_timeout
) {
599 snprintf(&pstr
[0], sizeof(pstr
), "Panic(CPU %d): Unresponsive processor, this CPU timed-out during cross-call\n", cpu_number());
600 panic_i386_backtrace(stackptr
, 64, &pstr
[0], TRUE
, regs
);
601 } else if (pmap_tlb_flush_timeout
== TRUE
) {
603 snprintf(&pstr
[0], sizeof(pstr
), "Panic(CPU %d): Unresponsive processor (this CPU did not acknowledge interrupts) TLB state:0x%x\n", cpu_number(), current_cpu_datap()->cpu_tlb_invalid
);
604 panic_i386_backtrace(stackptr
, 48, &pstr
[0], TRUE
, regs
);
608 if (pmsafe_debug
&& !kdp_snapshot
)
609 pmSafeMode(¤t_cpu_datap()->lcpu
, PM_SAFE_FL_SAFE
);
610 current_cpu_datap()->cpu_NMI_acknowledged
= TRUE
;
611 i_bit_clear(MP_KDP
, ¤t_cpu_datap()->cpu_signals
);
612 if (pmap_tlb_flush_timeout
||
613 spinlock_timed_out
||
614 mp_cpus_call_wait_timeout
||
616 mp_kdp_wait(FALSE
, TRUE
);
617 } else if (virtualized
&& (debug_boot_arg
& DB_NMI
)) {
619 * Under a VMM with the debug boot-arg set, drop into kdp.
620 * Since an NMI is involved, there's a risk of contending with
621 * a panic. And side-effects of NMIs may result in entry into,
622 * and continuing from, the debugger being unreliable.
624 kprintf_break_lock();
625 kprintf("Debugger entry requested by NMI\n");
626 kdp_i386_trap(T_DEBUG
, saved_state64(regs
), 0, 0);
627 printf("Debugger entry requested by NMI\n");
629 mp_kdp_wait(FALSE
, FALSE
);
631 if (pmsafe_debug
&& !kdp_snapshot
)
632 pmSafeMode(¤t_cpu_datap()->lcpu
, PM_SAFE_FL_NORMAL
);
640 * cpu_interrupt is really just to be used by the scheduler to
641 * get a CPU's attention it may not always issue an IPI. If an
642 * IPI is always needed then use i386_cpu_IPI.
645 cpu_interrupt(int cpu
)
647 boolean_t did_IPI
= FALSE
;
650 && pmCPUExitIdle(cpu_datap(cpu
))) {
655 KERNEL_DEBUG_CONSTANT(MACHDBG_CODE(DBG_MACH_SCHED
, MACH_REMOTE_AST
), cpu
, did_IPI
, 0, 0, 0);
659 * Send a true NMI via the local APIC to the specified CPU.
662 cpu_NMI_interrupt(int cpu
)
664 if (smp_initialized
) {
673 boolean_t intrs_enabled
;
674 uint64_t tsc_timeout
;
676 intrs_enabled
= ml_set_interrupts_enabled(FALSE
);
678 for (cpu
= 0; cpu
< real_ncpus
; cpu
++) {
679 if (!cpu_datap(cpu
)->cpu_running
)
681 cpu_datap(cpu
)->cpu_NMI_acknowledged
= FALSE
;
682 cpu_NMI_interrupt(cpu
);
683 tsc_timeout
= !machine_timeout_suspended() ?
684 rdtsc64() + (1000 * 1000 * 1000 * 10ULL) :
686 while (!cpu_datap(cpu
)->cpu_NMI_acknowledged
) {
687 handle_pending_TLB_flushes();
689 if (rdtsc64() > tsc_timeout
)
690 panic("NMI_cpus() timeout cpu %d", cpu
);
692 cpu_datap(cpu
)->cpu_NMI_acknowledged
= FALSE
;
695 ml_set_interrupts_enabled(intrs_enabled
);
698 static void (* volatile mp_PM_func
)(void) = NULL
;
703 assert(!ml_get_interrupts_enabled());
705 if (mp_PM_func
!= NULL
)
710 cpu_PM_interrupt(int cpu
)
712 assert(!ml_get_interrupts_enabled());
714 if (mp_PM_func
!= NULL
) {
715 if (cpu
== cpu_number())
718 i386_signal_cpu(cpu
, MP_CALL_PM
, ASYNC
);
723 PM_interrupt_register(void (*fn
)(void))
729 i386_signal_cpu(int cpu
, mp_event_t event
, mp_sync_t mode
)
731 volatile int *signals
= &cpu_datap(cpu
)->cpu_signals
;
732 uint64_t tsc_timeout
;
735 if (!cpu_datap(cpu
)->cpu_running
)
738 if (event
== MP_TLB_FLUSH
)
739 KERNEL_DEBUG(TRACE_MP_TLB_FLUSH
| DBG_FUNC_START
, cpu
, 0, 0, 0, 0);
741 DBGLOG(cpu_signal
, cpu
, event
);
743 i_bit_set(event
, signals
);
747 tsc_timeout
= !machine_timeout_suspended() ?
748 rdtsc64() + (1000*1000*1000) :
750 while (i_bit(event
, signals
) && rdtsc64() < tsc_timeout
) {
753 if (i_bit(event
, signals
)) {
754 DBG("i386_signal_cpu(%d, 0x%x, SYNC) timed out\n",
759 if (event
== MP_TLB_FLUSH
)
760 KERNEL_DEBUG(TRACE_MP_TLB_FLUSH
| DBG_FUNC_END
, cpu
, 0, 0, 0, 0);
764 * Send event to all running cpus.
765 * Called with the topology locked.
768 i386_signal_cpus(mp_event_t event
, mp_sync_t mode
)
771 unsigned int my_cpu
= cpu_number();
773 assert(hw_lock_held((hw_lock_t
)&x86_topo_lock
));
775 for (cpu
= 0; cpu
< real_ncpus
; cpu
++) {
776 if (cpu
== my_cpu
|| !cpu_datap(cpu
)->cpu_running
)
778 i386_signal_cpu(cpu
, event
, mode
);
783 * Return the number of running cpus.
784 * Called with the topology locked.
787 i386_active_cpus(void)
790 unsigned int ncpus
= 0;
792 assert(hw_lock_held((hw_lock_t
)&x86_topo_lock
));
794 for (cpu
= 0; cpu
< real_ncpus
; cpu
++) {
795 if (cpu_datap(cpu
)->cpu_running
)
802 * Helper function called when busy-waiting: panic if too long
803 * a TSC-based time has elapsed since the start of the spin.
806 mp_spin_timeout(uint64_t tsc_start
)
808 uint64_t tsc_timeout
;
811 if (machine_timeout_suspended())
815 * The timeout is 4 * the spinlock timeout period
816 * unless we have serial console printing (kprintf) enabled
817 * in which case we allow an even greater margin.
819 tsc_timeout
= disable_serial_output
? (uint64_t) LockTimeOutTSC
<< 2
820 : (uint64_t) LockTimeOutTSC
<< 4;
821 return (rdtsc64() > tsc_start
+ tsc_timeout
);
825 * Helper function to take a spinlock while ensuring that incoming IPIs
826 * are still serviced if interrupts are masked while we spin.
829 mp_safe_spin_lock(usimple_lock_t lock
)
831 if (ml_get_interrupts_enabled()) {
835 uint64_t tsc_spin_start
= rdtsc64();
836 while (!simple_lock_try(lock
)) {
837 cpu_signal_handler(NULL
);
838 if (mp_spin_timeout(tsc_spin_start
)) {
840 uintptr_t lowner
= (uintptr_t)
841 lock
->interlock
.lock_data
;
842 spinlock_timed_out
= lock
;
843 lock_cpu
= spinlock_timeout_NMI(lowner
);
844 panic("mp_safe_spin_lock() timed out,"
845 " lock: %p, owner thread: 0x%lx,"
846 " current_thread: %p, owner on CPU 0x%x",
848 current_thread(), lock_cpu
);
856 * All-CPU rendezvous:
857 * - CPUs are signalled,
858 * - all execute the setup function (if specified),
859 * - rendezvous (i.e. all cpus reach a barrier),
860 * - all execute the action function (if specified),
861 * - rendezvous again,
862 * - execute the teardown function (if specified), and then
865 * Note that the supplied external functions _must_ be reentrant and aware
866 * that they are running in parallel and in an unknown lock context.
870 mp_rendezvous_action(void)
872 boolean_t intrs_enabled
;
873 uint64_t tsc_spin_start
;
876 if (mp_rv_setup_func
!= NULL
)
877 mp_rv_setup_func(mp_rv_func_arg
);
879 intrs_enabled
= ml_get_interrupts_enabled();
881 /* spin on entry rendezvous */
882 atomic_incl(&mp_rv_entry
, 1);
883 tsc_spin_start
= rdtsc64();
884 while (mp_rv_entry
< mp_rv_ncpus
) {
885 /* poll for pesky tlb flushes if interrupts disabled */
887 handle_pending_TLB_flushes();
888 if (mp_spin_timeout(tsc_spin_start
))
889 panic("mp_rendezvous_action() entry");
892 /* action function */
893 if (mp_rv_action_func
!= NULL
)
894 mp_rv_action_func(mp_rv_func_arg
);
896 /* spin on exit rendezvous */
897 atomic_incl(&mp_rv_exit
, 1);
898 tsc_spin_start
= rdtsc64();
899 while (mp_rv_exit
< mp_rv_ncpus
) {
901 handle_pending_TLB_flushes();
902 if (mp_spin_timeout(tsc_spin_start
))
903 panic("mp_rendezvous_action() exit");
906 /* teardown function */
907 if (mp_rv_teardown_func
!= NULL
)
908 mp_rv_teardown_func(mp_rv_func_arg
);
910 /* Bump completion count */
911 atomic_incl(&mp_rv_complete
, 1);
915 mp_rendezvous(void (*setup_func
)(void *),
916 void (*action_func
)(void *),
917 void (*teardown_func
)(void *),
920 uint64_t tsc_spin_start
;
922 if (!smp_initialized
) {
923 if (setup_func
!= NULL
)
925 if (action_func
!= NULL
)
927 if (teardown_func
!= NULL
)
932 /* obtain rendezvous lock */
933 (void) mp_safe_spin_lock(&mp_rv_lock
);
935 /* set static function pointers */
936 mp_rv_setup_func
= setup_func
;
937 mp_rv_action_func
= action_func
;
938 mp_rv_teardown_func
= teardown_func
;
939 mp_rv_func_arg
= arg
;
946 * signal other processors, which will call mp_rendezvous_action()
947 * with interrupts disabled
949 (void) mp_safe_spin_lock(&x86_topo_lock
);
950 mp_rv_ncpus
= i386_active_cpus();
951 i386_signal_cpus(MP_RENDEZVOUS
, ASYNC
);
952 simple_unlock(&x86_topo_lock
);
954 /* call executor function on this cpu */
955 mp_rendezvous_action();
958 * Spin for everyone to complete.
959 * This is necessary to ensure that all processors have proceeded
960 * from the exit barrier before we release the rendezvous structure.
962 tsc_spin_start
= rdtsc64();
963 while (mp_rv_complete
< mp_rv_ncpus
) {
964 if (mp_spin_timeout(tsc_spin_start
))
965 panic("mp_rendezvous() timeout");
969 mp_rv_setup_func
= NULL
;
970 mp_rv_action_func
= NULL
;
971 mp_rv_teardown_func
= NULL
;
972 mp_rv_func_arg
= NULL
;
975 simple_unlock(&mp_rv_lock
);
979 mp_rendezvous_break_lock(void)
981 simple_lock_init(&mp_rv_lock
, 0);
985 setup_disable_intrs(__unused
void * param_not_used
)
987 /* disable interrupts before the first barrier */
988 boolean_t intr
= ml_set_interrupts_enabled(FALSE
);
990 current_cpu_datap()->cpu_iflag
= intr
;
991 DBG("CPU%d: %s\n", get_cpu_number(), __FUNCTION__
);
995 teardown_restore_intrs(__unused
void * param_not_used
)
997 /* restore interrupt flag following MTRR changes */
998 ml_set_interrupts_enabled(current_cpu_datap()->cpu_iflag
);
999 DBG("CPU%d: %s\n", get_cpu_number(), __FUNCTION__
);
1003 * A wrapper to mp_rendezvous() to call action_func() with interrupts disabled.
1004 * This is exported for use by kexts.
1007 mp_rendezvous_no_intrs(
1008 void (*action_func
)(void *),
1011 mp_rendezvous(setup_disable_intrs
,
1013 teardown_restore_intrs
,
1019 queue_chain_t link
; /* queue linkage */
1020 void (*func
)(void *,void *); /* routine to call */
1021 void *arg0
; /* routine's 1st arg */
1022 void *arg1
; /* routine's 2nd arg */
1023 cpumask_t
*maskp
; /* completion response mask */
1029 decl_simple_lock_data(, lock
);
1031 #define MP_CPUS_CALL_BUFS_PER_CPU MAX_CPUS
1032 static mp_call_queue_t mp_cpus_call_freelist
;
1033 static mp_call_queue_t mp_cpus_call_head
[MAX_CPUS
];
1035 static inline boolean_t
1036 mp_call_head_lock(mp_call_queue_t
*cqp
)
1038 boolean_t intrs_enabled
;
1040 intrs_enabled
= ml_set_interrupts_enabled(FALSE
);
1041 simple_lock(&cqp
->lock
);
1043 return intrs_enabled
;
1047 mp_cpus_NMIPI(cpumask_t cpu_mask
) {
1048 unsigned int cpu
, cpu_bit
;
1051 for (cpu
= 0, cpu_bit
= 1; cpu
< real_ncpus
; cpu
++, cpu_bit
<<= 1) {
1052 if (cpu_mask
& cpu_bit
)
1053 cpu_NMI_interrupt(cpu
);
1055 deadline
= mach_absolute_time() + (LockTimeOut
);
1056 while (mach_absolute_time() < deadline
)
1061 static inline boolean_t
1062 mp_call_head_is_locked(mp_call_queue_t
*cqp
)
1064 return !ml_get_interrupts_enabled() &&
1065 hw_lock_held((hw_lock_t
)&cqp
->lock
);
1070 mp_call_head_unlock(mp_call_queue_t
*cqp
, boolean_t intrs_enabled
)
1072 simple_unlock(&cqp
->lock
);
1073 ml_set_interrupts_enabled(intrs_enabled
);
1076 static inline mp_call_t
*
1079 mp_call_t
*callp
= NULL
;
1080 boolean_t intrs_enabled
;
1081 mp_call_queue_t
*cqp
= &mp_cpus_call_freelist
;
1083 intrs_enabled
= mp_call_head_lock(cqp
);
1084 if (!queue_empty(&cqp
->queue
))
1085 queue_remove_first(&cqp
->queue
, callp
, typeof(callp
), link
);
1086 mp_call_head_unlock(cqp
, intrs_enabled
);
1092 mp_call_free(mp_call_t
*callp
)
1094 boolean_t intrs_enabled
;
1095 mp_call_queue_t
*cqp
= &mp_cpus_call_freelist
;
1097 intrs_enabled
= mp_call_head_lock(cqp
);
1098 queue_enter_first(&cqp
->queue
, callp
, typeof(callp
), link
);
1099 mp_call_head_unlock(cqp
, intrs_enabled
);
1102 static inline mp_call_t
*
1103 mp_call_dequeue_locked(mp_call_queue_t
*cqp
)
1105 mp_call_t
*callp
= NULL
;
1107 assert(mp_call_head_is_locked(cqp
));
1108 if (!queue_empty(&cqp
->queue
))
1109 queue_remove_first(&cqp
->queue
, callp
, typeof(callp
), link
);
1114 mp_call_enqueue_locked(
1115 mp_call_queue_t
*cqp
,
1118 queue_enter(&cqp
->queue
, callp
, typeof(callp
), link
);
1121 /* Called on the boot processor to initialize global structures */
1123 mp_cpus_call_init(void)
1125 mp_call_queue_t
*cqp
= &mp_cpus_call_freelist
;
1127 DBG("mp_cpus_call_init()\n");
1128 simple_lock_init(&cqp
->lock
, 0);
1129 queue_init(&cqp
->queue
);
1133 * Called at processor registration to add call buffers to the free list
1134 * and to initialize the per-cpu call queue.
1137 mp_cpus_call_cpu_init(int cpu
)
1140 mp_call_queue_t
*cqp
= &mp_cpus_call_head
[cpu
];
1143 simple_lock_init(&cqp
->lock
, 0);
1144 queue_init(&cqp
->queue
);
1145 for (i
= 0; i
< MP_CPUS_CALL_BUFS_PER_CPU
; i
++) {
1146 callp
= (mp_call_t
*) kalloc(sizeof(mp_call_t
));
1147 mp_call_free(callp
);
1150 DBG("mp_cpus_call_init(%d) done\n", cpu
);
1154 * This is called from cpu_signal_handler() to process an MP_CALL signal.
1155 * And also from i386_deactivate_cpu() when a cpu is being taken offline.
1158 mp_cpus_call_action(void)
1160 mp_call_queue_t
*cqp
;
1161 boolean_t intrs_enabled
;
1165 assert(!ml_get_interrupts_enabled());
1166 cqp
= &mp_cpus_call_head
[cpu_number()];
1167 intrs_enabled
= mp_call_head_lock(cqp
);
1168 while ((callp
= mp_call_dequeue_locked(cqp
)) != NULL
) {
1169 /* Copy call request to the stack to free buffer */
1171 mp_call_free(callp
);
1172 if (call
.func
!= NULL
) {
1173 mp_call_head_unlock(cqp
, intrs_enabled
);
1174 KERNEL_DEBUG_CONSTANT(
1175 TRACE_MP_CPUS_CALL_ACTION
,
1176 call
.func
, call
.arg0
, call
.arg1
, call
.maskp
, 0);
1177 call
.func(call
.arg0
, call
.arg1
);
1178 (void) mp_call_head_lock(cqp
);
1180 if (call
.maskp
!= NULL
)
1181 i_bit_set(cpu_number(), call
.maskp
);
1183 mp_call_head_unlock(cqp
, intrs_enabled
);
1187 * mp_cpus_call() runs a given function on cpus specified in a given cpu mask.
1188 * Possible modes are:
1189 * SYNC: function is called serially on target cpus in logical cpu order
1190 * waiting for each call to be acknowledged before proceeding
1191 * ASYNC: function call is queued to the specified cpus
1192 * waiting for all calls to complete in parallel before returning
1193 * NOSYNC: function calls are queued
1194 * but we return before confirmation of calls completing.
1195 * The action function may be NULL.
1196 * The cpu mask may include the local cpu. Offline cpus are ignored.
1197 * The return value is the number of cpus on which the call was made or queued.
1203 void (*action_func
)(void *),
1206 return mp_cpus_call1(
1209 (void (*)(void *,void *))action_func
,
1217 mp_cpus_call_wait(boolean_t intrs_enabled
,
1218 cpumask_t cpus_called
,
1219 cpumask_t
*cpus_responded
)
1221 mp_call_queue_t
*cqp
;
1222 uint64_t tsc_spin_start
;
1224 cqp
= &mp_cpus_call_head
[cpu_number()];
1226 tsc_spin_start
= rdtsc64();
1227 while (*cpus_responded
!= cpus_called
) {
1228 if (!intrs_enabled
) {
1229 /* Sniffing w/o locking */
1230 if (!queue_empty(&cqp
->queue
))
1231 mp_cpus_call_action();
1232 cpu_signal_handler(NULL
);
1234 if (mp_spin_timeout(tsc_spin_start
)) {
1235 cpumask_t cpus_unresponsive
;
1237 mp_cpus_call_wait_timeout
= TRUE
;
1238 cpus_unresponsive
= cpus_called
& ~(*cpus_responded
);
1239 mp_cpus_NMIPI(cpus_unresponsive
);
1240 panic("mp_cpus_call_wait() timeout, cpus: 0x%llx",
1250 void (*action_func
)(void *, void *),
1253 cpumask_t
*cpus_calledp
,
1254 cpumask_t
*cpus_notcalledp
)
1257 boolean_t intrs_enabled
= FALSE
;
1258 boolean_t call_self
= FALSE
;
1259 cpumask_t cpus_called
= 0;
1260 cpumask_t cpus_notcalled
= 0;
1261 cpumask_t cpus_responded
= 0;
1262 long cpus_call_count
= 0;
1263 uint64_t tsc_spin_start
;
1264 boolean_t topo_lock
;
1266 KERNEL_DEBUG_CONSTANT(
1267 TRACE_MP_CPUS_CALL
| DBG_FUNC_START
,
1268 cpus
, mode
, VM_KERNEL_UNSLIDE(action_func
), arg0
, arg1
);
1270 if (!smp_initialized
) {
1271 if ((cpus
& CPUMASK_SELF
) == 0)
1273 if (action_func
!= NULL
) {
1274 intrs_enabled
= ml_set_interrupts_enabled(FALSE
);
1275 action_func(arg0
, arg1
);
1276 ml_set_interrupts_enabled(intrs_enabled
);
1283 * Queue the call for each non-local requested cpu.
1284 * This is performed under the topo lock to prevent changes to
1285 * cpus online state and to prevent concurrent rendezvouses --
1286 * although an exception is made if we're calling only the master
1287 * processor since that always remains active. Note: this exception
1288 * is expected for longterm timer nosync cross-calls to the master cpu.
1290 mp_disable_preemption();
1291 intrs_enabled
= ml_get_interrupts_enabled();
1292 topo_lock
= (cpus
!= cpu_to_cpumask(master_cpu
));
1294 ml_set_interrupts_enabled(FALSE
);
1295 (void) mp_safe_spin_lock(&x86_topo_lock
);
1297 for (cpu
= 0; cpu
< (cpu_t
) real_ncpus
; cpu
++) {
1298 if (((cpu_to_cpumask(cpu
) & cpus
) == 0) ||
1299 !cpu_datap(cpu
)->cpu_running
)
1301 tsc_spin_start
= rdtsc64();
1302 if (cpu
== (cpu_t
) cpu_number()) {
1304 * We don't IPI ourself and if calling asynchronously,
1305 * we defer our call until we have signalled all others.
1308 if (mode
== SYNC
&& action_func
!= NULL
) {
1309 KERNEL_DEBUG_CONSTANT(
1310 TRACE_MP_CPUS_CALL_LOCAL
,
1311 VM_KERNEL_UNSLIDE(action_func
),
1313 action_func(arg0
, arg1
);
1317 * Here to queue a call to cpu and IPI.
1318 * Spinning for request buffer unless NOSYNC.
1320 mp_call_t
*callp
= NULL
;
1321 mp_call_queue_t
*cqp
= &mp_cpus_call_head
[cpu
];
1322 boolean_t intrs_inner
;
1326 callp
= mp_call_alloc();
1327 intrs_inner
= mp_call_head_lock(cqp
);
1328 if (mode
== NOSYNC
) {
1329 if (callp
== NULL
) {
1330 cpus_notcalled
|= cpu_to_cpumask(cpu
);
1331 mp_call_head_unlock(cqp
, intrs_inner
);
1332 KERNEL_DEBUG_CONSTANT(
1333 TRACE_MP_CPUS_CALL_NOBUF
,
1337 callp
->maskp
= NULL
;
1339 if (callp
== NULL
) {
1340 mp_call_head_unlock(cqp
, intrs_inner
);
1341 KERNEL_DEBUG_CONSTANT(
1342 TRACE_MP_CPUS_CALL_NOBUF
,
1345 /* Sniffing w/o locking */
1346 if (!queue_empty(&cqp
->queue
))
1347 mp_cpus_call_action();
1348 handle_pending_TLB_flushes();
1350 if (mp_spin_timeout(tsc_spin_start
))
1351 panic("mp_cpus_call1() timeout");
1354 callp
->maskp
= &cpus_responded
;
1356 callp
->func
= action_func
;
1359 mp_call_enqueue_locked(cqp
, callp
);
1361 cpus_called
|= cpu_to_cpumask(cpu
);
1362 i386_signal_cpu(cpu
, MP_CALL
, ASYNC
);
1363 mp_call_head_unlock(cqp
, intrs_inner
);
1365 mp_cpus_call_wait(intrs_inner
, cpus_called
, &cpus_responded
);
1370 simple_unlock(&x86_topo_lock
);
1371 ml_set_interrupts_enabled(intrs_enabled
);
1374 /* Call locally if mode not SYNC */
1375 if (mode
!= SYNC
&& call_self
) {
1376 KERNEL_DEBUG_CONSTANT(
1377 TRACE_MP_CPUS_CALL_LOCAL
,
1378 VM_KERNEL_UNSLIDE(action_func
), arg0
, arg1
, 0, 0);
1379 if (action_func
!= NULL
) {
1380 ml_set_interrupts_enabled(FALSE
);
1381 action_func(arg0
, arg1
);
1382 ml_set_interrupts_enabled(intrs_enabled
);
1386 /* Safe to allow pre-emption now */
1387 mp_enable_preemption();
1389 /* For ASYNC, now wait for all signaled cpus to complete their calls */
1391 mp_cpus_call_wait(intrs_enabled
, cpus_called
, &cpus_responded
);
1395 cpus_called
|= cpu_to_cpumask(cpu
);
1400 *cpus_calledp
= cpus_called
;
1401 if (cpus_notcalledp
)
1402 *cpus_notcalledp
= cpus_notcalled
;
1404 KERNEL_DEBUG_CONSTANT(
1405 TRACE_MP_CPUS_CALL
| DBG_FUNC_END
,
1406 cpus_call_count
, cpus_called
, cpus_notcalled
, 0, 0);
1408 return (cpu_t
) cpus_call_count
;
1413 mp_broadcast_action(void)
1415 /* call action function */
1416 if (mp_bc_action_func
!= NULL
)
1417 mp_bc_action_func(mp_bc_func_arg
);
1419 /* if we're the last one through, wake up the instigator */
1420 if (atomic_decl_and_test(&mp_bc_count
, 1))
1421 thread_wakeup(((event_t
)(uintptr_t) &mp_bc_count
));
1425 * mp_broadcast() runs a given function on all active cpus.
1426 * The caller blocks until the functions has run on all cpus.
1427 * The caller will also block if there is another pending braodcast.
1431 void (*action_func
)(void *),
1434 if (!smp_initialized
) {
1435 if (action_func
!= NULL
)
1440 /* obtain broadcast lock */
1441 lck_mtx_lock(&mp_bc_lock
);
1443 /* set static function pointers */
1444 mp_bc_action_func
= action_func
;
1445 mp_bc_func_arg
= arg
;
1447 assert_wait((event_t
)(uintptr_t)&mp_bc_count
, THREAD_UNINT
);
1450 * signal other processors, which will call mp_broadcast_action()
1452 simple_lock(&x86_topo_lock
);
1453 mp_bc_ncpus
= i386_active_cpus(); /* total including this cpu */
1454 mp_bc_count
= mp_bc_ncpus
;
1455 i386_signal_cpus(MP_BROADCAST
, ASYNC
);
1457 /* call executor function on this cpu */
1458 mp_broadcast_action();
1459 simple_unlock(&x86_topo_lock
);
1461 /* block for all cpus to have run action_func */
1462 if (mp_bc_ncpus
> 1)
1463 thread_block(THREAD_CONTINUE_NULL
);
1465 clear_wait(current_thread(), THREAD_AWAKENED
);
1468 lck_mtx_unlock(&mp_bc_lock
);
1472 mp_cpus_kick(cpumask_t cpus
)
1475 boolean_t intrs_enabled
= FALSE
;
1477 intrs_enabled
= ml_set_interrupts_enabled(FALSE
);
1478 mp_safe_spin_lock(&x86_topo_lock
);
1480 for (cpu
= 0; cpu
< (cpu_t
) real_ncpus
; cpu
++) {
1481 if ((cpu
== (cpu_t
) cpu_number())
1482 || ((cpu_to_cpumask(cpu
) & cpus
) == 0)
1483 || (!cpu_datap(cpu
)->cpu_running
))
1488 lapic_send_ipi(cpu
, LAPIC_VECTOR(KICK
));
1491 simple_unlock(&x86_topo_lock
);
1492 ml_set_interrupts_enabled(intrs_enabled
);
1496 i386_activate_cpu(void)
1498 cpu_data_t
*cdp
= current_cpu_datap();
1500 assert(!ml_get_interrupts_enabled());
1502 if (!smp_initialized
) {
1503 cdp
->cpu_running
= TRUE
;
1507 simple_lock(&x86_topo_lock
);
1508 cdp
->cpu_running
= TRUE
;
1510 simple_unlock(&x86_topo_lock
);
1515 i386_deactivate_cpu(void)
1517 cpu_data_t
*cdp
= current_cpu_datap();
1519 assert(!ml_get_interrupts_enabled());
1521 KERNEL_DEBUG_CONSTANT(
1522 TRACE_MP_CPU_DEACTIVATE
| DBG_FUNC_START
,
1525 simple_lock(&x86_topo_lock
);
1526 cdp
->cpu_running
= FALSE
;
1527 simple_unlock(&x86_topo_lock
);
1530 * Move all of this cpu's timers to the master/boot cpu,
1531 * and poke it in case there's a sooner deadline for it to schedule.
1533 timer_queue_shutdown(&cdp
->rtclock_timer
.queue
);
1534 mp_cpus_call(cpu_to_cpumask(master_cpu
), ASYNC
, timer_queue_expire_local
, NULL
);
1537 * Open an interrupt window
1538 * and ensure any pending IPI or timer is serviced
1540 mp_disable_preemption();
1541 ml_set_interrupts_enabled(TRUE
);
1543 while (cdp
->cpu_signals
&& x86_lcpu()->rtcDeadline
!= EndOfAllTime
)
1546 * Ensure there's no remaining timer deadline set
1547 * - AICPM may have left one active.
1551 ml_set_interrupts_enabled(FALSE
);
1552 mp_enable_preemption();
1554 KERNEL_DEBUG_CONSTANT(
1555 TRACE_MP_CPU_DEACTIVATE
| DBG_FUNC_END
,
1559 int pmsafe_debug
= 1;
1562 volatile boolean_t mp_kdp_trap
= FALSE
;
1563 volatile unsigned long mp_kdp_ncpus
;
1564 boolean_t mp_kdp_state
;
1571 unsigned int ncpus
= 0;
1572 unsigned int my_cpu
;
1573 uint64_t tsc_timeout
;
1575 DBG("mp_kdp_enter()\n");
1578 if (!smp_initialized
)
1579 simple_lock_init(&mp_kdp_lock
, 0);
1583 * Here to enter the debugger.
1584 * In case of races, only one cpu is allowed to enter kdp after
1587 mp_kdp_state
= ml_set_interrupts_enabled(FALSE
);
1588 my_cpu
= cpu_number();
1590 if (my_cpu
== (unsigned) debugger_cpu
) {
1591 kprintf("\n\nRECURSIVE DEBUGGER ENTRY DETECTED\n\n");
1596 cpu_datap(my_cpu
)->debugger_entry_time
= mach_absolute_time();
1597 simple_lock(&mp_kdp_lock
);
1599 if (pmsafe_debug
&& !kdp_snapshot
)
1600 pmSafeMode(¤t_cpu_datap()->lcpu
, PM_SAFE_FL_SAFE
);
1602 while (mp_kdp_trap
) {
1603 simple_unlock(&mp_kdp_lock
);
1604 DBG("mp_kdp_enter() race lost\n");
1606 mp_kdp_wait(TRUE
, FALSE
);
1608 simple_lock(&mp_kdp_lock
);
1610 debugger_cpu
= my_cpu
;
1612 mp_kdp_ncpus
= 1; /* self */
1614 debugger_entry_time
= cpu_datap(my_cpu
)->debugger_entry_time
;
1615 simple_unlock(&mp_kdp_lock
);
1618 * Deliver a nudge to other cpus, counting how many
1620 DBG("mp_kdp_enter() signaling other processors\n");
1621 if (force_immediate_debugger_NMI
== FALSE
) {
1622 for (cpu
= 0; cpu
< real_ncpus
; cpu
++) {
1623 if (cpu
== my_cpu
|| !cpu_datap(cpu
)->cpu_running
)
1626 i386_signal_cpu(cpu
, MP_KDP
, ASYNC
);
1629 * Wait other processors to synchronize
1631 DBG("mp_kdp_enter() waiting for (%d) processors to suspend\n", ncpus
);
1634 * This timeout is rather arbitrary; we don't want to NMI
1635 * processors that are executing at potentially
1636 * "unsafe-to-interrupt" points such as the trampolines,
1637 * but neither do we want to lose state by waiting too long.
1639 tsc_timeout
= rdtsc64() + (ncpus
* 1000 * 1000 * 10ULL);
1642 tsc_timeout
= ~0ULL;
1644 while (mp_kdp_ncpus
!= ncpus
&& rdtsc64() < tsc_timeout
) {
1646 * A TLB shootdown request may be pending--this would
1647 * result in the requesting processor waiting in
1648 * PMAP_UPDATE_TLBS() until this processor deals with it.
1649 * Process it, so it can now enter mp_kdp_wait()
1651 handle_pending_TLB_flushes();
1654 /* If we've timed out, and some processor(s) are still unresponsive,
1655 * interrupt them with an NMI via the local APIC.
1657 if (mp_kdp_ncpus
!= ncpus
) {
1658 for (cpu
= 0; cpu
< real_ncpus
; cpu
++) {
1659 if (cpu
== my_cpu
|| !cpu_datap(cpu
)->cpu_running
)
1661 if (cpu_signal_pending(cpu
, MP_KDP
))
1662 cpu_NMI_interrupt(cpu
);
1667 for (cpu
= 0; cpu
< real_ncpus
; cpu
++) {
1668 if (cpu
== my_cpu
|| !cpu_datap(cpu
)->cpu_running
)
1670 cpu_NMI_interrupt(cpu
);
1673 DBG("mp_kdp_enter() %d processors done %s\n",
1674 (int)mp_kdp_ncpus
, (mp_kdp_ncpus
== ncpus
) ? "OK" : "timed out");
1676 postcode(MP_KDP_ENTER
);
1680 cpu_signal_pending(int cpu
, mp_event_t event
)
1682 volatile int *signals
= &cpu_datap(cpu
)->cpu_signals
;
1683 boolean_t retval
= FALSE
;
1685 if (i_bit(event
, signals
))
1690 long kdp_x86_xcpu_invoke(const uint16_t lcpu
, kdp_x86_xcpu_func_t func
,
1691 void *arg0
, void *arg1
)
1693 if (lcpu
> (real_ncpus
- 1))
1699 kdp_xcpu_call_func
.func
= func
;
1700 kdp_xcpu_call_func
.ret
= -1;
1701 kdp_xcpu_call_func
.arg0
= arg0
;
1702 kdp_xcpu_call_func
.arg1
= arg1
;
1703 kdp_xcpu_call_func
.cpu
= lcpu
;
1704 DBG("Invoking function %p on CPU %d\n", func
, (int32_t)lcpu
);
1705 while (kdp_xcpu_call_func
.cpu
!= KDP_XCPU_NONE
)
1707 return kdp_xcpu_call_func
.ret
;
1711 kdp_x86_xcpu_poll(void)
1713 if ((uint16_t)cpu_number() == kdp_xcpu_call_func
.cpu
) {
1714 kdp_xcpu_call_func
.ret
=
1715 kdp_xcpu_call_func
.func(kdp_xcpu_call_func
.arg0
,
1716 kdp_xcpu_call_func
.arg1
,
1718 kdp_xcpu_call_func
.cpu
= KDP_XCPU_NONE
;
1723 mp_kdp_wait(boolean_t flush
, boolean_t isNMI
)
1725 DBG("mp_kdp_wait()\n");
1726 /* If an I/O port has been specified as a debugging aid, issue a read */
1727 panic_io_port_read();
1728 current_cpu_datap()->debugger_ipi_time
= mach_absolute_time();
1730 /* If we've trapped due to a machine-check, save MCA registers */
1734 atomic_incl((volatile long *)&mp_kdp_ncpus
, 1);
1735 while (mp_kdp_trap
|| (isNMI
== TRUE
)) {
1737 * A TLB shootdown request may be pending--this would result
1738 * in the requesting processor waiting in PMAP_UPDATE_TLBS()
1739 * until this processor handles it.
1740 * Process it, so it can now enter mp_kdp_wait()
1743 handle_pending_TLB_flushes();
1745 kdp_x86_xcpu_poll();
1749 atomic_decl((volatile long *)&mp_kdp_ncpus
, 1);
1750 DBG("mp_kdp_wait() done\n");
1756 DBG("mp_kdp_exit()\n");
1758 atomic_decl((volatile long *)&mp_kdp_ncpus
, 1);
1760 debugger_exit_time
= mach_absolute_time();
1762 mp_kdp_trap
= FALSE
;
1765 /* Wait other processors to stop spinning. XXX needs timeout */
1766 DBG("mp_kdp_exit() waiting for processors to resume\n");
1767 while (mp_kdp_ncpus
> 0) {
1769 * a TLB shootdown request may be pending... this would result in the requesting
1770 * processor waiting in PMAP_UPDATE_TLBS() until this processor deals with it.
1771 * Process it, so it can now enter mp_kdp_wait()
1773 handle_pending_TLB_flushes();
1778 if (pmsafe_debug
&& !kdp_snapshot
)
1779 pmSafeMode(¤t_cpu_datap()->lcpu
, PM_SAFE_FL_NORMAL
);
1781 debugger_exit_time
= mach_absolute_time();
1783 DBG("mp_kdp_exit() done\n");
1784 (void) ml_set_interrupts_enabled(mp_kdp_state
);
1787 #endif /* MACH_KDP */
1790 mp_recent_debugger_activity() {
1791 uint64_t abstime
= mach_absolute_time();
1792 return (((abstime
- debugger_entry_time
) < LastDebuggerEntryAllowance
) ||
1793 ((abstime
- debugger_exit_time
) < LastDebuggerEntryAllowance
));
1799 __unused processor_t processor
)
1805 processor_t processor
)
1807 int cpu
= processor
->cpu_id
;
1809 if (cpu
!= cpu_number()) {
1810 i386_signal_cpu(cpu
, MP_AST
, ASYNC
);
1811 KERNEL_DEBUG_CONSTANT(MACHDBG_CODE(DBG_MACH_SCHED
, MACH_REMOTE_AST
), cpu
, 1, 0, 0, 0);
1816 slave_machine_init(void *param
)
1819 * Here in process context, but with interrupts disabled.
1821 DBG("slave_machine_init() CPU%d\n", get_cpu_number());
1823 if (param
== FULL_SLAVE_INIT
) {
1829 cpu_machine_init(); /* Interrupts enabled hereafter */
1833 int cpu_number(void)
1835 return get_cpu_number();
1843 simple_lock_init(&cpu_warm_lock
, 0);
1844 queue_init(&cpu_warm_call_list
);
1845 for (i
= 0; i
< NUM_CPU_WARM_CALLS
; i
++) {
1846 enqueue_head(&cpu_warm_call_list
, (queue_entry_t
)&cpu_warm_call_arr
[i
]);
1851 grab_warm_timer_call()
1854 timer_call_t call
= NULL
;
1857 simple_lock(&cpu_warm_lock
);
1858 if (!queue_empty(&cpu_warm_call_list
)) {
1859 call
= (timer_call_t
) dequeue_head(&cpu_warm_call_list
);
1861 simple_unlock(&cpu_warm_lock
);
1868 free_warm_timer_call(timer_call_t call
)
1873 simple_lock(&cpu_warm_lock
);
1874 enqueue_head(&cpu_warm_call_list
, (queue_entry_t
)call
);
1875 simple_unlock(&cpu_warm_lock
);
1880 * Runs in timer call context (interrupts disabled).
1883 cpu_warm_timer_call_func(
1884 call_entry_param_t p0
,
1885 __unused call_entry_param_t p1
)
1887 free_warm_timer_call((timer_call_t
)p0
);
1892 * Runs with interrupts disabled on the CPU we wish to warm (i.e. CPU 0).
1898 cpu_warm_data_t cwdp
= (cpu_warm_data_t
)arg
;
1900 timer_call_enter(cwdp
->cwd_call
, cwdp
->cwd_deadline
, TIMER_CALL_SYS_CRITICAL
| TIMER_CALL_LOCAL
);
1901 cwdp
->cwd_result
= 0;
1907 * Not safe to call with interrupts disabled.
1910 ml_interrupt_prewarm(
1913 struct cpu_warm_data cwd
;
1917 if (ml_get_interrupts_enabled() == FALSE
) {
1918 panic("%s: Interrupts disabled?\n", __FUNCTION__
);
1922 * If the platform doesn't need our help, say that we succeeded.
1924 if (!ml_get_interrupt_prewake_applicable()) {
1925 return KERN_SUCCESS
;
1929 * Grab a timer call to use.
1931 call
= grab_warm_timer_call();
1933 return KERN_RESOURCE_SHORTAGE
;
1936 timer_call_setup(call
, cpu_warm_timer_call_func
, call
);
1937 cwd
.cwd_call
= call
;
1938 cwd
.cwd_deadline
= deadline
;
1942 * For now, non-local interrupts happen on the master processor.
1944 ct
= mp_cpus_call(cpu_to_cpumask(master_cpu
), SYNC
, _cpu_warm_setup
, &cwd
);
1946 free_warm_timer_call(call
);
1947 return KERN_FAILURE
;
1949 return cwd
.cwd_result
;