pexpert/pexpert/ppc/protos.h

   1 /*
   2  * Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
   3  *
   4  * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
   5  *
   6  * This file contains Original Code and/or Modifications of Original Code
   7  * as defined in and that are subject to the Apple Public Source License
   8  * Version 2.0 (the 'License'). You may not use this file except in
   9  * compliance with the License. The rights granted to you under the License
  10  * may not be used to create, or enable the creation or redistribution of,
  11  * unlawful or unlicensed copies of an Apple operating system, or to
  12  * circumvent, violate, or enable the circumvention or violation of, any
  13  * terms of an Apple operating system software license agreement.
  14  *
  15  * Please obtain a copy of the License at
  16  * http://www.opensource.apple.com/apsl/ and read it before using this file.
  17  *
  18  * The Original Code and all software distributed under the License are
  19  * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
  20  * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
  21  * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
  22  * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
  23  * Please see the License for the specific language governing rights and
  24  * limitations under the License.
  25  *
  26  * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
  27  */
  28 #ifndef _PEXPERT_PPC_PROTOS_H_
  29 #define _PEXPERT_PPC_PROTOS_H_
  30
  31 #define mtsprg(n, reg)  __asm__ volatile("mtsprg  " # n ", %0" : : "r" (reg))
  32 #define mfsprg(reg, n)  __asm__ volatile("mfsprg  %0, " # n : "=r" (reg))
  33
  34 #define mtspr(spr, val)  __asm__ volatile("mtspr  " # spr ", %0" : : "r" (val))
  35 #define mfspr(reg, spr)  __asm__ volatile("mfspr  %0, " # spr : "=r" (reg))
  36
  37 /*
  38  * Various memory/IO synchronisation instructions
  39  */
  40
  41         /*      Use eieio as a memory barrier to order stores.
  42          *      Useful for device control and PTE maintenance.
  43          */
  44
  45 #define eieio() \
  46         __asm__ volatile("eieio")
  47
  48         /*      Use sync to ensure previous stores have completed.
  49                 This is  required when manipulating locks and/or
  50                 maintaining PTEs or other shared structures on SMP
  51                 machines.
  52         */
  53
  54 #define sync() \
  55         __asm__ volatile("sync")
  56
  57         /*      Use isync to sychronize context; that is, the ensure
  58                 no prefetching of instructions happen before the
  59                 instruction.
  60         */
  61
  62 #define isync() \
  63         __asm__ volatile("isync")
  64
  65
  66 //------------------------------------------------------------------------
  67 // from ppc/endian.h
  68 static __inline__ unsigned int byte_reverse_word(unsigned int word);
  69 static __inline__ unsigned int byte_reverse_word(unsigned int word) {
  70         unsigned int result;
  71         __asm__ volatile("lwbrx %0, 0, %1" : "=r" (result) : "r" (&word));
  72         return result;
  73 }
  74
  75 //------------------------------------------------------------------------
  76 // from ppc/serial_io.h
  77 extern void initialize_serial(void * scc_phys_base, uint32_t serial_baud);
  78
  79
  80 //------------------------------------------------------------------------
  81 // from osfmk/ppc/POWERMAC/video_console.c
  82
  83 extern void initialize_screen(void *, unsigned int);
  84
  85 extern void vc_progress_initialize( void * desc,
  86                                     const unsigned char * data,
  87                                     const unsigned char * clut );
  88
  89 extern void vc_display_icon( void * desc,
  90                              const unsigned char * data );
  91
  92 //-------------------------------------------------------------------------
  93 // from osfmk/console/panic_dialog.c
  94 extern void panic_ui_initialize(const unsigned char * clut);
  95
  96 // from osfmk/ppc/serial_console.c
  97 extern int  switch_to_serial_console(void);
  98 extern void switch_to_old_console(int old_console);
  99
 100 typedef unsigned spl_t;
 101
 102 //------------------------------------------------------------------------
 103 // from bsd/dev/ppc/busses.h which clashes with mach/device/device_types.h
 104 typedef int             io_req_t;
 105
 106
 107 //typedef struct ipc_port         *ipc_port_t;
 108
 109 extern void            cninit(void);
 110
 111 /*
 112  *      Temporarily stolen from Firmware.h
 113  */
 114
 115 extern void dbgTrace(unsigned int item1, unsigned int item2, unsigned int item3);
 116 #if 1           /* (TEST/DEBUG) - eliminate inline */
 117 extern __inline__ void dbgTrace(unsigned int item1, unsigned int item2, unsigned int item3) {
 118
 119         __asm__ volatile("mr   r3,%0" : : "r" (item1) : "r3");
 120         __asm__ volatile("mr   r4,%0" : : "r" (item2) : "r4");
 121         __asm__ volatile("mr   r5,%0" : : "r" (item3) : "r5");
 122         __asm__ volatile("lis  r0,hi16(CutTrace)" : : : "r0");
 123         __asm__ volatile("ori  r0,r0,lo16(CutTrace)" : : : "r0");
 124         __asm__ volatile("sc");
 125         return;
 126 }
 127 #endif
 128
 129 extern void DoPreempt(void);
 130 extern __inline__ void DoPreempt(void) {
 131         __asm__ volatile("lis  r0,hi16(DoPreemptCall)" : : : "r0");
 132         __asm__ volatile("ori  r0,r0,lo16(DoPreemptCall)" : : : "r0");
 133         __asm__ volatile("sc");
 134         return;
 135 }
 136
 137 extern void CreateFakeIO(void);
 138 extern __inline__ void CreateFakeIO(void) {
 139         __asm__ volatile("lis  r0,hi16(CreateFakeIOCall)" : : : "r0");
 140         __asm__ volatile("ori  r0,r0,lo16(CreateFakeIOCall)" : : : "r0");
 141         __asm__ volatile("sc");
 142                 return;
 143 }
 144
 145 extern void StoreReal(unsigned int val, unsigned int addr);
 146 extern void ReadReal(unsigned int raddr, unsigned int *vaddr);
 147 extern unsigned int LLTraceSet(unsigned int tflags);
 148 extern void GratefulDebInit(void);
 149 extern void GratefulDebDisp(unsigned int coord, unsigned int data);
 150 extern void checkNMI(void);
 151
 152 #ifndef VM_WIMG_IO
 153 #define VM_WIMG_IO              (VM_MEM_COHERENT |      \
 154                                 VM_MEM_NOT_CACHEABLE | VM_MEM_GUARDED)
 155 #endif
 156
 157 #endif /* _PEXPERT_PPC_PROTOS_H_ */